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git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/gpu/drm/i915/i915_suspend.c
3 * Copyright 2008 (c) Intel Corporation
4 * Jesse Barnes <jbarnes@virtuousgeek.org>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include <drm/i915_drm.h>
29 #include "intel_drv.h"
32 static void i915_save_display(struct drm_device
*dev
)
34 struct drm_i915_private
*dev_priv
= to_i915(dev
);
36 /* Display arbitration control */
37 if (INTEL_INFO(dev
)->gen
<= 4)
38 dev_priv
->regfile
.saveDSPARB
= I915_READ(DSPARB
);
40 /* save FBC interval */
41 if (HAS_FBC(dev
) && INTEL_INFO(dev
)->gen
<= 4 && !IS_G4X(dev
))
42 dev_priv
->regfile
.saveFBC_CONTROL
= I915_READ(FBC_CONTROL
);
45 static void i915_restore_display(struct drm_device
*dev
)
47 struct drm_i915_private
*dev_priv
= to_i915(dev
);
49 /* Display arbitration */
50 if (INTEL_INFO(dev
)->gen
<= 4)
51 I915_WRITE(DSPARB
, dev_priv
->regfile
.saveDSPARB
);
53 /* only restore FBC info on the platform that supports FBC*/
54 intel_fbc_global_disable(dev_priv
);
56 /* restore FBC interval */
57 if (HAS_FBC(dev
) && INTEL_INFO(dev
)->gen
<= 4 && !IS_G4X(dev
))
58 I915_WRITE(FBC_CONTROL
, dev_priv
->regfile
.saveFBC_CONTROL
);
60 i915_redisable_vga(dev
);
63 int i915_save_state(struct drm_device
*dev
)
65 struct drm_i915_private
*dev_priv
= to_i915(dev
);
66 struct pci_dev
*pdev
= dev_priv
->drm
.pdev
;
69 mutex_lock(&dev
->struct_mutex
);
71 i915_save_display(dev
);
74 pci_read_config_word(pdev
, GCDGMBUS
,
75 &dev_priv
->regfile
.saveGCDGMBUS
);
77 /* Cache mode state */
78 if (INTEL_INFO(dev
)->gen
< 7)
79 dev_priv
->regfile
.saveCACHE_MODE_0
= I915_READ(CACHE_MODE_0
);
81 /* Memory Arbitration state */
82 dev_priv
->regfile
.saveMI_ARB_STATE
= I915_READ(MI_ARB_STATE
);
85 if (IS_GEN2(dev_priv
) && IS_MOBILE(dev_priv
)) {
86 for (i
= 0; i
< 7; i
++) {
87 dev_priv
->regfile
.saveSWF0
[i
] = I915_READ(SWF0(i
));
88 dev_priv
->regfile
.saveSWF1
[i
] = I915_READ(SWF1(i
));
90 for (i
= 0; i
< 3; i
++)
91 dev_priv
->regfile
.saveSWF3
[i
] = I915_READ(SWF3(i
));
92 } else if (IS_GEN2(dev_priv
)) {
93 for (i
= 0; i
< 7; i
++)
94 dev_priv
->regfile
.saveSWF1
[i
] = I915_READ(SWF1(i
));
95 } else if (HAS_GMCH_DISPLAY(dev_priv
)) {
96 for (i
= 0; i
< 16; i
++) {
97 dev_priv
->regfile
.saveSWF0
[i
] = I915_READ(SWF0(i
));
98 dev_priv
->regfile
.saveSWF1
[i
] = I915_READ(SWF1(i
));
100 for (i
= 0; i
< 3; i
++)
101 dev_priv
->regfile
.saveSWF3
[i
] = I915_READ(SWF3(i
));
104 mutex_unlock(&dev
->struct_mutex
);
109 int i915_restore_state(struct drm_device
*dev
)
111 struct drm_i915_private
*dev_priv
= to_i915(dev
);
112 struct pci_dev
*pdev
= dev_priv
->drm
.pdev
;
115 mutex_lock(&dev
->struct_mutex
);
117 i915_gem_restore_fences(dev
);
120 pci_write_config_word(pdev
, GCDGMBUS
,
121 dev_priv
->regfile
.saveGCDGMBUS
);
122 i915_restore_display(dev
);
124 /* Cache mode state */
125 if (INTEL_INFO(dev
)->gen
< 7)
126 I915_WRITE(CACHE_MODE_0
, dev_priv
->regfile
.saveCACHE_MODE_0
|
129 /* Memory arbitration state */
130 I915_WRITE(MI_ARB_STATE
, dev_priv
->regfile
.saveMI_ARB_STATE
| 0xffff0000);
133 if (IS_GEN2(dev_priv
) && IS_MOBILE(dev_priv
)) {
134 for (i
= 0; i
< 7; i
++) {
135 I915_WRITE(SWF0(i
), dev_priv
->regfile
.saveSWF0
[i
]);
136 I915_WRITE(SWF1(i
), dev_priv
->regfile
.saveSWF1
[i
]);
138 for (i
= 0; i
< 3; i
++)
139 I915_WRITE(SWF3(i
), dev_priv
->regfile
.saveSWF3
[i
]);
140 } else if (IS_GEN2(dev_priv
)) {
141 for (i
= 0; i
< 7; i
++)
142 I915_WRITE(SWF1(i
), dev_priv
->regfile
.saveSWF1
[i
]);
143 } else if (HAS_GMCH_DISPLAY(dev_priv
)) {
144 for (i
= 0; i
< 16; i
++) {
145 I915_WRITE(SWF0(i
), dev_priv
->regfile
.saveSWF0
[i
]);
146 I915_WRITE(SWF1(i
), dev_priv
->regfile
.saveSWF1
[i
]);
148 for (i
= 0; i
< 3; i
++)
149 I915_WRITE(SWF3(i
), dev_priv
->regfile
.saveSWF3
[i
]);
152 mutex_unlock(&dev
->struct_mutex
);
154 intel_i2c_reset(dev
);