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2 * Copyright(c) 2011-2015 Intel Corporation. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 #include "intel_drv.h"
25 #include "i915_vgpu.h"
28 * DOC: Intel GVT-g guest support
30 * Intel GVT-g is a graphics virtualization technology which shares the
31 * GPU among multiple virtual machines on a time-sharing basis. Each
32 * virtual machine is presented a virtual GPU (vGPU), which has equivalent
33 * features as the underlying physical GPU (pGPU), so i915 driver can run
34 * seamlessly in a virtual machine. This file provides vGPU specific
35 * optimizations when running in a virtual machine, to reduce the complexity
36 * of vGPU emulation and to improve the overall performance.
38 * A primary function introduced here is so-called "address space ballooning"
39 * technique. Intel GVT-g partitions global graphics memory among multiple VMs,
40 * so each VM can directly access a portion of the memory without hypervisor's
41 * intervention, e.g. filling textures or queuing commands. However with the
42 * partitioning an unmodified i915 driver would assume a smaller graphics
43 * memory starting from address ZERO, then requires vGPU emulation module to
44 * translate the graphics address between 'guest view' and 'host view', for
45 * all registers and command opcodes which contain a graphics memory address.
46 * To reduce the complexity, Intel GVT-g introduces "address space ballooning",
47 * by telling the exact partitioning knowledge to each guest i915 driver, which
48 * then reserves and prevents non-allocated portions from allocation. Thus vGPU
49 * emulation module only needs to scan and validate graphics addresses without
50 * complexity of address translation.
55 * i915_check_vgpu - detect virtual GPU
56 * @dev_priv: i915 device private
58 * This function is called at the initialization stage, to detect whether
61 void i915_check_vgpu(struct drm_i915_private
*dev_priv
)
66 BUILD_BUG_ON(sizeof(struct vgt_if
) != VGT_PVINFO_SIZE
);
68 magic
= __raw_i915_read64(dev_priv
, vgtif_reg(magic
));
69 if (magic
!= VGT_MAGIC
)
72 version_major
= __raw_i915_read16(dev_priv
, vgtif_reg(version_major
));
73 if (version_major
< VGT_VERSION_MAJOR
) {
74 DRM_INFO("VGT interface version mismatch!\n");
78 dev_priv
->vgpu
.active
= true;
79 DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
82 struct _balloon_info_
{
84 * There are up to 2 regions per mappable/unmappable graphic
85 * memory that might be ballooned. Here, index 0/1 is for mappable
86 * graphic memory, 2/3 for unmappable graphic memory.
88 struct drm_mm_node space
[4];
91 static struct _balloon_info_ bl_info
;
94 * intel_vgt_deballoon - deballoon reserved graphics address trunks
95 * @dev_priv: i915 device private data
97 * This function is called to deallocate the ballooned-out graphic memory, when
98 * driver is unloaded or when ballooning fails.
100 void intel_vgt_deballoon(struct drm_i915_private
*dev_priv
)
104 if (!intel_vgpu_active(dev_priv
))
107 DRM_DEBUG("VGT deballoon.\n");
109 for (i
= 0; i
< 4; i
++) {
110 if (bl_info
.space
[i
].allocated
)
111 drm_mm_remove_node(&bl_info
.space
[i
]);
114 memset(&bl_info
, 0, sizeof(bl_info
));
117 static int vgt_balloon_space(struct i915_ggtt
*ggtt
,
118 struct drm_mm_node
*node
,
119 unsigned long start
, unsigned long end
)
121 unsigned long size
= end
- start
;
126 DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
127 start
, end
, size
/ 1024);
128 return i915_gem_gtt_reserve(&ggtt
->base
, node
,
129 size
, start
, I915_COLOR_UNEVICTABLE
,
134 * intel_vgt_balloon - balloon out reserved graphics address trunks
135 * @dev_priv: i915 device private data
137 * This function is called at the initialization stage, to balloon out the
138 * graphic address space allocated to other vGPUs, by marking these spaces as
139 * reserved. The ballooning related knowledge(starting address and size of
140 * the mappable/unmappable graphic memory) is described in the vgt_if structure
141 * in a reserved mmio range.
143 * To give an example, the drawing below depicts one typical scenario after
144 * ballooning. Here the vGPU1 has 2 pieces of graphic address spaces ballooned
145 * out each for the mappable and the non-mappable part. From the vGPU1 point of
146 * view, the total size is the same as the physical one, with the start address
147 * of its graphic space being zero. Yet there are some portions ballooned out(
148 * the shadow part, which are marked as reserved by drm allocator). From the
149 * host point of view, the graphic address space is partitioned by multiple
150 * vGPUs in different VMs. ::
152 * vGPU1 view Host view
153 * 0 ------> +-----------+ +-----------+
154 * ^ |###########| | vGPU3 |
155 * | |###########| +-----------+
156 * | |###########| | vGPU2 |
157 * | +-----------+ +-----------+
158 * mappable GM | available | ==> | vGPU1 |
159 * | +-----------+ +-----------+
160 * | |###########| | |
161 * v |###########| | Host |
162 * +=======+===========+ +===========+
163 * ^ |###########| | vGPU3 |
164 * | |###########| +-----------+
165 * | |###########| | vGPU2 |
166 * | +-----------+ +-----------+
167 * unmappable GM | available | ==> | vGPU1 |
168 * | +-----------+ +-----------+
169 * | |###########| | |
170 * | |###########| | Host |
171 * v |###########| | |
172 * total GM size ------> +-----------+ +-----------+
175 * zero on success, non-zero if configuration invalid or ballooning failed
177 int intel_vgt_balloon(struct drm_i915_private
*dev_priv
)
179 struct i915_ggtt
*ggtt
= &dev_priv
->ggtt
;
180 unsigned long ggtt_end
= ggtt
->base
.total
;
182 unsigned long mappable_base
, mappable_size
, mappable_end
;
183 unsigned long unmappable_base
, unmappable_size
, unmappable_end
;
186 if (!intel_vgpu_active(dev_priv
))
189 mappable_base
= I915_READ(vgtif_reg(avail_rs
.mappable_gmadr
.base
));
190 mappable_size
= I915_READ(vgtif_reg(avail_rs
.mappable_gmadr
.size
));
191 unmappable_base
= I915_READ(vgtif_reg(avail_rs
.nonmappable_gmadr
.base
));
192 unmappable_size
= I915_READ(vgtif_reg(avail_rs
.nonmappable_gmadr
.size
));
194 mappable_end
= mappable_base
+ mappable_size
;
195 unmappable_end
= unmappable_base
+ unmappable_size
;
197 DRM_INFO("VGT ballooning configuration:\n");
198 DRM_INFO("Mappable graphic memory: base 0x%lx size %ldKiB\n",
199 mappable_base
, mappable_size
/ 1024);
200 DRM_INFO("Unmappable graphic memory: base 0x%lx size %ldKiB\n",
201 unmappable_base
, unmappable_size
/ 1024);
203 if (mappable_end
> ggtt
->mappable_end
||
204 unmappable_base
< ggtt
->mappable_end
||
205 unmappable_end
> ggtt_end
) {
206 DRM_ERROR("Invalid ballooning configuration!\n");
210 /* Unmappable graphic memory ballooning */
211 if (unmappable_base
> ggtt
->mappable_end
) {
212 ret
= vgt_balloon_space(ggtt
, &bl_info
.space
[2],
213 ggtt
->mappable_end
, unmappable_base
);
219 if (unmappable_end
< ggtt_end
) {
220 ret
= vgt_balloon_space(ggtt
, &bl_info
.space
[3],
221 unmappable_end
, ggtt_end
);
226 /* Mappable graphic memory ballooning */
228 ret
= vgt_balloon_space(ggtt
, &bl_info
.space
[0],
235 if (mappable_end
< ggtt
->mappable_end
) {
236 ret
= vgt_balloon_space(ggtt
, &bl_info
.space
[1],
237 mappable_end
, ggtt
->mappable_end
);
243 DRM_INFO("VGT balloon successfully\n");
247 DRM_ERROR("VGT balloon fail\n");
248 intel_vgt_deballoon(dev_priv
);