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[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / i915 / intel_bios.c
1 /*
2 * Copyright © 2006 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27 #include <linux/dmi.h>
28 #include <drm/drm_dp_helper.h>
29 #include <drm/drmP.h>
30 #include <drm/i915_drm.h>
31 #include "i915_drv.h"
32 #include "intel_bios.h"
33
34 #define SLAVE_ADDR1 0x70
35 #define SLAVE_ADDR2 0x72
36
37 static int panel_type;
38
39 static void *
40 find_section(struct bdb_header *bdb, int section_id)
41 {
42 u8 *base = (u8 *)bdb;
43 int index = 0;
44 u16 total, current_size;
45 u8 current_id;
46
47 /* skip to first section */
48 index += bdb->header_size;
49 total = bdb->bdb_size;
50
51 /* walk the sections looking for section_id */
52 while (index + 3 < total) {
53 current_id = *(base + index);
54 index++;
55
56 current_size = *((u16 *)(base + index));
57 index += 2;
58
59 if (index + current_size > total)
60 return NULL;
61
62 if (current_id == section_id)
63 return base + index;
64
65 index += current_size;
66 }
67
68 return NULL;
69 }
70
71 static u16
72 get_blocksize(void *p)
73 {
74 u16 *block_ptr, block_size;
75
76 block_ptr = (u16 *)((char *)p - 2);
77 block_size = *block_ptr;
78 return block_size;
79 }
80
81 static void
82 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
83 const struct lvds_dvo_timing *dvo_timing)
84 {
85 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
86 dvo_timing->hactive_lo;
87 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
88 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
89 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
90 dvo_timing->hsync_pulse_width;
91 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
92 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
93
94 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
95 dvo_timing->vactive_lo;
96 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
97 dvo_timing->vsync_off;
98 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
99 dvo_timing->vsync_pulse_width;
100 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
101 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
102 panel_fixed_mode->clock = dvo_timing->clock * 10;
103 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
104
105 if (dvo_timing->hsync_positive)
106 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
107 else
108 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
109
110 if (dvo_timing->vsync_positive)
111 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
112 else
113 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
114
115 /* Some VBTs have bogus h/vtotal values */
116 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
117 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
118 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
119 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
120
121 drm_mode_set_name(panel_fixed_mode);
122 }
123
124 static bool
125 lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
126 const struct lvds_dvo_timing *b)
127 {
128 if (a->hactive_hi != b->hactive_hi ||
129 a->hactive_lo != b->hactive_lo)
130 return false;
131
132 if (a->hsync_off_hi != b->hsync_off_hi ||
133 a->hsync_off_lo != b->hsync_off_lo)
134 return false;
135
136 if (a->hsync_pulse_width != b->hsync_pulse_width)
137 return false;
138
139 if (a->hblank_hi != b->hblank_hi ||
140 a->hblank_lo != b->hblank_lo)
141 return false;
142
143 if (a->vactive_hi != b->vactive_hi ||
144 a->vactive_lo != b->vactive_lo)
145 return false;
146
147 if (a->vsync_off != b->vsync_off)
148 return false;
149
150 if (a->vsync_pulse_width != b->vsync_pulse_width)
151 return false;
152
153 if (a->vblank_hi != b->vblank_hi ||
154 a->vblank_lo != b->vblank_lo)
155 return false;
156
157 return true;
158 }
159
160 static const struct lvds_dvo_timing *
161 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
162 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
163 int index)
164 {
165 /*
166 * the size of fp_timing varies on the different platform.
167 * So calculate the DVO timing relative offset in LVDS data
168 * entry to get the DVO timing entry
169 */
170
171 int lfp_data_size =
172 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
173 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
174 int dvo_timing_offset =
175 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
176 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
177 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
178
179 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
180 }
181
182 /* get lvds_fp_timing entry
183 * this function may return NULL if the corresponding entry is invalid
184 */
185 static const struct lvds_fp_timing *
186 get_lvds_fp_timing(const struct bdb_header *bdb,
187 const struct bdb_lvds_lfp_data *data,
188 const struct bdb_lvds_lfp_data_ptrs *ptrs,
189 int index)
190 {
191 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
192 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
193 size_t ofs;
194
195 if (index >= ARRAY_SIZE(ptrs->ptr))
196 return NULL;
197 ofs = ptrs->ptr[index].fp_timing_offset;
198 if (ofs < data_ofs ||
199 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
200 return NULL;
201 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
202 }
203
204 /* Try to find integrated panel data */
205 static void
206 parse_lfp_panel_data(struct drm_i915_private *dev_priv,
207 struct bdb_header *bdb)
208 {
209 const struct bdb_lvds_options *lvds_options;
210 const struct bdb_lvds_lfp_data *lvds_lfp_data;
211 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
212 const struct lvds_dvo_timing *panel_dvo_timing;
213 const struct lvds_fp_timing *fp_timing;
214 struct drm_display_mode *panel_fixed_mode;
215 int i, downclock, drrs_mode;
216
217 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
218 if (!lvds_options)
219 return;
220
221 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
222 if (lvds_options->panel_type == 0xff)
223 return;
224
225 panel_type = lvds_options->panel_type;
226
227 drrs_mode = (lvds_options->dps_panel_type_bits
228 >> (panel_type * 2)) & MODE_MASK;
229 /*
230 * VBT has static DRRS = 0 and seamless DRRS = 2.
231 * The below piece of code is required to adjust vbt.drrs_type
232 * to match the enum drrs_support_type.
233 */
234 switch (drrs_mode) {
235 case 0:
236 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
237 DRM_DEBUG_KMS("DRRS supported mode is static\n");
238 break;
239 case 2:
240 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
241 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
242 break;
243 default:
244 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
245 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
246 break;
247 }
248
249 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
250 if (!lvds_lfp_data)
251 return;
252
253 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
254 if (!lvds_lfp_data_ptrs)
255 return;
256
257 dev_priv->vbt.lvds_vbt = 1;
258
259 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
260 lvds_lfp_data_ptrs,
261 lvds_options->panel_type);
262
263 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
264 if (!panel_fixed_mode)
265 return;
266
267 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
268
269 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
270
271 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
272 drm_mode_debug_printmodeline(panel_fixed_mode);
273
274 /*
275 * Iterate over the LVDS panel timing info to find the lowest clock
276 * for the native resolution.
277 */
278 downclock = panel_dvo_timing->clock;
279 for (i = 0; i < 16; i++) {
280 const struct lvds_dvo_timing *dvo_timing;
281
282 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
283 lvds_lfp_data_ptrs,
284 i);
285 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
286 dvo_timing->clock < downclock)
287 downclock = dvo_timing->clock;
288 }
289
290 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
291 dev_priv->lvds_downclock_avail = 1;
292 dev_priv->lvds_downclock = downclock * 10;
293 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
294 "Normal Clock %dKHz, downclock %dKHz\n",
295 panel_fixed_mode->clock, 10*downclock);
296 }
297
298 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
299 lvds_lfp_data_ptrs,
300 lvds_options->panel_type);
301 if (fp_timing) {
302 /* check the resolution, just to be sure */
303 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
304 fp_timing->y_res == panel_fixed_mode->vdisplay) {
305 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
306 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
307 dev_priv->vbt.bios_lvds_val);
308 }
309 }
310 }
311
312 static void
313 parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
314 {
315 const struct bdb_lfp_backlight_data *backlight_data;
316 const struct bdb_lfp_backlight_data_entry *entry;
317
318 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
319 if (!backlight_data)
320 return;
321
322 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
323 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
324 backlight_data->entry_size);
325 return;
326 }
327
328 entry = &backlight_data->data[panel_type];
329
330 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
331 if (!dev_priv->vbt.backlight.present) {
332 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
333 entry->type);
334 return;
335 }
336
337 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
338 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
339 dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
340 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
341 "active %s, min brightness %u, level %u\n",
342 dev_priv->vbt.backlight.pwm_freq_hz,
343 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
344 dev_priv->vbt.backlight.min_brightness,
345 backlight_data->level[panel_type]);
346 }
347
348 /* Try to find sdvo panel data */
349 static void
350 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
351 struct bdb_header *bdb)
352 {
353 struct lvds_dvo_timing *dvo_timing;
354 struct drm_display_mode *panel_fixed_mode;
355 int index;
356
357 index = i915.vbt_sdvo_panel_type;
358 if (index == -2) {
359 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
360 return;
361 }
362
363 if (index == -1) {
364 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
365
366 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
367 if (!sdvo_lvds_options)
368 return;
369
370 index = sdvo_lvds_options->panel_type;
371 }
372
373 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
374 if (!dvo_timing)
375 return;
376
377 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
378 if (!panel_fixed_mode)
379 return;
380
381 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
382
383 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
384
385 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
386 drm_mode_debug_printmodeline(panel_fixed_mode);
387 }
388
389 static int intel_bios_ssc_frequency(struct drm_device *dev,
390 bool alternate)
391 {
392 switch (INTEL_INFO(dev)->gen) {
393 case 2:
394 return alternate ? 66667 : 48000;
395 case 3:
396 case 4:
397 return alternate ? 100000 : 96000;
398 default:
399 return alternate ? 100000 : 120000;
400 }
401 }
402
403 static void
404 parse_general_features(struct drm_i915_private *dev_priv,
405 struct bdb_header *bdb)
406 {
407 struct drm_device *dev = dev_priv->dev;
408 struct bdb_general_features *general;
409
410 general = find_section(bdb, BDB_GENERAL_FEATURES);
411 if (general) {
412 dev_priv->vbt.int_tv_support = general->int_tv_support;
413 dev_priv->vbt.int_crt_support = general->int_crt_support;
414 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
415 dev_priv->vbt.lvds_ssc_freq =
416 intel_bios_ssc_frequency(dev, general->ssc_freq);
417 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
418 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
419 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
420 dev_priv->vbt.int_tv_support,
421 dev_priv->vbt.int_crt_support,
422 dev_priv->vbt.lvds_use_ssc,
423 dev_priv->vbt.lvds_ssc_freq,
424 dev_priv->vbt.display_clock_mode,
425 dev_priv->vbt.fdi_rx_polarity_inverted);
426 }
427 }
428
429 static void
430 parse_general_definitions(struct drm_i915_private *dev_priv,
431 struct bdb_header *bdb)
432 {
433 struct bdb_general_definitions *general;
434
435 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
436 if (general) {
437 u16 block_size = get_blocksize(general);
438 if (block_size >= sizeof(*general)) {
439 int bus_pin = general->crt_ddc_gmbus_pin;
440 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
441 if (intel_gmbus_is_port_valid(bus_pin))
442 dev_priv->vbt.crt_ddc_pin = bus_pin;
443 } else {
444 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
445 block_size);
446 }
447 }
448 }
449
450 static void
451 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
452 struct bdb_header *bdb)
453 {
454 struct sdvo_device_mapping *p_mapping;
455 struct bdb_general_definitions *p_defs;
456 union child_device_config *p_child;
457 int i, child_device_num, count;
458 u16 block_size;
459
460 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
461 if (!p_defs) {
462 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
463 return;
464 }
465 /* judge whether the size of child device meets the requirements.
466 * If the child device size obtained from general definition block
467 * is different with sizeof(struct child_device_config), skip the
468 * parsing of sdvo device info
469 */
470 if (p_defs->child_dev_size != sizeof(*p_child)) {
471 /* different child dev size . Ignore it */
472 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
473 return;
474 }
475 /* get the block size of general definitions */
476 block_size = get_blocksize(p_defs);
477 /* get the number of child device */
478 child_device_num = (block_size - sizeof(*p_defs)) /
479 sizeof(*p_child);
480 count = 0;
481 for (i = 0; i < child_device_num; i++) {
482 p_child = &(p_defs->devices[i]);
483 if (!p_child->old.device_type) {
484 /* skip the device block if device type is invalid */
485 continue;
486 }
487 if (p_child->old.slave_addr != SLAVE_ADDR1 &&
488 p_child->old.slave_addr != SLAVE_ADDR2) {
489 /*
490 * If the slave address is neither 0x70 nor 0x72,
491 * it is not a SDVO device. Skip it.
492 */
493 continue;
494 }
495 if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
496 p_child->old.dvo_port != DEVICE_PORT_DVOC) {
497 /* skip the incorrect SDVO port */
498 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
499 continue;
500 }
501 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
502 " %s port\n",
503 p_child->old.slave_addr,
504 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
505 "SDVOB" : "SDVOC");
506 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
507 if (!p_mapping->initialized) {
508 p_mapping->dvo_port = p_child->old.dvo_port;
509 p_mapping->slave_addr = p_child->old.slave_addr;
510 p_mapping->dvo_wiring = p_child->old.dvo_wiring;
511 p_mapping->ddc_pin = p_child->old.ddc_pin;
512 p_mapping->i2c_pin = p_child->old.i2c_pin;
513 p_mapping->initialized = 1;
514 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
515 p_mapping->dvo_port,
516 p_mapping->slave_addr,
517 p_mapping->dvo_wiring,
518 p_mapping->ddc_pin,
519 p_mapping->i2c_pin);
520 } else {
521 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
522 "two SDVO device.\n");
523 }
524 if (p_child->old.slave2_addr) {
525 /* Maybe this is a SDVO device with multiple inputs */
526 /* And the mapping info is not added */
527 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
528 " is a SDVO device with multiple inputs.\n");
529 }
530 count++;
531 }
532
533 if (!count) {
534 /* No SDVO device info is found */
535 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
536 }
537 return;
538 }
539
540 static void
541 parse_driver_features(struct drm_i915_private *dev_priv,
542 struct bdb_header *bdb)
543 {
544 struct bdb_driver_features *driver;
545
546 driver = find_section(bdb, BDB_DRIVER_FEATURES);
547 if (!driver)
548 return;
549
550 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
551 dev_priv->vbt.edp_support = 1;
552
553 if (driver->dual_frequency)
554 dev_priv->render_reclock_avail = true;
555
556 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
557 /*
558 * If DRRS is not supported, drrs_type has to be set to 0.
559 * This is because, VBT is configured in such a way that
560 * static DRRS is 0 and DRRS not supported is represented by
561 * driver->drrs_enabled=false
562 */
563 if (!driver->drrs_enabled)
564 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
565 }
566
567 static void
568 parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
569 {
570 struct bdb_edp *edp;
571 struct edp_power_seq *edp_pps;
572 struct edp_link_params *edp_link_params;
573
574 edp = find_section(bdb, BDB_EDP);
575 if (!edp) {
576 if (dev_priv->vbt.edp_support)
577 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
578 return;
579 }
580
581 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
582 case EDP_18BPP:
583 dev_priv->vbt.edp_bpp = 18;
584 break;
585 case EDP_24BPP:
586 dev_priv->vbt.edp_bpp = 24;
587 break;
588 case EDP_30BPP:
589 dev_priv->vbt.edp_bpp = 30;
590 break;
591 }
592
593 /* Get the eDP sequencing and link info */
594 edp_pps = &edp->power_seqs[panel_type];
595 edp_link_params = &edp->link_params[panel_type];
596
597 dev_priv->vbt.edp_pps = *edp_pps;
598
599 switch (edp_link_params->rate) {
600 case EDP_RATE_1_62:
601 dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
602 break;
603 case EDP_RATE_2_7:
604 dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
605 break;
606 default:
607 DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
608 edp_link_params->rate);
609 break;
610 }
611
612 switch (edp_link_params->lanes) {
613 case EDP_LANE_1:
614 dev_priv->vbt.edp_lanes = 1;
615 break;
616 case EDP_LANE_2:
617 dev_priv->vbt.edp_lanes = 2;
618 break;
619 case EDP_LANE_4:
620 dev_priv->vbt.edp_lanes = 4;
621 break;
622 default:
623 DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
624 edp_link_params->lanes);
625 break;
626 }
627
628 switch (edp_link_params->preemphasis) {
629 case EDP_PREEMPHASIS_NONE:
630 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
631 break;
632 case EDP_PREEMPHASIS_3_5dB:
633 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
634 break;
635 case EDP_PREEMPHASIS_6dB:
636 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
637 break;
638 case EDP_PREEMPHASIS_9_5dB:
639 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
640 break;
641 default:
642 DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
643 edp_link_params->preemphasis);
644 break;
645 }
646
647 switch (edp_link_params->vswing) {
648 case EDP_VSWING_0_4V:
649 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
650 break;
651 case EDP_VSWING_0_6V:
652 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
653 break;
654 case EDP_VSWING_0_8V:
655 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
656 break;
657 case EDP_VSWING_1_2V:
658 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
659 break;
660 default:
661 DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
662 edp_link_params->vswing);
663 break;
664 }
665 }
666
667 static void
668 parse_psr(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
669 {
670 struct bdb_psr *psr;
671 struct psr_table *psr_table;
672
673 psr = find_section(bdb, BDB_PSR);
674 if (!psr) {
675 DRM_DEBUG_KMS("No PSR BDB found.\n");
676 return;
677 }
678
679 psr_table = &psr->psr_table[panel_type];
680
681 dev_priv->vbt.psr.full_link = psr_table->full_link;
682 dev_priv->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
683
684 /* Allowed VBT values goes from 0 to 15 */
685 dev_priv->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
686 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
687
688 switch (psr_table->lines_to_wait) {
689 case 0:
690 dev_priv->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;
691 break;
692 case 1:
693 dev_priv->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;
694 break;
695 case 2:
696 dev_priv->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;
697 break;
698 case 3:
699 dev_priv->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;
700 break;
701 default:
702 DRM_DEBUG_KMS("VBT has unknown PSR lines to wait %u\n",
703 psr_table->lines_to_wait);
704 break;
705 }
706
707 dev_priv->vbt.psr.tp1_wakeup_time = psr_table->tp1_wakeup_time;
708 dev_priv->vbt.psr.tp2_tp3_wakeup_time = psr_table->tp2_tp3_wakeup_time;
709 }
710
711 static u8 *goto_next_sequence(u8 *data, int *size)
712 {
713 u16 len;
714 int tmp = *size;
715
716 if (--tmp < 0)
717 return NULL;
718
719 /* goto first element */
720 data++;
721 while (1) {
722 switch (*data) {
723 case MIPI_SEQ_ELEM_SEND_PKT:
724 /*
725 * skip by this element payload size
726 * skip elem id, command flag and data type
727 */
728 tmp -= 5;
729 if (tmp < 0)
730 return NULL;
731
732 data += 3;
733 len = *((u16 *)data);
734
735 tmp -= len;
736 if (tmp < 0)
737 return NULL;
738
739 /* skip by len */
740 data = data + 2 + len;
741 break;
742 case MIPI_SEQ_ELEM_DELAY:
743 /* skip by elem id, and delay is 4 bytes */
744 tmp -= 5;
745 if (tmp < 0)
746 return NULL;
747
748 data += 5;
749 break;
750 case MIPI_SEQ_ELEM_GPIO:
751 tmp -= 3;
752 if (tmp < 0)
753 return NULL;
754
755 data += 3;
756 break;
757 default:
758 DRM_ERROR("Unknown element\n");
759 return NULL;
760 }
761
762 /* end of sequence ? */
763 if (*data == 0)
764 break;
765 }
766
767 /* goto next sequence or end of block byte */
768 if (--tmp < 0)
769 return NULL;
770
771 data++;
772
773 /* update amount of data left for the sequence block to be parsed */
774 *size = tmp;
775 return data;
776 }
777
778 static void
779 parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
780 {
781 struct bdb_mipi_config *start;
782 struct bdb_mipi_sequence *sequence;
783 struct mipi_config *config;
784 struct mipi_pps_data *pps;
785 u8 *data, *seq_data;
786 int i, panel_id, seq_size;
787 u16 block_size;
788
789 /* parse MIPI blocks only if LFP type is MIPI */
790 if (!dev_priv->vbt.has_mipi)
791 return;
792
793 /* Initialize this to undefined indicating no generic MIPI support */
794 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
795
796 /* Block #40 is already parsed and panel_fixed_mode is
797 * stored in dev_priv->lfp_lvds_vbt_mode
798 * resuse this when needed
799 */
800
801 /* Parse #52 for panel index used from panel_type already
802 * parsed
803 */
804 start = find_section(bdb, BDB_MIPI_CONFIG);
805 if (!start) {
806 DRM_DEBUG_KMS("No MIPI config BDB found");
807 return;
808 }
809
810 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
811 panel_type);
812
813 /*
814 * get hold of the correct configuration block and pps data as per
815 * the panel_type as index
816 */
817 config = &start->config[panel_type];
818 pps = &start->pps[panel_type];
819
820 /* store as of now full data. Trim when we realise all is not needed */
821 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
822 if (!dev_priv->vbt.dsi.config)
823 return;
824
825 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
826 if (!dev_priv->vbt.dsi.pps) {
827 kfree(dev_priv->vbt.dsi.config);
828 return;
829 }
830
831 /* We have mandatory mipi config blocks. Initialize as generic panel */
832 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
833
834 /* Check if we have sequence block as well */
835 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
836 if (!sequence) {
837 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
838 return;
839 }
840
841 DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
842
843 block_size = get_blocksize(sequence);
844
845 /*
846 * parse the sequence block for individual sequences
847 */
848 dev_priv->vbt.dsi.seq_version = sequence->version;
849
850 seq_data = &sequence->data[0];
851
852 /*
853 * sequence block is variable length and hence we need to parse and
854 * get the sequence data for specific panel id
855 */
856 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
857 panel_id = *seq_data;
858 seq_size = *((u16 *) (seq_data + 1));
859 if (panel_id == panel_type)
860 break;
861
862 /* skip the sequence including seq header of 3 bytes */
863 seq_data = seq_data + 3 + seq_size;
864 if ((seq_data - &sequence->data[0]) > block_size) {
865 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
866 return;
867 }
868 }
869
870 if (i == MAX_MIPI_CONFIGURATIONS) {
871 DRM_ERROR("Sequence block detected but no valid configuration\n");
872 return;
873 }
874
875 /* check if found sequence is completely within the sequence block
876 * just being paranoid */
877 if (seq_size > block_size) {
878 DRM_ERROR("Corrupted sequence/size, bailing out\n");
879 return;
880 }
881
882 /* skip the panel id(1 byte) and seq size(2 bytes) */
883 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
884 if (!dev_priv->vbt.dsi.data)
885 return;
886
887 /*
888 * loop into the sequence data and split into multiple sequneces
889 * There are only 5 types of sequences as of now
890 */
891 data = dev_priv->vbt.dsi.data;
892 dev_priv->vbt.dsi.size = seq_size;
893
894 /* two consecutive 0x00 indicate end of all sequences */
895 while (1) {
896 int seq_id = *data;
897 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
898 dev_priv->vbt.dsi.sequence[seq_id] = data;
899 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
900 } else {
901 DRM_ERROR("undefined sequence\n");
902 goto err;
903 }
904
905 /* partial parsing to skip elements */
906 data = goto_next_sequence(data, &seq_size);
907
908 if (data == NULL) {
909 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
910 goto err;
911 }
912
913 if (*data == 0)
914 break; /* end of sequence reached */
915 }
916
917 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
918 return;
919 err:
920 kfree(dev_priv->vbt.dsi.data);
921 dev_priv->vbt.dsi.data = NULL;
922
923 /* error during parsing so set all pointers to null
924 * because of partial parsing */
925 memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
926 }
927
928 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
929 struct bdb_header *bdb)
930 {
931 union child_device_config *it, *child = NULL;
932 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
933 uint8_t hdmi_level_shift;
934 int i, j;
935 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
936 uint8_t aux_channel;
937 /* Each DDI port can have more than one value on the "DVO Port" field,
938 * so look for all the possible values for each port and abort if more
939 * than one is found. */
940 int dvo_ports[][2] = {
941 {DVO_PORT_HDMIA, DVO_PORT_DPA},
942 {DVO_PORT_HDMIB, DVO_PORT_DPB},
943 {DVO_PORT_HDMIC, DVO_PORT_DPC},
944 {DVO_PORT_HDMID, DVO_PORT_DPD},
945 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
946 };
947
948 /* Find the child device to use, abort if more than one found. */
949 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
950 it = dev_priv->vbt.child_dev + i;
951
952 for (j = 0; j < 2; j++) {
953 if (dvo_ports[port][j] == -1)
954 break;
955
956 if (it->common.dvo_port == dvo_ports[port][j]) {
957 if (child) {
958 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
959 port_name(port));
960 return;
961 }
962 child = it;
963 }
964 }
965 }
966 if (!child)
967 return;
968
969 aux_channel = child->raw[25];
970
971 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
972 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
973 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
974 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
975 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
976
977 info->supports_dvi = is_dvi;
978 info->supports_hdmi = is_hdmi;
979 info->supports_dp = is_dp;
980
981 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
982 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
983
984 if (is_edp && is_dvi)
985 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
986 port_name(port));
987 if (is_crt && port != PORT_E)
988 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
989 if (is_crt && (is_dvi || is_dp))
990 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
991 port_name(port));
992 if (is_dvi && (port == PORT_A || port == PORT_E))
993 DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
994 if (!is_dvi && !is_dp && !is_crt)
995 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
996 port_name(port));
997 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
998 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
999
1000 if (is_dvi) {
1001 if (child->common.ddc_pin == 0x05 && port != PORT_B)
1002 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
1003 if (child->common.ddc_pin == 0x04 && port != PORT_C)
1004 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
1005 if (child->common.ddc_pin == 0x06 && port != PORT_D)
1006 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
1007 }
1008
1009 if (is_dp) {
1010 if (aux_channel == 0x40 && port != PORT_A)
1011 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
1012 if (aux_channel == 0x10 && port != PORT_B)
1013 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
1014 if (aux_channel == 0x20 && port != PORT_C)
1015 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
1016 if (aux_channel == 0x30 && port != PORT_D)
1017 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
1018 }
1019
1020 if (bdb->version >= 158) {
1021 /* The VBT HDMI level shift values match the table we have. */
1022 hdmi_level_shift = child->raw[7] & 0xF;
1023 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
1024 port_name(port),
1025 hdmi_level_shift);
1026 info->hdmi_level_shift = hdmi_level_shift;
1027 }
1028 }
1029
1030 static void parse_ddi_ports(struct drm_i915_private *dev_priv,
1031 struct bdb_header *bdb)
1032 {
1033 struct drm_device *dev = dev_priv->dev;
1034 enum port port;
1035
1036 if (!HAS_DDI(dev))
1037 return;
1038
1039 if (!dev_priv->vbt.child_dev_num)
1040 return;
1041
1042 if (bdb->version < 155)
1043 return;
1044
1045 for (port = PORT_A; port < I915_MAX_PORTS; port++)
1046 parse_ddi_port(dev_priv, port, bdb);
1047 }
1048
1049 static void
1050 parse_device_mapping(struct drm_i915_private *dev_priv,
1051 struct bdb_header *bdb)
1052 {
1053 struct bdb_general_definitions *p_defs;
1054 union child_device_config *p_child, *child_dev_ptr;
1055 int i, child_device_num, count;
1056 u16 block_size;
1057
1058 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
1059 if (!p_defs) {
1060 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
1061 return;
1062 }
1063 /* judge whether the size of child device meets the requirements.
1064 * If the child device size obtained from general definition block
1065 * is different with sizeof(struct child_device_config), skip the
1066 * parsing of sdvo device info
1067 */
1068 if (p_defs->child_dev_size != sizeof(*p_child)) {
1069 /* different child dev size . Ignore it */
1070 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
1071 return;
1072 }
1073 /* get the block size of general definitions */
1074 block_size = get_blocksize(p_defs);
1075 /* get the number of child device */
1076 child_device_num = (block_size - sizeof(*p_defs)) /
1077 sizeof(*p_child);
1078 count = 0;
1079 /* get the number of child device that is present */
1080 for (i = 0; i < child_device_num; i++) {
1081 p_child = &(p_defs->devices[i]);
1082 if (!p_child->common.device_type) {
1083 /* skip the device block if device type is invalid */
1084 continue;
1085 }
1086 count++;
1087 }
1088 if (!count) {
1089 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1090 return;
1091 }
1092 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1093 if (!dev_priv->vbt.child_dev) {
1094 DRM_DEBUG_KMS("No memory space for child device\n");
1095 return;
1096 }
1097
1098 dev_priv->vbt.child_dev_num = count;
1099 count = 0;
1100 for (i = 0; i < child_device_num; i++) {
1101 p_child = &(p_defs->devices[i]);
1102 if (!p_child->common.device_type) {
1103 /* skip the device block if device type is invalid */
1104 continue;
1105 }
1106
1107 if (p_child->common.dvo_port >= DVO_PORT_MIPIA
1108 && p_child->common.dvo_port <= DVO_PORT_MIPID
1109 &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
1110 DRM_DEBUG_KMS("Found MIPI as LFP\n");
1111 dev_priv->vbt.has_mipi = 1;
1112 dev_priv->vbt.dsi.port = p_child->common.dvo_port;
1113 }
1114
1115 child_dev_ptr = dev_priv->vbt.child_dev + count;
1116 count++;
1117 memcpy((void *)child_dev_ptr, (void *)p_child,
1118 sizeof(*p_child));
1119 }
1120 return;
1121 }
1122
1123 static void
1124 init_vbt_defaults(struct drm_i915_private *dev_priv)
1125 {
1126 struct drm_device *dev = dev_priv->dev;
1127 enum port port;
1128
1129 dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
1130
1131 /* Default to having backlight */
1132 dev_priv->vbt.backlight.present = true;
1133
1134 /* LFP panel data */
1135 dev_priv->vbt.lvds_dither = 1;
1136 dev_priv->vbt.lvds_vbt = 0;
1137
1138 /* SDVO panel data */
1139 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1140
1141 /* general features */
1142 dev_priv->vbt.int_tv_support = 1;
1143 dev_priv->vbt.int_crt_support = 1;
1144
1145 /* Default to using SSC */
1146 dev_priv->vbt.lvds_use_ssc = 1;
1147 /*
1148 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1149 * clock for LVDS.
1150 */
1151 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
1152 !HAS_PCH_SPLIT(dev));
1153 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1154
1155 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1156 struct ddi_vbt_port_info *info =
1157 &dev_priv->vbt.ddi_port_info[port];
1158
1159 info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
1160
1161 info->supports_dvi = (port != PORT_A && port != PORT_E);
1162 info->supports_hdmi = info->supports_dvi;
1163 info->supports_dp = (port != PORT_E);
1164 }
1165 }
1166
1167 static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
1168 {
1169 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
1170 "VBIOS ROM for %s\n",
1171 id->ident);
1172 return 1;
1173 }
1174
1175 static const struct dmi_system_id intel_no_opregion_vbt[] = {
1176 {
1177 .callback = intel_no_opregion_vbt_callback,
1178 .ident = "ThinkCentre A57",
1179 .matches = {
1180 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1181 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
1182 },
1183 },
1184 { }
1185 };
1186
1187 static struct bdb_header *validate_vbt(char *base, size_t size,
1188 struct vbt_header *vbt,
1189 const char *source)
1190 {
1191 size_t offset;
1192 struct bdb_header *bdb;
1193
1194 if (vbt == NULL) {
1195 DRM_DEBUG_DRIVER("VBT signature missing\n");
1196 return NULL;
1197 }
1198
1199 offset = (char *)vbt - base;
1200 if (offset + sizeof(struct vbt_header) > size) {
1201 DRM_DEBUG_DRIVER("VBT header incomplete\n");
1202 return NULL;
1203 }
1204
1205 if (memcmp(vbt->signature, "$VBT", 4)) {
1206 DRM_DEBUG_DRIVER("VBT invalid signature\n");
1207 return NULL;
1208 }
1209
1210 offset += vbt->bdb_offset;
1211 if (offset + sizeof(struct bdb_header) > size) {
1212 DRM_DEBUG_DRIVER("BDB header incomplete\n");
1213 return NULL;
1214 }
1215
1216 bdb = (struct bdb_header *)(base + offset);
1217 if (offset + bdb->bdb_size > size) {
1218 DRM_DEBUG_DRIVER("BDB incomplete\n");
1219 return NULL;
1220 }
1221
1222 DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
1223 source, vbt->signature);
1224 return bdb;
1225 }
1226
1227 /**
1228 * intel_parse_bios - find VBT and initialize settings from the BIOS
1229 * @dev: DRM device
1230 *
1231 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1232 * to appropriate values.
1233 *
1234 * Returns 0 on success, nonzero on failure.
1235 */
1236 int
1237 intel_parse_bios(struct drm_device *dev)
1238 {
1239 struct drm_i915_private *dev_priv = dev->dev_private;
1240 struct pci_dev *pdev = dev->pdev;
1241 struct bdb_header *bdb = NULL;
1242 u8 __iomem *bios = NULL;
1243
1244 if (HAS_PCH_NOP(dev))
1245 return -ENODEV;
1246
1247 init_vbt_defaults(dev_priv);
1248
1249 /* XXX Should this validation be moved to intel_opregion.c? */
1250 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
1251 bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE,
1252 (struct vbt_header *)dev_priv->opregion.vbt,
1253 "OpRegion");
1254
1255 if (bdb == NULL) {
1256 size_t i, size;
1257
1258 bios = pci_map_rom(pdev, &size);
1259 if (!bios)
1260 return -1;
1261
1262 /* Scour memory looking for the VBT signature */
1263 for (i = 0; i + 4 < size; i++) {
1264 if (memcmp(bios + i, "$VBT", 4) == 0) {
1265 bdb = validate_vbt(bios, size,
1266 (struct vbt_header *)(bios + i),
1267 "PCI ROM");
1268 break;
1269 }
1270 }
1271
1272 if (!bdb) {
1273 pci_unmap_rom(pdev, bios);
1274 return -1;
1275 }
1276 }
1277
1278 /* Grab useful general definitions */
1279 parse_general_features(dev_priv, bdb);
1280 parse_general_definitions(dev_priv, bdb);
1281 parse_lfp_panel_data(dev_priv, bdb);
1282 parse_lfp_backlight(dev_priv, bdb);
1283 parse_sdvo_panel_data(dev_priv, bdb);
1284 parse_sdvo_device_mapping(dev_priv, bdb);
1285 parse_device_mapping(dev_priv, bdb);
1286 parse_driver_features(dev_priv, bdb);
1287 parse_edp(dev_priv, bdb);
1288 parse_psr(dev_priv, bdb);
1289 parse_mipi(dev_priv, bdb);
1290 parse_ddi_ports(dev_priv, bdb);
1291
1292 if (bios)
1293 pci_unmap_rom(pdev, bios);
1294
1295 return 0;
1296 }
1297
1298 /* Ensure that vital registers have been initialised, even if the BIOS
1299 * is absent or just failing to do its job.
1300 */
1301 void intel_setup_bios(struct drm_device *dev)
1302 {
1303 struct drm_i915_private *dev_priv = dev->dev_private;
1304
1305 /* Set the Panel Power On/Off timings if uninitialized. */
1306 if (!HAS_PCH_SPLIT(dev) &&
1307 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1308 /* Set T2 to 40ms and T5 to 200ms */
1309 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1310
1311 /* Set T3 to 35ms and Tx to 200ms */
1312 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
1313 }
1314 }