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drm/i915: Add some debug breadcrumbs to connector detection
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1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <drm/drmP.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
36 #include "i915_drv.h"
37
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
45
46 struct intel_crt {
47 struct intel_encoder base;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector *connector;
51 bool force_hotplug_required;
52 u32 adpa_reg;
53 };
54
55 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
56 {
57 return container_of(intel_attached_encoder(connector),
58 struct intel_crt, base);
59 }
60
61 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
62 {
63 return container_of(encoder, struct intel_crt, base);
64 }
65
66 static bool intel_crt_get_hw_state(struct intel_encoder *encoder,
67 enum pipe *pipe)
68 {
69 struct drm_device *dev = encoder->base.dev;
70 struct drm_i915_private *dev_priv = dev->dev_private;
71 struct intel_crt *crt = intel_encoder_to_crt(encoder);
72 u32 tmp;
73
74 tmp = I915_READ(crt->adpa_reg);
75
76 if (!(tmp & ADPA_DAC_ENABLE))
77 return false;
78
79 if (HAS_PCH_CPT(dev))
80 *pipe = PORT_TO_PIPE_CPT(tmp);
81 else
82 *pipe = PORT_TO_PIPE(tmp);
83
84 return true;
85 }
86
87 static void intel_crt_get_config(struct intel_encoder *encoder,
88 struct intel_crtc_config *pipe_config)
89 {
90 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
91 struct intel_crt *crt = intel_encoder_to_crt(encoder);
92 u32 tmp, flags = 0;
93
94 tmp = I915_READ(crt->adpa_reg);
95
96 if (tmp & ADPA_HSYNC_ACTIVE_HIGH)
97 flags |= DRM_MODE_FLAG_PHSYNC;
98 else
99 flags |= DRM_MODE_FLAG_NHSYNC;
100
101 if (tmp & ADPA_VSYNC_ACTIVE_HIGH)
102 flags |= DRM_MODE_FLAG_PVSYNC;
103 else
104 flags |= DRM_MODE_FLAG_NVSYNC;
105
106 pipe_config->adjusted_mode.flags |= flags;
107 }
108
109 /* Note: The caller is required to filter out dpms modes not supported by the
110 * platform. */
111 static void intel_crt_set_dpms(struct intel_encoder *encoder, int mode)
112 {
113 struct drm_device *dev = encoder->base.dev;
114 struct drm_i915_private *dev_priv = dev->dev_private;
115 struct intel_crt *crt = intel_encoder_to_crt(encoder);
116 u32 temp;
117
118 temp = I915_READ(crt->adpa_reg);
119 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
120 temp &= ~ADPA_DAC_ENABLE;
121
122 switch (mode) {
123 case DRM_MODE_DPMS_ON:
124 temp |= ADPA_DAC_ENABLE;
125 break;
126 case DRM_MODE_DPMS_STANDBY:
127 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
128 break;
129 case DRM_MODE_DPMS_SUSPEND:
130 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
131 break;
132 case DRM_MODE_DPMS_OFF:
133 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
134 break;
135 }
136
137 I915_WRITE(crt->adpa_reg, temp);
138 }
139
140 static void intel_disable_crt(struct intel_encoder *encoder)
141 {
142 intel_crt_set_dpms(encoder, DRM_MODE_DPMS_OFF);
143 }
144
145 static void intel_enable_crt(struct intel_encoder *encoder)
146 {
147 struct intel_crt *crt = intel_encoder_to_crt(encoder);
148
149 intel_crt_set_dpms(encoder, crt->connector->base.dpms);
150 }
151
152 /* Special dpms function to support cloning between dvo/sdvo/crt. */
153 static void intel_crt_dpms(struct drm_connector *connector, int mode)
154 {
155 struct drm_device *dev = connector->dev;
156 struct intel_encoder *encoder = intel_attached_encoder(connector);
157 struct drm_crtc *crtc;
158 int old_dpms;
159
160 /* PCH platforms and VLV only support on/off. */
161 if (INTEL_INFO(dev)->gen >= 5 && mode != DRM_MODE_DPMS_ON)
162 mode = DRM_MODE_DPMS_OFF;
163
164 if (mode == connector->dpms)
165 return;
166
167 old_dpms = connector->dpms;
168 connector->dpms = mode;
169
170 /* Only need to change hw state when actually enabled */
171 crtc = encoder->base.crtc;
172 if (!crtc) {
173 encoder->connectors_active = false;
174 return;
175 }
176
177 /* We need the pipe to run for anything but OFF. */
178 if (mode == DRM_MODE_DPMS_OFF)
179 encoder->connectors_active = false;
180 else
181 encoder->connectors_active = true;
182
183 /* We call connector dpms manually below in case pipe dpms doesn't
184 * change due to cloning. */
185 if (mode < old_dpms) {
186 /* From off to on, enable the pipe first. */
187 intel_crtc_update_dpms(crtc);
188
189 intel_crt_set_dpms(encoder, mode);
190 } else {
191 intel_crt_set_dpms(encoder, mode);
192
193 intel_crtc_update_dpms(crtc);
194 }
195
196 intel_modeset_check_state(connector->dev);
197 }
198
199 static int intel_crt_mode_valid(struct drm_connector *connector,
200 struct drm_display_mode *mode)
201 {
202 struct drm_device *dev = connector->dev;
203
204 int max_clock = 0;
205 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
206 return MODE_NO_DBLESCAN;
207
208 if (mode->clock < 25000)
209 return MODE_CLOCK_LOW;
210
211 if (IS_GEN2(dev))
212 max_clock = 350000;
213 else
214 max_clock = 400000;
215 if (mode->clock > max_clock)
216 return MODE_CLOCK_HIGH;
217
218 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
219 if (HAS_PCH_LPT(dev) &&
220 (ironlake_get_lanes_required(mode->clock, 270000, 24) > 2))
221 return MODE_CLOCK_HIGH;
222
223 return MODE_OK;
224 }
225
226 static bool intel_crt_compute_config(struct intel_encoder *encoder,
227 struct intel_crtc_config *pipe_config)
228 {
229 struct drm_device *dev = encoder->base.dev;
230
231 if (HAS_PCH_SPLIT(dev))
232 pipe_config->has_pch_encoder = true;
233
234 /* LPT FDI RX only supports 8bpc. */
235 if (HAS_PCH_LPT(dev))
236 pipe_config->pipe_bpp = 24;
237
238 return true;
239 }
240
241 static void intel_crt_mode_set(struct drm_encoder *encoder,
242 struct drm_display_mode *mode,
243 struct drm_display_mode *adjusted_mode)
244 {
245
246 struct drm_device *dev = encoder->dev;
247 struct drm_crtc *crtc = encoder->crtc;
248 struct intel_crt *crt =
249 intel_encoder_to_crt(to_intel_encoder(encoder));
250 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
251 struct drm_i915_private *dev_priv = dev->dev_private;
252 u32 adpa;
253
254 if (HAS_PCH_SPLIT(dev))
255 adpa = ADPA_HOTPLUG_BITS;
256 else
257 adpa = 0;
258
259 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
260 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
261 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
262 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
263
264 /* For CPT allow 3 pipe config, for others just use A or B */
265 if (HAS_PCH_LPT(dev))
266 ; /* Those bits don't exist here */
267 else if (HAS_PCH_CPT(dev))
268 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
269 else if (intel_crtc->pipe == 0)
270 adpa |= ADPA_PIPE_A_SELECT;
271 else
272 adpa |= ADPA_PIPE_B_SELECT;
273
274 if (!HAS_PCH_SPLIT(dev))
275 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
276
277 I915_WRITE(crt->adpa_reg, adpa);
278 }
279
280 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
281 {
282 struct drm_device *dev = connector->dev;
283 struct intel_crt *crt = intel_attached_crt(connector);
284 struct drm_i915_private *dev_priv = dev->dev_private;
285 u32 adpa;
286 bool ret;
287
288 /* The first time through, trigger an explicit detection cycle */
289 if (crt->force_hotplug_required) {
290 bool turn_off_dac = HAS_PCH_SPLIT(dev);
291 u32 save_adpa;
292
293 crt->force_hotplug_required = 0;
294
295 save_adpa = adpa = I915_READ(crt->adpa_reg);
296 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
297
298 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
299 if (turn_off_dac)
300 adpa &= ~ADPA_DAC_ENABLE;
301
302 I915_WRITE(crt->adpa_reg, adpa);
303
304 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
305 1000))
306 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
307
308 if (turn_off_dac) {
309 I915_WRITE(crt->adpa_reg, save_adpa);
310 POSTING_READ(crt->adpa_reg);
311 }
312 }
313
314 /* Check the status to see if both blue and green are on now */
315 adpa = I915_READ(crt->adpa_reg);
316 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
317 ret = true;
318 else
319 ret = false;
320 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
321
322 return ret;
323 }
324
325 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
326 {
327 struct drm_device *dev = connector->dev;
328 struct intel_crt *crt = intel_attached_crt(connector);
329 struct drm_i915_private *dev_priv = dev->dev_private;
330 u32 adpa;
331 bool ret;
332 u32 save_adpa;
333
334 save_adpa = adpa = I915_READ(crt->adpa_reg);
335 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
336
337 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
338
339 I915_WRITE(crt->adpa_reg, adpa);
340
341 if (wait_for((I915_READ(crt->adpa_reg) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
342 1000)) {
343 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
344 I915_WRITE(crt->adpa_reg, save_adpa);
345 }
346
347 /* Check the status to see if both blue and green are on now */
348 adpa = I915_READ(crt->adpa_reg);
349 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
350 ret = true;
351 else
352 ret = false;
353
354 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
355
356 /* FIXME: debug force function and remove */
357 ret = true;
358
359 return ret;
360 }
361
362 /**
363 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
364 *
365 * Not for i915G/i915GM
366 *
367 * \return true if CRT is connected.
368 * \return false if CRT is disconnected.
369 */
370 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
371 {
372 struct drm_device *dev = connector->dev;
373 struct drm_i915_private *dev_priv = dev->dev_private;
374 u32 hotplug_en, orig, stat;
375 bool ret = false;
376 int i, tries = 0;
377
378 if (HAS_PCH_SPLIT(dev))
379 return intel_ironlake_crt_detect_hotplug(connector);
380
381 if (IS_VALLEYVIEW(dev))
382 return valleyview_crt_detect_hotplug(connector);
383
384 /*
385 * On 4 series desktop, CRT detect sequence need to be done twice
386 * to get a reliable result.
387 */
388
389 if (IS_G4X(dev) && !IS_GM45(dev))
390 tries = 2;
391 else
392 tries = 1;
393 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
394 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
395
396 for (i = 0; i < tries ; i++) {
397 /* turn on the FORCE_DETECT */
398 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
399 /* wait for FORCE_DETECT to go off */
400 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
401 CRT_HOTPLUG_FORCE_DETECT) == 0,
402 1000))
403 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
404 }
405
406 stat = I915_READ(PORT_HOTPLUG_STAT);
407 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
408 ret = true;
409
410 /* clear the interrupt we just generated, if any */
411 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
412
413 /* and put the bits back */
414 I915_WRITE(PORT_HOTPLUG_EN, orig);
415
416 return ret;
417 }
418
419 static struct edid *intel_crt_get_edid(struct drm_connector *connector,
420 struct i2c_adapter *i2c)
421 {
422 struct edid *edid;
423
424 edid = drm_get_edid(connector, i2c);
425
426 if (!edid && !intel_gmbus_is_forced_bit(i2c)) {
427 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
428 intel_gmbus_force_bit(i2c, true);
429 edid = drm_get_edid(connector, i2c);
430 intel_gmbus_force_bit(i2c, false);
431 }
432
433 return edid;
434 }
435
436 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
437 static int intel_crt_ddc_get_modes(struct drm_connector *connector,
438 struct i2c_adapter *adapter)
439 {
440 struct edid *edid;
441 int ret;
442
443 edid = intel_crt_get_edid(connector, adapter);
444 if (!edid)
445 return 0;
446
447 ret = intel_connector_update_modes(connector, edid);
448 kfree(edid);
449
450 return ret;
451 }
452
453 static bool intel_crt_detect_ddc(struct drm_connector *connector)
454 {
455 struct intel_crt *crt = intel_attached_crt(connector);
456 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
457 struct edid *edid;
458 struct i2c_adapter *i2c;
459
460 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
461
462 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
463 edid = intel_crt_get_edid(connector, i2c);
464
465 if (edid) {
466 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
467
468 /*
469 * This may be a DVI-I connector with a shared DDC
470 * link between analog and digital outputs, so we
471 * have to check the EDID input spec of the attached device.
472 */
473 if (!is_digital) {
474 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
475 return true;
476 }
477
478 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
479 } else {
480 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
481 }
482
483 kfree(edid);
484
485 return false;
486 }
487
488 static enum drm_connector_status
489 intel_crt_load_detect(struct intel_crt *crt)
490 {
491 struct drm_device *dev = crt->base.base.dev;
492 struct drm_i915_private *dev_priv = dev->dev_private;
493 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
494 uint32_t save_bclrpat;
495 uint32_t save_vtotal;
496 uint32_t vtotal, vactive;
497 uint32_t vsample;
498 uint32_t vblank, vblank_start, vblank_end;
499 uint32_t dsl;
500 uint32_t bclrpat_reg;
501 uint32_t vtotal_reg;
502 uint32_t vblank_reg;
503 uint32_t vsync_reg;
504 uint32_t pipeconf_reg;
505 uint32_t pipe_dsl_reg;
506 uint8_t st00;
507 enum drm_connector_status status;
508
509 DRM_DEBUG_KMS("starting load-detect on CRT\n");
510
511 bclrpat_reg = BCLRPAT(pipe);
512 vtotal_reg = VTOTAL(pipe);
513 vblank_reg = VBLANK(pipe);
514 vsync_reg = VSYNC(pipe);
515 pipeconf_reg = PIPECONF(pipe);
516 pipe_dsl_reg = PIPEDSL(pipe);
517
518 save_bclrpat = I915_READ(bclrpat_reg);
519 save_vtotal = I915_READ(vtotal_reg);
520 vblank = I915_READ(vblank_reg);
521
522 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
523 vactive = (save_vtotal & 0x7ff) + 1;
524
525 vblank_start = (vblank & 0xfff) + 1;
526 vblank_end = ((vblank >> 16) & 0xfff) + 1;
527
528 /* Set the border color to purple. */
529 I915_WRITE(bclrpat_reg, 0x500050);
530
531 if (!IS_GEN2(dev)) {
532 uint32_t pipeconf = I915_READ(pipeconf_reg);
533 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
534 POSTING_READ(pipeconf_reg);
535 /* Wait for next Vblank to substitue
536 * border color for Color info */
537 intel_wait_for_vblank(dev, pipe);
538 st00 = I915_READ8(VGA_MSR_WRITE);
539 status = ((st00 & (1 << 4)) != 0) ?
540 connector_status_connected :
541 connector_status_disconnected;
542
543 I915_WRITE(pipeconf_reg, pipeconf);
544 } else {
545 bool restore_vblank = false;
546 int count, detect;
547
548 /*
549 * If there isn't any border, add some.
550 * Yes, this will flicker
551 */
552 if (vblank_start <= vactive && vblank_end >= vtotal) {
553 uint32_t vsync = I915_READ(vsync_reg);
554 uint32_t vsync_start = (vsync & 0xffff) + 1;
555
556 vblank_start = vsync_start;
557 I915_WRITE(vblank_reg,
558 (vblank_start - 1) |
559 ((vblank_end - 1) << 16));
560 restore_vblank = true;
561 }
562 /* sample in the vertical border, selecting the larger one */
563 if (vblank_start - vactive >= vtotal - vblank_end)
564 vsample = (vblank_start + vactive) >> 1;
565 else
566 vsample = (vtotal + vblank_end) >> 1;
567
568 /*
569 * Wait for the border to be displayed
570 */
571 while (I915_READ(pipe_dsl_reg) >= vactive)
572 ;
573 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
574 ;
575 /*
576 * Watch ST00 for an entire scanline
577 */
578 detect = 0;
579 count = 0;
580 do {
581 count++;
582 /* Read the ST00 VGA status register */
583 st00 = I915_READ8(VGA_MSR_WRITE);
584 if (st00 & (1 << 4))
585 detect++;
586 } while ((I915_READ(pipe_dsl_reg) == dsl));
587
588 /* restore vblank if necessary */
589 if (restore_vblank)
590 I915_WRITE(vblank_reg, vblank);
591 /*
592 * If more than 3/4 of the scanline detected a monitor,
593 * then it is assumed to be present. This works even on i830,
594 * where there isn't any way to force the border color across
595 * the screen
596 */
597 status = detect * 4 > count * 3 ?
598 connector_status_connected :
599 connector_status_disconnected;
600 }
601
602 /* Restore previous settings */
603 I915_WRITE(bclrpat_reg, save_bclrpat);
604
605 return status;
606 }
607
608 static enum drm_connector_status
609 intel_crt_detect(struct drm_connector *connector, bool force)
610 {
611 struct drm_device *dev = connector->dev;
612 struct intel_crt *crt = intel_attached_crt(connector);
613 enum drm_connector_status status;
614 struct intel_load_detect_pipe tmp;
615
616 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
617 connector->base.id, drm_get_connector_name(connector),
618 force);
619
620 if (I915_HAS_HOTPLUG(dev)) {
621 /* We can not rely on the HPD pin always being correctly wired
622 * up, for example many KVM do not pass it through, and so
623 * only trust an assertion that the monitor is connected.
624 */
625 if (intel_crt_detect_hotplug(connector)) {
626 DRM_DEBUG_KMS("CRT detected via hotplug\n");
627 return connector_status_connected;
628 } else
629 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
630 }
631
632 if (intel_crt_detect_ddc(connector))
633 return connector_status_connected;
634
635 /* Load detection is broken on HPD capable machines. Whoever wants a
636 * broken monitor (without edid) to work behind a broken kvm (that fails
637 * to have the right resistors for HP detection) needs to fix this up.
638 * For now just bail out. */
639 if (I915_HAS_HOTPLUG(dev))
640 return connector_status_disconnected;
641
642 if (!force)
643 return connector->status;
644
645 /* for pre-945g platforms use load detect */
646 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
647 if (intel_crt_detect_ddc(connector))
648 status = connector_status_connected;
649 else
650 status = intel_crt_load_detect(crt);
651 intel_release_load_detect_pipe(connector, &tmp);
652 } else
653 status = connector_status_unknown;
654
655 return status;
656 }
657
658 static void intel_crt_destroy(struct drm_connector *connector)
659 {
660 drm_sysfs_connector_remove(connector);
661 drm_connector_cleanup(connector);
662 kfree(connector);
663 }
664
665 static int intel_crt_get_modes(struct drm_connector *connector)
666 {
667 struct drm_device *dev = connector->dev;
668 struct drm_i915_private *dev_priv = dev->dev_private;
669 int ret;
670 struct i2c_adapter *i2c;
671
672 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
673 ret = intel_crt_ddc_get_modes(connector, i2c);
674 if (ret || !IS_G4X(dev))
675 return ret;
676
677 /* Try to probe digital port for output in DVI-I -> VGA mode. */
678 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
679 return intel_crt_ddc_get_modes(connector, i2c);
680 }
681
682 static int intel_crt_set_property(struct drm_connector *connector,
683 struct drm_property *property,
684 uint64_t value)
685 {
686 return 0;
687 }
688
689 static void intel_crt_reset(struct drm_connector *connector)
690 {
691 struct drm_device *dev = connector->dev;
692 struct drm_i915_private *dev_priv = dev->dev_private;
693 struct intel_crt *crt = intel_attached_crt(connector);
694
695 if (HAS_PCH_SPLIT(dev)) {
696 u32 adpa;
697
698 adpa = I915_READ(crt->adpa_reg);
699 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
700 adpa |= ADPA_HOTPLUG_BITS;
701 I915_WRITE(crt->adpa_reg, adpa);
702 POSTING_READ(crt->adpa_reg);
703
704 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
705 crt->force_hotplug_required = 1;
706 }
707
708 }
709
710 /*
711 * Routines for controlling stuff on the analog port
712 */
713
714 static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
715 .mode_set = intel_crt_mode_set,
716 };
717
718 static const struct drm_connector_funcs intel_crt_connector_funcs = {
719 .reset = intel_crt_reset,
720 .dpms = intel_crt_dpms,
721 .detect = intel_crt_detect,
722 .fill_modes = drm_helper_probe_single_connector_modes,
723 .destroy = intel_crt_destroy,
724 .set_property = intel_crt_set_property,
725 };
726
727 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
728 .mode_valid = intel_crt_mode_valid,
729 .get_modes = intel_crt_get_modes,
730 .best_encoder = intel_best_encoder,
731 };
732
733 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
734 .destroy = intel_encoder_destroy,
735 };
736
737 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
738 {
739 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
740 return 1;
741 }
742
743 static const struct dmi_system_id intel_no_crt[] = {
744 {
745 .callback = intel_no_crt_dmi_callback,
746 .ident = "ACER ZGB",
747 .matches = {
748 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
749 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
750 },
751 },
752 { }
753 };
754
755 void intel_crt_init(struct drm_device *dev)
756 {
757 struct drm_connector *connector;
758 struct intel_crt *crt;
759 struct intel_connector *intel_connector;
760 struct drm_i915_private *dev_priv = dev->dev_private;
761
762 /* Skip machines without VGA that falsely report hotplug events */
763 if (dmi_check_system(intel_no_crt))
764 return;
765
766 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
767 if (!crt)
768 return;
769
770 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
771 if (!intel_connector) {
772 kfree(crt);
773 return;
774 }
775
776 connector = &intel_connector->base;
777 crt->connector = intel_connector;
778 drm_connector_init(dev, &intel_connector->base,
779 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
780
781 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
782 DRM_MODE_ENCODER_DAC);
783
784 intel_connector_attach_encoder(intel_connector, &crt->base);
785
786 crt->base.type = INTEL_OUTPUT_ANALOG;
787 crt->base.cloneable = true;
788 if (IS_I830(dev))
789 crt->base.crtc_mask = (1 << 0);
790 else
791 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
792
793 if (IS_GEN2(dev))
794 connector->interlace_allowed = 0;
795 else
796 connector->interlace_allowed = 1;
797 connector->doublescan_allowed = 0;
798
799 if (HAS_PCH_SPLIT(dev))
800 crt->adpa_reg = PCH_ADPA;
801 else if (IS_VALLEYVIEW(dev))
802 crt->adpa_reg = VLV_ADPA;
803 else
804 crt->adpa_reg = ADPA;
805
806 crt->base.compute_config = intel_crt_compute_config;
807 crt->base.disable = intel_disable_crt;
808 crt->base.enable = intel_enable_crt;
809 crt->base.get_config = intel_crt_get_config;
810 if (I915_HAS_HOTPLUG(dev))
811 crt->base.hpd_pin = HPD_CRT;
812 if (HAS_DDI(dev))
813 crt->base.get_hw_state = intel_ddi_get_hw_state;
814 else
815 crt->base.get_hw_state = intel_crt_get_hw_state;
816 intel_connector->get_hw_state = intel_connector_get_hw_state;
817
818 drm_encoder_helper_add(&crt->base.base, &crt_encoder_funcs);
819 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
820
821 drm_sysfs_connector_add(connector);
822
823 if (!I915_HAS_HOTPLUG(dev))
824 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
825
826 /*
827 * Configure the automatic hotplug detection stuff
828 */
829 crt->force_hotplug_required = 0;
830
831 /*
832 * TODO: find a proper way to discover whether we need to set the the
833 * polarity and link reversal bits or not, instead of relying on the
834 * BIOS.
835 */
836 if (HAS_PCH_LPT(dev)) {
837 u32 fdi_config = FDI_RX_POLARITY_REVERSED_LPT |
838 FDI_RX_LINK_REVERSAL_OVERRIDE;
839
840 dev_priv->fdi_rx_config = I915_READ(_FDI_RXA_CTL) & fdi_config;
841 }
842 }