2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_crtc.h>
32 #include <drm/drm_crtc_helper.h>
33 #include <drm/drm_edid.h>
34 #include "intel_drv.h"
35 #include <drm/i915_drm.h>
38 /* Here's the desired hotplug mode */
39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
40 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
41 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
42 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
43 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
44 ADPA_CRT_HOTPLUG_ENABLE)
47 struct intel_encoder base
;
48 /* DPMS state is stored in the connector, which we need in the
49 * encoder's enable/disable callbacks */
50 struct intel_connector
*connector
;
51 bool force_hotplug_required
;
55 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
57 return container_of(encoder
, struct intel_crt
, base
);
60 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
62 return intel_encoder_to_crt(intel_attached_encoder(connector
));
65 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
68 struct drm_device
*dev
= encoder
->base
.dev
;
69 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
70 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
71 enum intel_display_power_domain power_domain
;
74 power_domain
= intel_display_port_power_domain(encoder
);
75 if (!intel_display_power_enabled(dev_priv
, power_domain
))
78 tmp
= I915_READ(crt
->adpa_reg
);
80 if (!(tmp
& ADPA_DAC_ENABLE
))
84 *pipe
= PORT_TO_PIPE_CPT(tmp
);
86 *pipe
= PORT_TO_PIPE(tmp
);
91 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
93 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
94 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
97 tmp
= I915_READ(crt
->adpa_reg
);
99 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
100 flags
|= DRM_MODE_FLAG_PHSYNC
;
102 flags
|= DRM_MODE_FLAG_NHSYNC
;
104 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
105 flags
|= DRM_MODE_FLAG_PVSYNC
;
107 flags
|= DRM_MODE_FLAG_NVSYNC
;
112 static void intel_crt_get_config(struct intel_encoder
*encoder
,
113 struct intel_crtc_config
*pipe_config
)
115 struct drm_device
*dev
= encoder
->base
.dev
;
118 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
120 dotclock
= pipe_config
->port_clock
;
122 if (HAS_PCH_SPLIT(dev
))
123 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
125 pipe_config
->adjusted_mode
.crtc_clock
= dotclock
;
128 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
129 struct intel_crtc_config
*pipe_config
)
131 intel_ddi_get_config(encoder
, pipe_config
);
133 pipe_config
->adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
134 DRM_MODE_FLAG_NHSYNC
|
135 DRM_MODE_FLAG_PVSYNC
|
136 DRM_MODE_FLAG_NVSYNC
);
137 pipe_config
->adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
140 static void hsw_crt_pre_enable(struct intel_encoder
*encoder
)
142 struct drm_device
*dev
= encoder
->base
.dev
;
143 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
145 WARN(I915_READ(SPLL_CTL
) & SPLL_PLL_ENABLE
, "SPLL already enabled\n");
147 SPLL_PLL_ENABLE
| SPLL_PLL_FREQ_1350MHz
| SPLL_PLL_SSC
);
148 POSTING_READ(SPLL_CTL
);
152 /* Note: The caller is required to filter out dpms modes not supported by the
154 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
156 struct drm_device
*dev
= encoder
->base
.dev
;
157 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
158 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
159 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
160 struct drm_display_mode
*adjusted_mode
= &crtc
->config
.adjusted_mode
;
163 if (INTEL_INFO(dev
)->gen
>= 5)
164 adpa
= ADPA_HOTPLUG_BITS
;
168 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
169 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
170 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
171 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
173 /* For CPT allow 3 pipe config, for others just use A or B */
174 if (HAS_PCH_LPT(dev
))
175 ; /* Those bits don't exist here */
176 else if (HAS_PCH_CPT(dev
))
177 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
178 else if (crtc
->pipe
== 0)
179 adpa
|= ADPA_PIPE_A_SELECT
;
181 adpa
|= ADPA_PIPE_B_SELECT
;
183 if (!HAS_PCH_SPLIT(dev
))
184 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
187 case DRM_MODE_DPMS_ON
:
188 adpa
|= ADPA_DAC_ENABLE
;
190 case DRM_MODE_DPMS_STANDBY
:
191 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
193 case DRM_MODE_DPMS_SUSPEND
:
194 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
196 case DRM_MODE_DPMS_OFF
:
197 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
201 I915_WRITE(crt
->adpa_reg
, adpa
);
204 static void intel_disable_crt(struct intel_encoder
*encoder
)
206 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
210 static void hsw_crt_post_disable(struct intel_encoder
*encoder
)
212 struct drm_device
*dev
= encoder
->base
.dev
;
213 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
216 DRM_DEBUG_KMS("Disabling SPLL\n");
217 val
= I915_READ(SPLL_CTL
);
218 WARN_ON(!(val
& SPLL_PLL_ENABLE
));
219 I915_WRITE(SPLL_CTL
, val
& ~SPLL_PLL_ENABLE
);
220 POSTING_READ(SPLL_CTL
);
223 static void intel_enable_crt(struct intel_encoder
*encoder
)
225 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
227 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
230 /* Special dpms function to support cloning between dvo/sdvo/crt. */
231 static void intel_crt_dpms(struct drm_connector
*connector
, int mode
)
233 struct drm_device
*dev
= connector
->dev
;
234 struct intel_encoder
*encoder
= intel_attached_encoder(connector
);
235 struct drm_crtc
*crtc
;
238 /* PCH platforms and VLV only support on/off. */
239 if (INTEL_INFO(dev
)->gen
>= 5 && mode
!= DRM_MODE_DPMS_ON
)
240 mode
= DRM_MODE_DPMS_OFF
;
242 if (mode
== connector
->dpms
)
245 old_dpms
= connector
->dpms
;
246 connector
->dpms
= mode
;
248 /* Only need to change hw state when actually enabled */
249 crtc
= encoder
->base
.crtc
;
251 encoder
->connectors_active
= false;
255 /* We need the pipe to run for anything but OFF. */
256 if (mode
== DRM_MODE_DPMS_OFF
)
257 encoder
->connectors_active
= false;
259 encoder
->connectors_active
= true;
261 /* We call connector dpms manually below in case pipe dpms doesn't
262 * change due to cloning. */
263 if (mode
< old_dpms
) {
264 /* From off to on, enable the pipe first. */
265 intel_crtc_update_dpms(crtc
);
267 intel_crt_set_dpms(encoder
, mode
);
269 intel_crt_set_dpms(encoder
, mode
);
271 intel_crtc_update_dpms(crtc
);
274 intel_modeset_check_state(connector
->dev
);
277 static enum drm_mode_status
278 intel_crt_mode_valid(struct drm_connector
*connector
,
279 struct drm_display_mode
*mode
)
281 struct drm_device
*dev
= connector
->dev
;
284 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
285 return MODE_NO_DBLESCAN
;
287 if (mode
->clock
< 25000)
288 return MODE_CLOCK_LOW
;
294 if (mode
->clock
> max_clock
)
295 return MODE_CLOCK_HIGH
;
297 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
298 if (HAS_PCH_LPT(dev
) &&
299 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
300 return MODE_CLOCK_HIGH
;
305 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
306 struct intel_crtc_config
*pipe_config
)
308 struct drm_device
*dev
= encoder
->base
.dev
;
310 if (HAS_PCH_SPLIT(dev
))
311 pipe_config
->has_pch_encoder
= true;
313 /* LPT FDI RX only supports 8bpc. */
314 if (HAS_PCH_LPT(dev
))
315 pipe_config
->pipe_bpp
= 24;
317 /* FDI must always be 2.7 GHz */
319 pipe_config
->ddi_pll_sel
= PORT_CLK_SEL_SPLL
;
320 pipe_config
->port_clock
= 135000 * 2;
326 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
328 struct drm_device
*dev
= connector
->dev
;
329 struct intel_crt
*crt
= intel_attached_crt(connector
);
330 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
334 /* The first time through, trigger an explicit detection cycle */
335 if (crt
->force_hotplug_required
) {
336 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
339 crt
->force_hotplug_required
= 0;
341 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
342 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
344 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
346 adpa
&= ~ADPA_DAC_ENABLE
;
348 I915_WRITE(crt
->adpa_reg
, adpa
);
350 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
352 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
355 I915_WRITE(crt
->adpa_reg
, save_adpa
);
356 POSTING_READ(crt
->adpa_reg
);
360 /* Check the status to see if both blue and green are on now */
361 adpa
= I915_READ(crt
->adpa_reg
);
362 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
366 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
371 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
373 struct drm_device
*dev
= connector
->dev
;
374 struct intel_crt
*crt
= intel_attached_crt(connector
);
375 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
380 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
381 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
383 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
385 I915_WRITE(crt
->adpa_reg
, adpa
);
387 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
389 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
390 I915_WRITE(crt
->adpa_reg
, save_adpa
);
393 /* Check the status to see if both blue and green are on now */
394 adpa
= I915_READ(crt
->adpa_reg
);
395 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
400 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
406 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
408 * Not for i915G/i915GM
410 * \return true if CRT is connected.
411 * \return false if CRT is disconnected.
413 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
415 struct drm_device
*dev
= connector
->dev
;
416 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
417 u32 hotplug_en
, orig
, stat
;
421 if (HAS_PCH_SPLIT(dev
))
422 return intel_ironlake_crt_detect_hotplug(connector
);
424 if (IS_VALLEYVIEW(dev
))
425 return valleyview_crt_detect_hotplug(connector
);
428 * On 4 series desktop, CRT detect sequence need to be done twice
429 * to get a reliable result.
432 if (IS_G4X(dev
) && !IS_GM45(dev
))
436 hotplug_en
= orig
= I915_READ(PORT_HOTPLUG_EN
);
437 hotplug_en
|= CRT_HOTPLUG_FORCE_DETECT
;
439 for (i
= 0; i
< tries
; i
++) {
440 /* turn on the FORCE_DETECT */
441 I915_WRITE(PORT_HOTPLUG_EN
, hotplug_en
);
442 /* wait for FORCE_DETECT to go off */
443 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
444 CRT_HOTPLUG_FORCE_DETECT
) == 0,
446 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
449 stat
= I915_READ(PORT_HOTPLUG_STAT
);
450 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
453 /* clear the interrupt we just generated, if any */
454 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
456 /* and put the bits back */
457 I915_WRITE(PORT_HOTPLUG_EN
, orig
);
462 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
463 struct i2c_adapter
*i2c
)
467 edid
= drm_get_edid(connector
, i2c
);
469 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
470 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
471 intel_gmbus_force_bit(i2c
, true);
472 edid
= drm_get_edid(connector
, i2c
);
473 intel_gmbus_force_bit(i2c
, false);
479 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
480 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
481 struct i2c_adapter
*adapter
)
486 edid
= intel_crt_get_edid(connector
, adapter
);
490 ret
= intel_connector_update_modes(connector
, edid
);
496 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
498 struct intel_crt
*crt
= intel_attached_crt(connector
);
499 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
501 struct i2c_adapter
*i2c
;
503 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
505 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
506 edid
= intel_crt_get_edid(connector
, i2c
);
509 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
512 * This may be a DVI-I connector with a shared DDC
513 * link between analog and digital outputs, so we
514 * have to check the EDID input spec of the attached device.
517 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
521 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
523 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
531 static enum drm_connector_status
532 intel_crt_load_detect(struct intel_crt
*crt
)
534 struct drm_device
*dev
= crt
->base
.base
.dev
;
535 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
536 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
537 uint32_t save_bclrpat
;
538 uint32_t save_vtotal
;
539 uint32_t vtotal
, vactive
;
541 uint32_t vblank
, vblank_start
, vblank_end
;
543 uint32_t bclrpat_reg
;
547 uint32_t pipeconf_reg
;
548 uint32_t pipe_dsl_reg
;
550 enum drm_connector_status status
;
552 DRM_DEBUG_KMS("starting load-detect on CRT\n");
554 bclrpat_reg
= BCLRPAT(pipe
);
555 vtotal_reg
= VTOTAL(pipe
);
556 vblank_reg
= VBLANK(pipe
);
557 vsync_reg
= VSYNC(pipe
);
558 pipeconf_reg
= PIPECONF(pipe
);
559 pipe_dsl_reg
= PIPEDSL(pipe
);
561 save_bclrpat
= I915_READ(bclrpat_reg
);
562 save_vtotal
= I915_READ(vtotal_reg
);
563 vblank
= I915_READ(vblank_reg
);
565 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
566 vactive
= (save_vtotal
& 0x7ff) + 1;
568 vblank_start
= (vblank
& 0xfff) + 1;
569 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
571 /* Set the border color to purple. */
572 I915_WRITE(bclrpat_reg
, 0x500050);
575 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
576 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
577 POSTING_READ(pipeconf_reg
);
578 /* Wait for next Vblank to substitue
579 * border color for Color info */
580 intel_wait_for_vblank(dev
, pipe
);
581 st00
= I915_READ8(VGA_MSR_WRITE
);
582 status
= ((st00
& (1 << 4)) != 0) ?
583 connector_status_connected
:
584 connector_status_disconnected
;
586 I915_WRITE(pipeconf_reg
, pipeconf
);
588 bool restore_vblank
= false;
592 * If there isn't any border, add some.
593 * Yes, this will flicker
595 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
596 uint32_t vsync
= I915_READ(vsync_reg
);
597 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
599 vblank_start
= vsync_start
;
600 I915_WRITE(vblank_reg
,
602 ((vblank_end
- 1) << 16));
603 restore_vblank
= true;
605 /* sample in the vertical border, selecting the larger one */
606 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
607 vsample
= (vblank_start
+ vactive
) >> 1;
609 vsample
= (vtotal
+ vblank_end
) >> 1;
612 * Wait for the border to be displayed
614 while (I915_READ(pipe_dsl_reg
) >= vactive
)
616 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
619 * Watch ST00 for an entire scanline
625 /* Read the ST00 VGA status register */
626 st00
= I915_READ8(VGA_MSR_WRITE
);
629 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
631 /* restore vblank if necessary */
633 I915_WRITE(vblank_reg
, vblank
);
635 * If more than 3/4 of the scanline detected a monitor,
636 * then it is assumed to be present. This works even on i830,
637 * where there isn't any way to force the border color across
640 status
= detect
* 4 > count
* 3 ?
641 connector_status_connected
:
642 connector_status_disconnected
;
645 /* Restore previous settings */
646 I915_WRITE(bclrpat_reg
, save_bclrpat
);
651 static enum drm_connector_status
652 intel_crt_detect(struct drm_connector
*connector
, bool force
)
654 struct drm_device
*dev
= connector
->dev
;
655 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
656 struct intel_crt
*crt
= intel_attached_crt(connector
);
657 struct intel_encoder
*intel_encoder
= &crt
->base
;
658 enum intel_display_power_domain power_domain
;
659 enum drm_connector_status status
;
660 struct intel_load_detect_pipe tmp
;
661 struct drm_modeset_acquire_ctx ctx
;
663 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
664 connector
->base
.id
, connector
->name
,
667 power_domain
= intel_display_port_power_domain(intel_encoder
);
668 intel_display_power_get(dev_priv
, power_domain
);
670 if (I915_HAS_HOTPLUG(dev
)) {
671 /* We can not rely on the HPD pin always being correctly wired
672 * up, for example many KVM do not pass it through, and so
673 * only trust an assertion that the monitor is connected.
675 if (intel_crt_detect_hotplug(connector
)) {
676 DRM_DEBUG_KMS("CRT detected via hotplug\n");
677 status
= connector_status_connected
;
680 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
683 if (intel_crt_detect_ddc(connector
)) {
684 status
= connector_status_connected
;
688 /* Load detection is broken on HPD capable machines. Whoever wants a
689 * broken monitor (without edid) to work behind a broken kvm (that fails
690 * to have the right resistors for HP detection) needs to fix this up.
691 * For now just bail out. */
692 if (I915_HAS_HOTPLUG(dev
)) {
693 status
= connector_status_disconnected
;
698 status
= connector
->status
;
702 /* for pre-945g platforms use load detect */
703 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
704 if (intel_crt_detect_ddc(connector
))
705 status
= connector_status_connected
;
707 status
= intel_crt_load_detect(crt
);
708 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
710 status
= connector_status_unknown
;
713 intel_display_power_put(dev_priv
, power_domain
);
717 static void intel_crt_destroy(struct drm_connector
*connector
)
719 drm_connector_cleanup(connector
);
723 static int intel_crt_get_modes(struct drm_connector
*connector
)
725 struct drm_device
*dev
= connector
->dev
;
726 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
727 struct intel_crt
*crt
= intel_attached_crt(connector
);
728 struct intel_encoder
*intel_encoder
= &crt
->base
;
729 enum intel_display_power_domain power_domain
;
731 struct i2c_adapter
*i2c
;
733 power_domain
= intel_display_port_power_domain(intel_encoder
);
734 intel_display_power_get(dev_priv
, power_domain
);
736 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
737 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
738 if (ret
|| !IS_G4X(dev
))
741 /* Try to probe digital port for output in DVI-I -> VGA mode. */
742 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PORT_DPB
);
743 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
746 intel_display_power_put(dev_priv
, power_domain
);
751 static int intel_crt_set_property(struct drm_connector
*connector
,
752 struct drm_property
*property
,
758 static void intel_crt_reset(struct drm_connector
*connector
)
760 struct drm_device
*dev
= connector
->dev
;
761 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
762 struct intel_crt
*crt
= intel_attached_crt(connector
);
764 if (INTEL_INFO(dev
)->gen
>= 5) {
767 adpa
= I915_READ(crt
->adpa_reg
);
768 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
769 adpa
|= ADPA_HOTPLUG_BITS
;
770 I915_WRITE(crt
->adpa_reg
, adpa
);
771 POSTING_READ(crt
->adpa_reg
);
773 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa
);
774 crt
->force_hotplug_required
= 1;
780 * Routines for controlling stuff on the analog port
783 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
784 .reset
= intel_crt_reset
,
785 .dpms
= intel_crt_dpms
,
786 .detect
= intel_crt_detect
,
787 .fill_modes
= drm_helper_probe_single_connector_modes
,
788 .destroy
= intel_crt_destroy
,
789 .set_property
= intel_crt_set_property
,
792 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
793 .mode_valid
= intel_crt_mode_valid
,
794 .get_modes
= intel_crt_get_modes
,
795 .best_encoder
= intel_best_encoder
,
798 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
799 .destroy
= intel_encoder_destroy
,
802 static int __init
intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
804 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
808 static const struct dmi_system_id intel_no_crt
[] = {
810 .callback
= intel_no_crt_dmi_callback
,
813 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
814 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
818 .callback
= intel_no_crt_dmi_callback
,
819 .ident
= "DELL XPS 8700",
821 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
822 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
828 void intel_crt_init(struct drm_device
*dev
)
830 struct drm_connector
*connector
;
831 struct intel_crt
*crt
;
832 struct intel_connector
*intel_connector
;
833 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
835 /* Skip machines without VGA that falsely report hotplug events */
836 if (dmi_check_system(intel_no_crt
))
839 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
843 intel_connector
= kzalloc(sizeof(*intel_connector
), GFP_KERNEL
);
844 if (!intel_connector
) {
849 connector
= &intel_connector
->base
;
850 crt
->connector
= intel_connector
;
851 drm_connector_init(dev
, &intel_connector
->base
,
852 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
854 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
855 DRM_MODE_ENCODER_DAC
);
857 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
859 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
860 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
862 crt
->base
.crtc_mask
= (1 << 0);
864 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
867 connector
->interlace_allowed
= 0;
869 connector
->interlace_allowed
= 1;
870 connector
->doublescan_allowed
= 0;
872 if (HAS_PCH_SPLIT(dev
))
873 crt
->adpa_reg
= PCH_ADPA
;
874 else if (IS_VALLEYVIEW(dev
))
875 crt
->adpa_reg
= VLV_ADPA
;
877 crt
->adpa_reg
= ADPA
;
879 crt
->base
.compute_config
= intel_crt_compute_config
;
880 crt
->base
.disable
= intel_disable_crt
;
881 crt
->base
.enable
= intel_enable_crt
;
882 if (I915_HAS_HOTPLUG(dev
))
883 crt
->base
.hpd_pin
= HPD_CRT
;
885 crt
->base
.get_config
= hsw_crt_get_config
;
886 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
887 crt
->base
.pre_enable
= hsw_crt_pre_enable
;
888 crt
->base
.post_disable
= hsw_crt_post_disable
;
890 crt
->base
.get_config
= intel_crt_get_config
;
891 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
893 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
894 intel_connector
->unregister
= intel_connector_unregister
;
896 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
898 drm_sysfs_connector_add(connector
);
900 if (!I915_HAS_HOTPLUG(dev
))
901 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
904 * Configure the automatic hotplug detection stuff
906 crt
->force_hotplug_required
= 0;
909 * TODO: find a proper way to discover whether we need to set the the
910 * polarity and link reversal bits or not, instead of relying on the
913 if (HAS_PCH_LPT(dev
)) {
914 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
915 FDI_RX_LINK_REVERSAL_OVERRIDE
;
917 dev_priv
->fdi_rx_config
= I915_READ(_FDI_RXA_CTL
) & fdi_config
;
920 intel_crt_reset(connector
);