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1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 */
26
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include "drmP.h"
31 #include "drm.h"
32 #include "drm_crtc.h"
33 #include "drm_crtc_helper.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38
39 /* Here's the desired hotplug mode */
40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
46
47 struct intel_crt {
48 struct intel_encoder base;
49 bool force_hotplug_required;
50 u32 adpa_reg;
51 };
52
53 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
54 {
55 return container_of(intel_attached_encoder(connector),
56 struct intel_crt, base);
57 }
58
59 static struct intel_crt *intel_encoder_to_crt(struct intel_encoder *encoder)
60 {
61 return container_of(encoder, struct intel_crt, base);
62 }
63
64 static void intel_disable_crt(struct intel_encoder *encoder)
65 {
66 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
67 struct intel_crt *crt = intel_encoder_to_crt(encoder);
68 u32 temp;
69
70 temp = I915_READ(crt->adpa_reg);
71 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
72 temp &= ~ADPA_DAC_ENABLE;
73 I915_WRITE(crt->adpa_reg, temp);
74 }
75
76 static void intel_enable_crt(struct intel_encoder *encoder)
77 {
78 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
79 struct intel_crt *crt = intel_encoder_to_crt(encoder);
80 u32 temp;
81
82 temp = I915_READ(crt->adpa_reg);
83 temp |= ADPA_DAC_ENABLE;
84 I915_WRITE(crt->adpa_reg, temp);
85 }
86
87 static void pch_crt_dpms(struct drm_encoder *encoder, int mode)
88 {
89 struct drm_device *dev = encoder->dev;
90 struct drm_i915_private *dev_priv = dev->dev_private;
91 u32 temp;
92
93 temp = I915_READ(PCH_ADPA);
94 temp &= ~ADPA_DAC_ENABLE;
95
96 switch (mode) {
97 case DRM_MODE_DPMS_ON:
98 temp |= ADPA_DAC_ENABLE;
99 break;
100 case DRM_MODE_DPMS_STANDBY:
101 case DRM_MODE_DPMS_SUSPEND:
102 case DRM_MODE_DPMS_OFF:
103 /* Just leave port enable cleared */
104 break;
105 }
106
107 I915_WRITE(PCH_ADPA, temp);
108 }
109
110 static void gmch_crt_dpms(struct drm_encoder *encoder, int mode)
111 {
112 struct drm_device *dev = encoder->dev;
113 struct drm_i915_private *dev_priv = dev->dev_private;
114 u32 temp;
115
116 temp = I915_READ(ADPA);
117 temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
118 temp &= ~ADPA_DAC_ENABLE;
119
120 if (IS_VALLEYVIEW(dev) && mode != DRM_MODE_DPMS_ON)
121 mode = DRM_MODE_DPMS_OFF;
122
123 switch (mode) {
124 case DRM_MODE_DPMS_ON:
125 temp |= ADPA_DAC_ENABLE;
126 break;
127 case DRM_MODE_DPMS_STANDBY:
128 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
129 break;
130 case DRM_MODE_DPMS_SUSPEND:
131 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
132 break;
133 case DRM_MODE_DPMS_OFF:
134 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
135 break;
136 }
137
138 I915_WRITE(ADPA, temp);
139 }
140
141 static int intel_crt_mode_valid(struct drm_connector *connector,
142 struct drm_display_mode *mode)
143 {
144 struct drm_device *dev = connector->dev;
145
146 int max_clock = 0;
147 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
148 return MODE_NO_DBLESCAN;
149
150 if (mode->clock < 25000)
151 return MODE_CLOCK_LOW;
152
153 if (IS_GEN2(dev))
154 max_clock = 350000;
155 else
156 max_clock = 400000;
157 if (mode->clock > max_clock)
158 return MODE_CLOCK_HIGH;
159
160 return MODE_OK;
161 }
162
163 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
164 const struct drm_display_mode *mode,
165 struct drm_display_mode *adjusted_mode)
166 {
167 return true;
168 }
169
170 static void intel_crt_mode_set(struct drm_encoder *encoder,
171 struct drm_display_mode *mode,
172 struct drm_display_mode *adjusted_mode)
173 {
174
175 struct drm_device *dev = encoder->dev;
176 struct drm_crtc *crtc = encoder->crtc;
177 struct intel_crt *crt =
178 intel_encoder_to_crt(to_intel_encoder(encoder));
179 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
180 struct drm_i915_private *dev_priv = dev->dev_private;
181 int dpll_md_reg;
182 u32 adpa, dpll_md;
183
184 dpll_md_reg = DPLL_MD(intel_crtc->pipe);
185
186 /*
187 * Disable separate mode multiplier used when cloning SDVO to CRT
188 * XXX this needs to be adjusted when we really are cloning
189 */
190 if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
191 dpll_md = I915_READ(dpll_md_reg);
192 I915_WRITE(dpll_md_reg,
193 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
194 }
195
196 adpa = ADPA_HOTPLUG_BITS;
197 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
198 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
199 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
200 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
201
202 /* For CPT allow 3 pipe config, for others just use A or B */
203 if (HAS_PCH_CPT(dev))
204 adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
205 else if (intel_crtc->pipe == 0)
206 adpa |= ADPA_PIPE_A_SELECT;
207 else
208 adpa |= ADPA_PIPE_B_SELECT;
209
210 if (!HAS_PCH_SPLIT(dev))
211 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
212
213 I915_WRITE(crt->adpa_reg, adpa);
214 }
215
216 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
217 {
218 struct drm_device *dev = connector->dev;
219 struct intel_crt *crt = intel_attached_crt(connector);
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 adpa;
222 bool ret;
223
224 /* The first time through, trigger an explicit detection cycle */
225 if (crt->force_hotplug_required) {
226 bool turn_off_dac = HAS_PCH_SPLIT(dev);
227 u32 save_adpa;
228
229 crt->force_hotplug_required = 0;
230
231 save_adpa = adpa = I915_READ(PCH_ADPA);
232 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
233
234 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
235 if (turn_off_dac)
236 adpa &= ~ADPA_DAC_ENABLE;
237
238 I915_WRITE(PCH_ADPA, adpa);
239
240 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
241 1000))
242 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
243
244 if (turn_off_dac) {
245 I915_WRITE(PCH_ADPA, save_adpa);
246 POSTING_READ(PCH_ADPA);
247 }
248 }
249
250 /* Check the status to see if both blue and green are on now */
251 adpa = I915_READ(PCH_ADPA);
252 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
253 ret = true;
254 else
255 ret = false;
256 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
257
258 return ret;
259 }
260
261 static bool valleyview_crt_detect_hotplug(struct drm_connector *connector)
262 {
263 struct drm_device *dev = connector->dev;
264 struct drm_i915_private *dev_priv = dev->dev_private;
265 u32 adpa;
266 bool ret;
267 u32 save_adpa;
268
269 save_adpa = adpa = I915_READ(ADPA);
270 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
271
272 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
273
274 I915_WRITE(ADPA, adpa);
275
276 if (wait_for((I915_READ(ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
277 1000)) {
278 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
279 I915_WRITE(ADPA, save_adpa);
280 }
281
282 /* Check the status to see if both blue and green are on now */
283 adpa = I915_READ(ADPA);
284 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
285 ret = true;
286 else
287 ret = false;
288
289 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa, ret);
290
291 /* FIXME: debug force function and remove */
292 ret = true;
293
294 return ret;
295 }
296
297 /**
298 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
299 *
300 * Not for i915G/i915GM
301 *
302 * \return true if CRT is connected.
303 * \return false if CRT is disconnected.
304 */
305 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
306 {
307 struct drm_device *dev = connector->dev;
308 struct drm_i915_private *dev_priv = dev->dev_private;
309 u32 hotplug_en, orig, stat;
310 bool ret = false;
311 int i, tries = 0;
312
313 if (HAS_PCH_SPLIT(dev))
314 return intel_ironlake_crt_detect_hotplug(connector);
315
316 if (IS_VALLEYVIEW(dev))
317 return valleyview_crt_detect_hotplug(connector);
318
319 /*
320 * On 4 series desktop, CRT detect sequence need to be done twice
321 * to get a reliable result.
322 */
323
324 if (IS_G4X(dev) && !IS_GM45(dev))
325 tries = 2;
326 else
327 tries = 1;
328 hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
329 hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
330
331 for (i = 0; i < tries ; i++) {
332 /* turn on the FORCE_DETECT */
333 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
334 /* wait for FORCE_DETECT to go off */
335 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
336 CRT_HOTPLUG_FORCE_DETECT) == 0,
337 1000))
338 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
339 }
340
341 stat = I915_READ(PORT_HOTPLUG_STAT);
342 if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
343 ret = true;
344
345 /* clear the interrupt we just generated, if any */
346 I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
347
348 /* and put the bits back */
349 I915_WRITE(PORT_HOTPLUG_EN, orig);
350
351 return ret;
352 }
353
354 static bool intel_crt_detect_ddc(struct drm_connector *connector)
355 {
356 struct intel_crt *crt = intel_attached_crt(connector);
357 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
358 struct edid *edid;
359 struct i2c_adapter *i2c;
360
361 BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
362
363 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
364 edid = drm_get_edid(connector, i2c);
365
366 if (edid) {
367 bool is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
368
369 /*
370 * This may be a DVI-I connector with a shared DDC
371 * link between analog and digital outputs, so we
372 * have to check the EDID input spec of the attached device.
373 */
374 if (!is_digital) {
375 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
376 return true;
377 }
378
379 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
380 } else {
381 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
382 }
383
384 kfree(edid);
385
386 return false;
387 }
388
389 static enum drm_connector_status
390 intel_crt_load_detect(struct intel_crt *crt)
391 {
392 struct drm_device *dev = crt->base.base.dev;
393 struct drm_i915_private *dev_priv = dev->dev_private;
394 uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
395 uint32_t save_bclrpat;
396 uint32_t save_vtotal;
397 uint32_t vtotal, vactive;
398 uint32_t vsample;
399 uint32_t vblank, vblank_start, vblank_end;
400 uint32_t dsl;
401 uint32_t bclrpat_reg;
402 uint32_t vtotal_reg;
403 uint32_t vblank_reg;
404 uint32_t vsync_reg;
405 uint32_t pipeconf_reg;
406 uint32_t pipe_dsl_reg;
407 uint8_t st00;
408 enum drm_connector_status status;
409
410 DRM_DEBUG_KMS("starting load-detect on CRT\n");
411
412 bclrpat_reg = BCLRPAT(pipe);
413 vtotal_reg = VTOTAL(pipe);
414 vblank_reg = VBLANK(pipe);
415 vsync_reg = VSYNC(pipe);
416 pipeconf_reg = PIPECONF(pipe);
417 pipe_dsl_reg = PIPEDSL(pipe);
418
419 save_bclrpat = I915_READ(bclrpat_reg);
420 save_vtotal = I915_READ(vtotal_reg);
421 vblank = I915_READ(vblank_reg);
422
423 vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
424 vactive = (save_vtotal & 0x7ff) + 1;
425
426 vblank_start = (vblank & 0xfff) + 1;
427 vblank_end = ((vblank >> 16) & 0xfff) + 1;
428
429 /* Set the border color to purple. */
430 I915_WRITE(bclrpat_reg, 0x500050);
431
432 if (!IS_GEN2(dev)) {
433 uint32_t pipeconf = I915_READ(pipeconf_reg);
434 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
435 POSTING_READ(pipeconf_reg);
436 /* Wait for next Vblank to substitue
437 * border color for Color info */
438 intel_wait_for_vblank(dev, pipe);
439 st00 = I915_READ8(VGA_MSR_WRITE);
440 status = ((st00 & (1 << 4)) != 0) ?
441 connector_status_connected :
442 connector_status_disconnected;
443
444 I915_WRITE(pipeconf_reg, pipeconf);
445 } else {
446 bool restore_vblank = false;
447 int count, detect;
448
449 /*
450 * If there isn't any border, add some.
451 * Yes, this will flicker
452 */
453 if (vblank_start <= vactive && vblank_end >= vtotal) {
454 uint32_t vsync = I915_READ(vsync_reg);
455 uint32_t vsync_start = (vsync & 0xffff) + 1;
456
457 vblank_start = vsync_start;
458 I915_WRITE(vblank_reg,
459 (vblank_start - 1) |
460 ((vblank_end - 1) << 16));
461 restore_vblank = true;
462 }
463 /* sample in the vertical border, selecting the larger one */
464 if (vblank_start - vactive >= vtotal - vblank_end)
465 vsample = (vblank_start + vactive) >> 1;
466 else
467 vsample = (vtotal + vblank_end) >> 1;
468
469 /*
470 * Wait for the border to be displayed
471 */
472 while (I915_READ(pipe_dsl_reg) >= vactive)
473 ;
474 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
475 ;
476 /*
477 * Watch ST00 for an entire scanline
478 */
479 detect = 0;
480 count = 0;
481 do {
482 count++;
483 /* Read the ST00 VGA status register */
484 st00 = I915_READ8(VGA_MSR_WRITE);
485 if (st00 & (1 << 4))
486 detect++;
487 } while ((I915_READ(pipe_dsl_reg) == dsl));
488
489 /* restore vblank if necessary */
490 if (restore_vblank)
491 I915_WRITE(vblank_reg, vblank);
492 /*
493 * If more than 3/4 of the scanline detected a monitor,
494 * then it is assumed to be present. This works even on i830,
495 * where there isn't any way to force the border color across
496 * the screen
497 */
498 status = detect * 4 > count * 3 ?
499 connector_status_connected :
500 connector_status_disconnected;
501 }
502
503 /* Restore previous settings */
504 I915_WRITE(bclrpat_reg, save_bclrpat);
505
506 return status;
507 }
508
509 static enum drm_connector_status
510 intel_crt_detect(struct drm_connector *connector, bool force)
511 {
512 struct drm_device *dev = connector->dev;
513 struct intel_crt *crt = intel_attached_crt(connector);
514 enum drm_connector_status status;
515 struct intel_load_detect_pipe tmp;
516
517 if (I915_HAS_HOTPLUG(dev)) {
518 /* We can not rely on the HPD pin always being correctly wired
519 * up, for example many KVM do not pass it through, and so
520 * only trust an assertion that the monitor is connected.
521 */
522 if (intel_crt_detect_hotplug(connector)) {
523 DRM_DEBUG_KMS("CRT detected via hotplug\n");
524 return connector_status_connected;
525 } else
526 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
527 }
528
529 if (intel_crt_detect_ddc(connector))
530 return connector_status_connected;
531
532 /* Load detection is broken on HPD capable machines. Whoever wants a
533 * broken monitor (without edid) to work behind a broken kvm (that fails
534 * to have the right resistors for HP detection) needs to fix this up.
535 * For now just bail out. */
536 if (I915_HAS_HOTPLUG(dev))
537 return connector_status_disconnected;
538
539 if (!force)
540 return connector->status;
541
542 /* for pre-945g platforms use load detect */
543 if (intel_get_load_detect_pipe(connector, NULL, &tmp)) {
544 if (intel_crt_detect_ddc(connector))
545 status = connector_status_connected;
546 else
547 status = intel_crt_load_detect(crt);
548 intel_release_load_detect_pipe(connector, &tmp);
549 } else
550 status = connector_status_unknown;
551
552 return status;
553 }
554
555 static void intel_crt_destroy(struct drm_connector *connector)
556 {
557 drm_sysfs_connector_remove(connector);
558 drm_connector_cleanup(connector);
559 kfree(connector);
560 }
561
562 static int intel_crt_get_modes(struct drm_connector *connector)
563 {
564 struct drm_device *dev = connector->dev;
565 struct drm_i915_private *dev_priv = dev->dev_private;
566 int ret;
567 struct i2c_adapter *i2c;
568
569 i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
570 ret = intel_ddc_get_modes(connector, i2c);
571 if (ret || !IS_G4X(dev))
572 return ret;
573
574 /* Try to probe digital port for output in DVI-I -> VGA mode. */
575 i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
576 return intel_ddc_get_modes(connector, i2c);
577 }
578
579 static int intel_crt_set_property(struct drm_connector *connector,
580 struct drm_property *property,
581 uint64_t value)
582 {
583 return 0;
584 }
585
586 static void intel_crt_reset(struct drm_connector *connector)
587 {
588 struct drm_device *dev = connector->dev;
589 struct intel_crt *crt = intel_attached_crt(connector);
590
591 if (HAS_PCH_SPLIT(dev))
592 crt->force_hotplug_required = 1;
593 }
594
595 /*
596 * Routines for controlling stuff on the analog port
597 */
598
599 static const struct drm_encoder_helper_funcs pch_encoder_funcs = {
600 .mode_fixup = intel_crt_mode_fixup,
601 .prepare = intel_encoder_noop,
602 .commit = intel_encoder_noop,
603 .mode_set = intel_crt_mode_set,
604 .dpms = pch_crt_dpms,
605 .disable = intel_encoder_disable,
606 };
607
608 static const struct drm_encoder_helper_funcs gmch_encoder_funcs = {
609 .mode_fixup = intel_crt_mode_fixup,
610 .prepare = intel_encoder_noop,
611 .commit = intel_encoder_noop,
612 .mode_set = intel_crt_mode_set,
613 .dpms = gmch_crt_dpms,
614 .disable = intel_encoder_disable,
615 };
616
617 static const struct drm_connector_funcs intel_crt_connector_funcs = {
618 .reset = intel_crt_reset,
619 .dpms = drm_helper_connector_dpms,
620 .detect = intel_crt_detect,
621 .fill_modes = drm_helper_probe_single_connector_modes,
622 .destroy = intel_crt_destroy,
623 .set_property = intel_crt_set_property,
624 };
625
626 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
627 .mode_valid = intel_crt_mode_valid,
628 .get_modes = intel_crt_get_modes,
629 .best_encoder = intel_best_encoder,
630 };
631
632 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
633 .destroy = intel_encoder_destroy,
634 };
635
636 static int __init intel_no_crt_dmi_callback(const struct dmi_system_id *id)
637 {
638 DRM_INFO("Skipping CRT initialization for %s\n", id->ident);
639 return 1;
640 }
641
642 static const struct dmi_system_id intel_no_crt[] = {
643 {
644 .callback = intel_no_crt_dmi_callback,
645 .ident = "ACER ZGB",
646 .matches = {
647 DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
648 DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
649 },
650 },
651 { }
652 };
653
654 void intel_crt_init(struct drm_device *dev)
655 {
656 struct drm_connector *connector;
657 struct intel_crt *crt;
658 struct intel_connector *intel_connector;
659 struct drm_i915_private *dev_priv = dev->dev_private;
660 const struct drm_encoder_helper_funcs *encoder_helper_funcs;
661
662 /* Skip machines without VGA that falsely report hotplug events */
663 if (dmi_check_system(intel_no_crt))
664 return;
665
666 crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
667 if (!crt)
668 return;
669
670 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
671 if (!intel_connector) {
672 kfree(crt);
673 return;
674 }
675
676 connector = &intel_connector->base;
677 drm_connector_init(dev, &intel_connector->base,
678 &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
679
680 drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
681 DRM_MODE_ENCODER_DAC);
682
683 intel_connector_attach_encoder(intel_connector, &crt->base);
684
685 crt->base.type = INTEL_OUTPUT_ANALOG;
686 crt->base.cloneable = true;
687 if (IS_HASWELL(dev))
688 crt->base.crtc_mask = (1 << 0);
689 else
690 crt->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
691
692 if (IS_GEN2(dev))
693 connector->interlace_allowed = 0;
694 else
695 connector->interlace_allowed = 1;
696 connector->doublescan_allowed = 0;
697
698 if (HAS_PCH_SPLIT(dev))
699 encoder_helper_funcs = &pch_encoder_funcs;
700 else
701 encoder_helper_funcs = &gmch_encoder_funcs;
702
703 if (HAS_PCH_SPLIT(dev))
704 crt->adpa_reg = PCH_ADPA;
705 else if (IS_VALLEYVIEW(dev))
706 crt->adpa_reg = VLV_ADPA;
707 else
708 crt->adpa_reg = ADPA;
709
710 crt->base.disable = intel_disable_crt;
711 crt->base.enable = intel_enable_crt;
712
713 drm_encoder_helper_add(&crt->base.base, encoder_helper_funcs);
714 drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
715
716 drm_sysfs_connector_add(connector);
717
718 if (I915_HAS_HOTPLUG(dev))
719 connector->polled = DRM_CONNECTOR_POLL_HPD;
720 else
721 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
722
723 /*
724 * Configure the automatic hotplug detection stuff
725 */
726 crt->force_hotplug_required = 0;
727 if (HAS_PCH_SPLIT(dev)) {
728 u32 adpa;
729
730 adpa = I915_READ(PCH_ADPA);
731 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
732 adpa |= ADPA_HOTPLUG_BITS;
733 I915_WRITE(PCH_ADPA, adpa);
734 POSTING_READ(PCH_ADPA);
735
736 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
737 crt->force_hotplug_required = 1;
738 }
739
740 dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
741 }