2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
39 /* Here's the desired hotplug mode */
40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
48 struct intel_encoder base
;
49 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector
*connector
;
52 bool force_hotplug_required
;
56 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
58 return container_of(encoder
, struct intel_crt
, base
);
61 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
63 return intel_encoder_to_crt(intel_attached_encoder(connector
));
66 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
69 struct drm_device
*dev
= encoder
->base
.dev
;
70 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
71 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
72 enum intel_display_power_domain power_domain
;
76 power_domain
= intel_display_port_power_domain(encoder
);
77 if (!intel_display_power_get_if_enabled(dev_priv
, power_domain
))
82 tmp
= I915_READ(crt
->adpa_reg
);
84 if (!(tmp
& ADPA_DAC_ENABLE
))
88 *pipe
= PORT_TO_PIPE_CPT(tmp
);
90 *pipe
= PORT_TO_PIPE(tmp
);
94 intel_display_power_put(dev_priv
, power_domain
);
99 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
101 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
102 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
105 tmp
= I915_READ(crt
->adpa_reg
);
107 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
108 flags
|= DRM_MODE_FLAG_PHSYNC
;
110 flags
|= DRM_MODE_FLAG_NHSYNC
;
112 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
113 flags
|= DRM_MODE_FLAG_PVSYNC
;
115 flags
|= DRM_MODE_FLAG_NVSYNC
;
120 static void intel_crt_get_config(struct intel_encoder
*encoder
,
121 struct intel_crtc_state
*pipe_config
)
123 struct drm_device
*dev
= encoder
->base
.dev
;
126 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
128 dotclock
= pipe_config
->port_clock
;
130 if (HAS_PCH_SPLIT(dev
))
131 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
133 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
136 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
137 struct intel_crtc_state
*pipe_config
)
139 intel_ddi_get_config(encoder
, pipe_config
);
141 pipe_config
->base
.adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
142 DRM_MODE_FLAG_NHSYNC
|
143 DRM_MODE_FLAG_PVSYNC
|
144 DRM_MODE_FLAG_NVSYNC
);
145 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
148 /* Note: The caller is required to filter out dpms modes not supported by the
150 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
152 struct drm_device
*dev
= encoder
->base
.dev
;
153 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
154 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
155 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
156 const struct drm_display_mode
*adjusted_mode
= &crtc
->config
->base
.adjusted_mode
;
159 if (INTEL_INFO(dev
)->gen
>= 5)
160 adpa
= ADPA_HOTPLUG_BITS
;
164 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
165 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
166 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
167 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
169 /* For CPT allow 3 pipe config, for others just use A or B */
170 if (HAS_PCH_LPT(dev
))
171 ; /* Those bits don't exist here */
172 else if (HAS_PCH_CPT(dev
))
173 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
174 else if (crtc
->pipe
== 0)
175 adpa
|= ADPA_PIPE_A_SELECT
;
177 adpa
|= ADPA_PIPE_B_SELECT
;
179 if (!HAS_PCH_SPLIT(dev
))
180 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
183 case DRM_MODE_DPMS_ON
:
184 adpa
|= ADPA_DAC_ENABLE
;
186 case DRM_MODE_DPMS_STANDBY
:
187 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
189 case DRM_MODE_DPMS_SUSPEND
:
190 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
192 case DRM_MODE_DPMS_OFF
:
193 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
197 I915_WRITE(crt
->adpa_reg
, adpa
);
200 static void intel_disable_crt(struct intel_encoder
*encoder
)
202 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
205 static void pch_disable_crt(struct intel_encoder
*encoder
)
209 static void pch_post_disable_crt(struct intel_encoder
*encoder
)
211 intel_disable_crt(encoder
);
214 static void intel_enable_crt(struct intel_encoder
*encoder
)
216 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
218 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
221 static enum drm_mode_status
222 intel_crt_mode_valid(struct drm_connector
*connector
,
223 struct drm_display_mode
*mode
)
225 struct drm_device
*dev
= connector
->dev
;
228 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
229 return MODE_NO_DBLESCAN
;
231 if (mode
->clock
< 25000)
232 return MODE_CLOCK_LOW
;
238 if (mode
->clock
> max_clock
)
239 return MODE_CLOCK_HIGH
;
241 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
242 if (HAS_PCH_LPT(dev
) &&
243 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
244 return MODE_CLOCK_HIGH
;
249 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
250 struct intel_crtc_state
*pipe_config
)
252 struct drm_device
*dev
= encoder
->base
.dev
;
254 if (HAS_PCH_SPLIT(dev
))
255 pipe_config
->has_pch_encoder
= true;
257 /* LPT FDI RX only supports 8bpc. */
258 if (HAS_PCH_LPT(dev
))
259 pipe_config
->pipe_bpp
= 24;
261 /* FDI must always be 2.7 GHz */
263 pipe_config
->ddi_pll_sel
= PORT_CLK_SEL_SPLL
;
264 pipe_config
->port_clock
= 135000 * 2;
266 pipe_config
->dpll_hw_state
.wrpll
= 0;
267 pipe_config
->dpll_hw_state
.spll
=
268 SPLL_PLL_ENABLE
| SPLL_PLL_FREQ_1350MHz
| SPLL_PLL_SSC
;
274 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
276 struct drm_device
*dev
= connector
->dev
;
277 struct intel_crt
*crt
= intel_attached_crt(connector
);
278 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
282 /* The first time through, trigger an explicit detection cycle */
283 if (crt
->force_hotplug_required
) {
284 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
287 crt
->force_hotplug_required
= 0;
289 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
290 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
292 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
294 adpa
&= ~ADPA_DAC_ENABLE
;
296 I915_WRITE(crt
->adpa_reg
, adpa
);
298 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
300 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
303 I915_WRITE(crt
->adpa_reg
, save_adpa
);
304 POSTING_READ(crt
->adpa_reg
);
308 /* Check the status to see if both blue and green are on now */
309 adpa
= I915_READ(crt
->adpa_reg
);
310 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
314 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
319 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
321 struct drm_device
*dev
= connector
->dev
;
322 struct intel_crt
*crt
= intel_attached_crt(connector
);
323 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
328 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
329 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
331 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
333 I915_WRITE(crt
->adpa_reg
, adpa
);
335 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
337 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
338 I915_WRITE(crt
->adpa_reg
, save_adpa
);
341 /* Check the status to see if both blue and green are on now */
342 adpa
= I915_READ(crt
->adpa_reg
);
343 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
348 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
354 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
356 * Not for i915G/i915GM
358 * \return true if CRT is connected.
359 * \return false if CRT is disconnected.
361 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
363 struct drm_device
*dev
= connector
->dev
;
364 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
369 if (HAS_PCH_SPLIT(dev
))
370 return intel_ironlake_crt_detect_hotplug(connector
);
372 if (IS_VALLEYVIEW(dev
))
373 return valleyview_crt_detect_hotplug(connector
);
376 * On 4 series desktop, CRT detect sequence need to be done twice
377 * to get a reliable result.
380 if (IS_G4X(dev
) && !IS_GM45(dev
))
385 for (i
= 0; i
< tries
; i
++) {
386 /* turn on the FORCE_DETECT */
387 i915_hotplug_interrupt_update(dev_priv
,
388 CRT_HOTPLUG_FORCE_DETECT
,
389 CRT_HOTPLUG_FORCE_DETECT
);
390 /* wait for FORCE_DETECT to go off */
391 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
392 CRT_HOTPLUG_FORCE_DETECT
) == 0,
394 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
397 stat
= I915_READ(PORT_HOTPLUG_STAT
);
398 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
401 /* clear the interrupt we just generated, if any */
402 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
404 i915_hotplug_interrupt_update(dev_priv
, CRT_HOTPLUG_FORCE_DETECT
, 0);
409 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
410 struct i2c_adapter
*i2c
)
414 edid
= drm_get_edid(connector
, i2c
);
416 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
417 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
418 intel_gmbus_force_bit(i2c
, true);
419 edid
= drm_get_edid(connector
, i2c
);
420 intel_gmbus_force_bit(i2c
, false);
426 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
427 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
428 struct i2c_adapter
*adapter
)
433 edid
= intel_crt_get_edid(connector
, adapter
);
437 ret
= intel_connector_update_modes(connector
, edid
);
443 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
445 struct intel_crt
*crt
= intel_attached_crt(connector
);
446 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
448 struct i2c_adapter
*i2c
;
450 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
452 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
453 edid
= intel_crt_get_edid(connector
, i2c
);
456 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
459 * This may be a DVI-I connector with a shared DDC
460 * link between analog and digital outputs, so we
461 * have to check the EDID input spec of the attached device.
464 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
468 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
470 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
478 static enum drm_connector_status
479 intel_crt_load_detect(struct intel_crt
*crt
)
481 struct drm_device
*dev
= crt
->base
.base
.dev
;
482 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
483 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
484 uint32_t save_bclrpat
;
485 uint32_t save_vtotal
;
486 uint32_t vtotal
, vactive
;
488 uint32_t vblank
, vblank_start
, vblank_end
;
490 i915_reg_t bclrpat_reg
, vtotal_reg
,
491 vblank_reg
, vsync_reg
, pipeconf_reg
, pipe_dsl_reg
;
493 enum drm_connector_status status
;
495 DRM_DEBUG_KMS("starting load-detect on CRT\n");
497 bclrpat_reg
= BCLRPAT(pipe
);
498 vtotal_reg
= VTOTAL(pipe
);
499 vblank_reg
= VBLANK(pipe
);
500 vsync_reg
= VSYNC(pipe
);
501 pipeconf_reg
= PIPECONF(pipe
);
502 pipe_dsl_reg
= PIPEDSL(pipe
);
504 save_bclrpat
= I915_READ(bclrpat_reg
);
505 save_vtotal
= I915_READ(vtotal_reg
);
506 vblank
= I915_READ(vblank_reg
);
508 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
509 vactive
= (save_vtotal
& 0x7ff) + 1;
511 vblank_start
= (vblank
& 0xfff) + 1;
512 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
514 /* Set the border color to purple. */
515 I915_WRITE(bclrpat_reg
, 0x500050);
518 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
519 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
520 POSTING_READ(pipeconf_reg
);
521 /* Wait for next Vblank to substitue
522 * border color for Color info */
523 intel_wait_for_vblank(dev
, pipe
);
524 st00
= I915_READ8(_VGA_MSR_WRITE
);
525 status
= ((st00
& (1 << 4)) != 0) ?
526 connector_status_connected
:
527 connector_status_disconnected
;
529 I915_WRITE(pipeconf_reg
, pipeconf
);
531 bool restore_vblank
= false;
535 * If there isn't any border, add some.
536 * Yes, this will flicker
538 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
539 uint32_t vsync
= I915_READ(vsync_reg
);
540 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
542 vblank_start
= vsync_start
;
543 I915_WRITE(vblank_reg
,
545 ((vblank_end
- 1) << 16));
546 restore_vblank
= true;
548 /* sample in the vertical border, selecting the larger one */
549 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
550 vsample
= (vblank_start
+ vactive
) >> 1;
552 vsample
= (vtotal
+ vblank_end
) >> 1;
555 * Wait for the border to be displayed
557 while (I915_READ(pipe_dsl_reg
) >= vactive
)
559 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
562 * Watch ST00 for an entire scanline
568 /* Read the ST00 VGA status register */
569 st00
= I915_READ8(_VGA_MSR_WRITE
);
572 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
574 /* restore vblank if necessary */
576 I915_WRITE(vblank_reg
, vblank
);
578 * If more than 3/4 of the scanline detected a monitor,
579 * then it is assumed to be present. This works even on i830,
580 * where there isn't any way to force the border color across
583 status
= detect
* 4 > count
* 3 ?
584 connector_status_connected
:
585 connector_status_disconnected
;
588 /* Restore previous settings */
589 I915_WRITE(bclrpat_reg
, save_bclrpat
);
594 static enum drm_connector_status
595 intel_crt_detect(struct drm_connector
*connector
, bool force
)
597 struct drm_device
*dev
= connector
->dev
;
598 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
599 struct intel_crt
*crt
= intel_attached_crt(connector
);
600 struct intel_encoder
*intel_encoder
= &crt
->base
;
601 enum intel_display_power_domain power_domain
;
602 enum drm_connector_status status
;
603 struct intel_load_detect_pipe tmp
;
604 struct drm_modeset_acquire_ctx ctx
;
606 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
607 connector
->base
.id
, connector
->name
,
610 power_domain
= intel_display_port_power_domain(intel_encoder
);
611 intel_display_power_get(dev_priv
, power_domain
);
613 if (I915_HAS_HOTPLUG(dev
)) {
614 /* We can not rely on the HPD pin always being correctly wired
615 * up, for example many KVM do not pass it through, and so
616 * only trust an assertion that the monitor is connected.
618 if (intel_crt_detect_hotplug(connector
)) {
619 DRM_DEBUG_KMS("CRT detected via hotplug\n");
620 status
= connector_status_connected
;
623 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
626 if (intel_crt_detect_ddc(connector
)) {
627 status
= connector_status_connected
;
631 /* Load detection is broken on HPD capable machines. Whoever wants a
632 * broken monitor (without edid) to work behind a broken kvm (that fails
633 * to have the right resistors for HP detection) needs to fix this up.
634 * For now just bail out. */
635 if (I915_HAS_HOTPLUG(dev
) && !i915
.load_detect_test
) {
636 status
= connector_status_disconnected
;
641 status
= connector
->status
;
645 drm_modeset_acquire_init(&ctx
, 0);
647 /* for pre-945g platforms use load detect */
648 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
649 if (intel_crt_detect_ddc(connector
))
650 status
= connector_status_connected
;
651 else if (INTEL_INFO(dev
)->gen
< 4)
652 status
= intel_crt_load_detect(crt
);
654 status
= connector_status_unknown
;
655 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
657 status
= connector_status_unknown
;
659 drm_modeset_drop_locks(&ctx
);
660 drm_modeset_acquire_fini(&ctx
);
663 intel_display_power_put(dev_priv
, power_domain
);
667 static void intel_crt_destroy(struct drm_connector
*connector
)
669 drm_connector_cleanup(connector
);
673 static int intel_crt_get_modes(struct drm_connector
*connector
)
675 struct drm_device
*dev
= connector
->dev
;
676 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
677 struct intel_crt
*crt
= intel_attached_crt(connector
);
678 struct intel_encoder
*intel_encoder
= &crt
->base
;
679 enum intel_display_power_domain power_domain
;
681 struct i2c_adapter
*i2c
;
683 power_domain
= intel_display_port_power_domain(intel_encoder
);
684 intel_display_power_get(dev_priv
, power_domain
);
686 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
687 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
688 if (ret
|| !IS_G4X(dev
))
691 /* Try to probe digital port for output in DVI-I -> VGA mode. */
692 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PIN_DPB
);
693 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
696 intel_display_power_put(dev_priv
, power_domain
);
701 static int intel_crt_set_property(struct drm_connector
*connector
,
702 struct drm_property
*property
,
708 static void intel_crt_reset(struct drm_connector
*connector
)
710 struct drm_device
*dev
= connector
->dev
;
711 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
712 struct intel_crt
*crt
= intel_attached_crt(connector
);
714 if (INTEL_INFO(dev
)->gen
>= 5) {
717 adpa
= I915_READ(crt
->adpa_reg
);
718 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
719 adpa
|= ADPA_HOTPLUG_BITS
;
720 I915_WRITE(crt
->adpa_reg
, adpa
);
721 POSTING_READ(crt
->adpa_reg
);
723 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa
);
724 crt
->force_hotplug_required
= 1;
730 * Routines for controlling stuff on the analog port
733 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
734 .reset
= intel_crt_reset
,
735 .dpms
= drm_atomic_helper_connector_dpms
,
736 .detect
= intel_crt_detect
,
737 .fill_modes
= drm_helper_probe_single_connector_modes
,
738 .destroy
= intel_crt_destroy
,
739 .set_property
= intel_crt_set_property
,
740 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
741 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
742 .atomic_get_property
= intel_connector_atomic_get_property
,
745 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
746 .mode_valid
= intel_crt_mode_valid
,
747 .get_modes
= intel_crt_get_modes
,
748 .best_encoder
= intel_best_encoder
,
751 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
752 .destroy
= intel_encoder_destroy
,
755 static int intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
757 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
761 static const struct dmi_system_id intel_no_crt
[] = {
763 .callback
= intel_no_crt_dmi_callback
,
766 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
767 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
771 .callback
= intel_no_crt_dmi_callback
,
772 .ident
= "DELL XPS 8700",
774 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
775 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
781 void intel_crt_init(struct drm_device
*dev
)
783 struct drm_connector
*connector
;
784 struct intel_crt
*crt
;
785 struct intel_connector
*intel_connector
;
786 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
790 /* Skip machines without VGA that falsely report hotplug events */
791 if (dmi_check_system(intel_no_crt
))
794 if (HAS_PCH_SPLIT(dev
))
796 else if (IS_VALLEYVIEW(dev
))
801 adpa
= I915_READ(adpa_reg
);
802 if ((adpa
& ADPA_DAC_ENABLE
) == 0) {
804 * On some machines (some IVB at least) CRT can be
805 * fused off, but there's no known fuse bit to
806 * indicate that. On these machine the ADPA register
807 * works normally, except the DAC enable bit won't
808 * take. So the only way to tell is attempt to enable
809 * it and see what happens.
811 I915_WRITE(adpa_reg
, adpa
| ADPA_DAC_ENABLE
|
812 ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
813 if ((I915_READ(adpa_reg
) & ADPA_DAC_ENABLE
) == 0)
815 I915_WRITE(adpa_reg
, adpa
);
818 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
822 intel_connector
= intel_connector_alloc();
823 if (!intel_connector
) {
828 connector
= &intel_connector
->base
;
829 crt
->connector
= intel_connector
;
830 drm_connector_init(dev
, &intel_connector
->base
,
831 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
833 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
834 DRM_MODE_ENCODER_DAC
, NULL
);
836 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
838 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
839 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
841 crt
->base
.crtc_mask
= (1 << 0);
843 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
846 connector
->interlace_allowed
= 0;
848 connector
->interlace_allowed
= 1;
849 connector
->doublescan_allowed
= 0;
851 crt
->adpa_reg
= adpa_reg
;
853 crt
->base
.compute_config
= intel_crt_compute_config
;
854 if (HAS_PCH_SPLIT(dev
)) {
855 crt
->base
.disable
= pch_disable_crt
;
856 crt
->base
.post_disable
= pch_post_disable_crt
;
858 crt
->base
.disable
= intel_disable_crt
;
860 crt
->base
.enable
= intel_enable_crt
;
861 if (I915_HAS_HOTPLUG(dev
))
862 crt
->base
.hpd_pin
= HPD_CRT
;
864 crt
->base
.get_config
= hsw_crt_get_config
;
865 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
867 crt
->base
.get_config
= intel_crt_get_config
;
868 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
870 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
871 intel_connector
->unregister
= intel_connector_unregister
;
873 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
875 drm_connector_register(connector
);
877 if (!I915_HAS_HOTPLUG(dev
))
878 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
881 * Configure the automatic hotplug detection stuff
883 crt
->force_hotplug_required
= 0;
886 * TODO: find a proper way to discover whether we need to set the the
887 * polarity and link reversal bits or not, instead of relying on the
890 if (HAS_PCH_LPT(dev
)) {
891 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
892 FDI_RX_LINK_REVERSAL_OVERRIDE
;
894 dev_priv
->fdi_rx_config
= I915_READ(FDI_RX_CTL(PIPE_A
)) & fdi_config
;
897 intel_crt_reset(connector
);