2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
39 /* Here's the desired hotplug mode */
40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
48 struct intel_encoder base
;
49 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector
*connector
;
52 bool force_hotplug_required
;
56 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
58 return container_of(encoder
, struct intel_crt
, base
);
61 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
63 return intel_encoder_to_crt(intel_attached_encoder(connector
));
66 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
69 struct drm_device
*dev
= encoder
->base
.dev
;
70 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
71 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
72 enum intel_display_power_domain power_domain
;
76 power_domain
= intel_display_port_power_domain(encoder
);
77 if (!intel_display_power_get_if_enabled(dev_priv
, power_domain
))
82 tmp
= I915_READ(crt
->adpa_reg
);
84 if (!(tmp
& ADPA_DAC_ENABLE
))
88 *pipe
= PORT_TO_PIPE_CPT(tmp
);
90 *pipe
= PORT_TO_PIPE(tmp
);
94 intel_display_power_put(dev_priv
, power_domain
);
99 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
101 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
102 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
105 tmp
= I915_READ(crt
->adpa_reg
);
107 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
108 flags
|= DRM_MODE_FLAG_PHSYNC
;
110 flags
|= DRM_MODE_FLAG_NHSYNC
;
112 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
113 flags
|= DRM_MODE_FLAG_PVSYNC
;
115 flags
|= DRM_MODE_FLAG_NVSYNC
;
120 static void intel_crt_get_config(struct intel_encoder
*encoder
,
121 struct intel_crtc_state
*pipe_config
)
123 struct drm_device
*dev
= encoder
->base
.dev
;
126 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
128 dotclock
= pipe_config
->port_clock
;
130 if (HAS_PCH_SPLIT(dev
))
131 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
133 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
136 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
137 struct intel_crtc_state
*pipe_config
)
139 intel_ddi_get_config(encoder
, pipe_config
);
141 pipe_config
->base
.adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
142 DRM_MODE_FLAG_NHSYNC
|
143 DRM_MODE_FLAG_PVSYNC
|
144 DRM_MODE_FLAG_NVSYNC
);
145 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
148 /* Note: The caller is required to filter out dpms modes not supported by the
150 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
152 struct drm_device
*dev
= encoder
->base
.dev
;
153 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
154 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
155 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
156 const struct drm_display_mode
*adjusted_mode
= &crtc
->config
->base
.adjusted_mode
;
159 if (INTEL_INFO(dev
)->gen
>= 5)
160 adpa
= ADPA_HOTPLUG_BITS
;
164 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
165 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
166 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
167 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
169 /* For CPT allow 3 pipe config, for others just use A or B */
170 if (HAS_PCH_LPT(dev
))
171 ; /* Those bits don't exist here */
172 else if (HAS_PCH_CPT(dev
))
173 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
174 else if (crtc
->pipe
== 0)
175 adpa
|= ADPA_PIPE_A_SELECT
;
177 adpa
|= ADPA_PIPE_B_SELECT
;
179 if (!HAS_PCH_SPLIT(dev
))
180 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
183 case DRM_MODE_DPMS_ON
:
184 adpa
|= ADPA_DAC_ENABLE
;
186 case DRM_MODE_DPMS_STANDBY
:
187 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
189 case DRM_MODE_DPMS_SUSPEND
:
190 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
192 case DRM_MODE_DPMS_OFF
:
193 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
197 I915_WRITE(crt
->adpa_reg
, adpa
);
200 static void intel_disable_crt(struct intel_encoder
*encoder
)
202 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
205 static void pch_disable_crt(struct intel_encoder
*encoder
)
209 static void pch_post_disable_crt(struct intel_encoder
*encoder
)
211 intel_disable_crt(encoder
);
214 static void intel_enable_crt(struct intel_encoder
*encoder
)
216 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_ON
);
219 static enum drm_mode_status
220 intel_crt_mode_valid(struct drm_connector
*connector
,
221 struct drm_display_mode
*mode
)
223 struct drm_device
*dev
= connector
->dev
;
224 int max_dotclk
= to_i915(dev
)->max_dotclk_freq
;
227 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
228 return MODE_NO_DBLESCAN
;
230 if (mode
->clock
< 25000)
231 return MODE_CLOCK_LOW
;
237 if (mode
->clock
> max_clock
)
238 return MODE_CLOCK_HIGH
;
240 if (mode
->clock
> max_dotclk
)
241 return MODE_CLOCK_HIGH
;
243 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
244 if (HAS_PCH_LPT(dev
) &&
245 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
246 return MODE_CLOCK_HIGH
;
251 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
252 struct intel_crtc_state
*pipe_config
)
254 struct drm_device
*dev
= encoder
->base
.dev
;
256 if (HAS_PCH_SPLIT(dev
))
257 pipe_config
->has_pch_encoder
= true;
259 /* LPT FDI RX only supports 8bpc. */
260 if (HAS_PCH_LPT(dev
)) {
261 if (pipe_config
->bw_constrained
&& pipe_config
->pipe_bpp
< 24) {
262 DRM_DEBUG_KMS("LPT only supports 24bpp\n");
266 pipe_config
->pipe_bpp
= 24;
269 /* FDI must always be 2.7 GHz */
271 pipe_config
->ddi_pll_sel
= PORT_CLK_SEL_SPLL
;
272 pipe_config
->port_clock
= 135000 * 2;
274 pipe_config
->dpll_hw_state
.wrpll
= 0;
275 pipe_config
->dpll_hw_state
.spll
=
276 SPLL_PLL_ENABLE
| SPLL_PLL_FREQ_1350MHz
| SPLL_PLL_SSC
;
282 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
284 struct drm_device
*dev
= connector
->dev
;
285 struct intel_crt
*crt
= intel_attached_crt(connector
);
286 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
290 /* The first time through, trigger an explicit detection cycle */
291 if (crt
->force_hotplug_required
) {
292 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
295 crt
->force_hotplug_required
= 0;
297 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
298 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
300 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
302 adpa
&= ~ADPA_DAC_ENABLE
;
304 I915_WRITE(crt
->adpa_reg
, adpa
);
306 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
308 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
311 I915_WRITE(crt
->adpa_reg
, save_adpa
);
312 POSTING_READ(crt
->adpa_reg
);
316 /* Check the status to see if both blue and green are on now */
317 adpa
= I915_READ(crt
->adpa_reg
);
318 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
322 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
327 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
329 struct drm_device
*dev
= connector
->dev
;
330 struct intel_crt
*crt
= intel_attached_crt(connector
);
331 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
336 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
337 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
339 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
341 I915_WRITE(crt
->adpa_reg
, adpa
);
343 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
345 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
346 I915_WRITE(crt
->adpa_reg
, save_adpa
);
349 /* Check the status to see if both blue and green are on now */
350 adpa
= I915_READ(crt
->adpa_reg
);
351 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
356 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
362 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
364 * Not for i915G/i915GM
366 * \return true if CRT is connected.
367 * \return false if CRT is disconnected.
369 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
371 struct drm_device
*dev
= connector
->dev
;
372 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
377 if (HAS_PCH_SPLIT(dev
))
378 return intel_ironlake_crt_detect_hotplug(connector
);
380 if (IS_VALLEYVIEW(dev
))
381 return valleyview_crt_detect_hotplug(connector
);
384 * On 4 series desktop, CRT detect sequence need to be done twice
385 * to get a reliable result.
388 if (IS_G4X(dev
) && !IS_GM45(dev
))
393 for (i
= 0; i
< tries
; i
++) {
394 /* turn on the FORCE_DETECT */
395 i915_hotplug_interrupt_update(dev_priv
,
396 CRT_HOTPLUG_FORCE_DETECT
,
397 CRT_HOTPLUG_FORCE_DETECT
);
398 /* wait for FORCE_DETECT to go off */
399 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
400 CRT_HOTPLUG_FORCE_DETECT
) == 0,
402 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
405 stat
= I915_READ(PORT_HOTPLUG_STAT
);
406 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
409 /* clear the interrupt we just generated, if any */
410 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
412 i915_hotplug_interrupt_update(dev_priv
, CRT_HOTPLUG_FORCE_DETECT
, 0);
417 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
418 struct i2c_adapter
*i2c
)
422 edid
= drm_get_edid(connector
, i2c
);
424 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
425 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
426 intel_gmbus_force_bit(i2c
, true);
427 edid
= drm_get_edid(connector
, i2c
);
428 intel_gmbus_force_bit(i2c
, false);
434 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
435 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
436 struct i2c_adapter
*adapter
)
441 edid
= intel_crt_get_edid(connector
, adapter
);
445 ret
= intel_connector_update_modes(connector
, edid
);
451 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
453 struct intel_crt
*crt
= intel_attached_crt(connector
);
454 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
456 struct i2c_adapter
*i2c
;
458 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
460 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
461 edid
= intel_crt_get_edid(connector
, i2c
);
464 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
467 * This may be a DVI-I connector with a shared DDC
468 * link between analog and digital outputs, so we
469 * have to check the EDID input spec of the attached device.
472 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
476 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
478 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
486 static enum drm_connector_status
487 intel_crt_load_detect(struct intel_crt
*crt
, uint32_t pipe
)
489 struct drm_device
*dev
= crt
->base
.base
.dev
;
490 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
491 uint32_t save_bclrpat
;
492 uint32_t save_vtotal
;
493 uint32_t vtotal
, vactive
;
495 uint32_t vblank
, vblank_start
, vblank_end
;
497 i915_reg_t bclrpat_reg
, vtotal_reg
,
498 vblank_reg
, vsync_reg
, pipeconf_reg
, pipe_dsl_reg
;
500 enum drm_connector_status status
;
502 DRM_DEBUG_KMS("starting load-detect on CRT\n");
504 bclrpat_reg
= BCLRPAT(pipe
);
505 vtotal_reg
= VTOTAL(pipe
);
506 vblank_reg
= VBLANK(pipe
);
507 vsync_reg
= VSYNC(pipe
);
508 pipeconf_reg
= PIPECONF(pipe
);
509 pipe_dsl_reg
= PIPEDSL(pipe
);
511 save_bclrpat
= I915_READ(bclrpat_reg
);
512 save_vtotal
= I915_READ(vtotal_reg
);
513 vblank
= I915_READ(vblank_reg
);
515 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
516 vactive
= (save_vtotal
& 0x7ff) + 1;
518 vblank_start
= (vblank
& 0xfff) + 1;
519 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
521 /* Set the border color to purple. */
522 I915_WRITE(bclrpat_reg
, 0x500050);
525 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
526 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
527 POSTING_READ(pipeconf_reg
);
528 /* Wait for next Vblank to substitue
529 * border color for Color info */
530 intel_wait_for_vblank(dev
, pipe
);
531 st00
= I915_READ8(_VGA_MSR_WRITE
);
532 status
= ((st00
& (1 << 4)) != 0) ?
533 connector_status_connected
:
534 connector_status_disconnected
;
536 I915_WRITE(pipeconf_reg
, pipeconf
);
538 bool restore_vblank
= false;
542 * If there isn't any border, add some.
543 * Yes, this will flicker
545 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
546 uint32_t vsync
= I915_READ(vsync_reg
);
547 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
549 vblank_start
= vsync_start
;
550 I915_WRITE(vblank_reg
,
552 ((vblank_end
- 1) << 16));
553 restore_vblank
= true;
555 /* sample in the vertical border, selecting the larger one */
556 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
557 vsample
= (vblank_start
+ vactive
) >> 1;
559 vsample
= (vtotal
+ vblank_end
) >> 1;
562 * Wait for the border to be displayed
564 while (I915_READ(pipe_dsl_reg
) >= vactive
)
566 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
569 * Watch ST00 for an entire scanline
575 /* Read the ST00 VGA status register */
576 st00
= I915_READ8(_VGA_MSR_WRITE
);
579 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
581 /* restore vblank if necessary */
583 I915_WRITE(vblank_reg
, vblank
);
585 * If more than 3/4 of the scanline detected a monitor,
586 * then it is assumed to be present. This works even on i830,
587 * where there isn't any way to force the border color across
590 status
= detect
* 4 > count
* 3 ?
591 connector_status_connected
:
592 connector_status_disconnected
;
595 /* Restore previous settings */
596 I915_WRITE(bclrpat_reg
, save_bclrpat
);
601 static enum drm_connector_status
602 intel_crt_detect(struct drm_connector
*connector
, bool force
)
604 struct drm_device
*dev
= connector
->dev
;
605 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
606 struct intel_crt
*crt
= intel_attached_crt(connector
);
607 struct intel_encoder
*intel_encoder
= &crt
->base
;
608 enum intel_display_power_domain power_domain
;
609 enum drm_connector_status status
;
610 struct intel_load_detect_pipe tmp
;
611 struct drm_modeset_acquire_ctx ctx
;
613 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
614 connector
->base
.id
, connector
->name
,
617 power_domain
= intel_display_port_power_domain(intel_encoder
);
618 intel_display_power_get(dev_priv
, power_domain
);
620 if (I915_HAS_HOTPLUG(dev
)) {
621 /* We can not rely on the HPD pin always being correctly wired
622 * up, for example many KVM do not pass it through, and so
623 * only trust an assertion that the monitor is connected.
625 if (intel_crt_detect_hotplug(connector
)) {
626 DRM_DEBUG_KMS("CRT detected via hotplug\n");
627 status
= connector_status_connected
;
630 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
633 if (intel_crt_detect_ddc(connector
)) {
634 status
= connector_status_connected
;
638 /* Load detection is broken on HPD capable machines. Whoever wants a
639 * broken monitor (without edid) to work behind a broken kvm (that fails
640 * to have the right resistors for HP detection) needs to fix this up.
641 * For now just bail out. */
642 if (I915_HAS_HOTPLUG(dev
) && !i915
.load_detect_test
) {
643 status
= connector_status_disconnected
;
648 status
= connector
->status
;
652 drm_modeset_acquire_init(&ctx
, 0);
654 /* for pre-945g platforms use load detect */
655 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
656 if (intel_crt_detect_ddc(connector
))
657 status
= connector_status_connected
;
658 else if (INTEL_INFO(dev
)->gen
< 4)
659 status
= intel_crt_load_detect(crt
,
660 to_intel_crtc(connector
->state
->crtc
)->pipe
);
662 status
= connector_status_unknown
;
663 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
665 status
= connector_status_unknown
;
667 drm_modeset_drop_locks(&ctx
);
668 drm_modeset_acquire_fini(&ctx
);
671 intel_display_power_put(dev_priv
, power_domain
);
675 static void intel_crt_destroy(struct drm_connector
*connector
)
677 drm_connector_cleanup(connector
);
681 static int intel_crt_get_modes(struct drm_connector
*connector
)
683 struct drm_device
*dev
= connector
->dev
;
684 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
685 struct intel_crt
*crt
= intel_attached_crt(connector
);
686 struct intel_encoder
*intel_encoder
= &crt
->base
;
687 enum intel_display_power_domain power_domain
;
689 struct i2c_adapter
*i2c
;
691 power_domain
= intel_display_port_power_domain(intel_encoder
);
692 intel_display_power_get(dev_priv
, power_domain
);
694 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
695 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
696 if (ret
|| !IS_G4X(dev
))
699 /* Try to probe digital port for output in DVI-I -> VGA mode. */
700 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PIN_DPB
);
701 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
704 intel_display_power_put(dev_priv
, power_domain
);
709 static int intel_crt_set_property(struct drm_connector
*connector
,
710 struct drm_property
*property
,
716 static void intel_crt_reset(struct drm_connector
*connector
)
718 struct drm_device
*dev
= connector
->dev
;
719 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
720 struct intel_crt
*crt
= intel_attached_crt(connector
);
722 if (INTEL_INFO(dev
)->gen
>= 5) {
725 adpa
= I915_READ(crt
->adpa_reg
);
726 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
727 adpa
|= ADPA_HOTPLUG_BITS
;
728 I915_WRITE(crt
->adpa_reg
, adpa
);
729 POSTING_READ(crt
->adpa_reg
);
731 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa
);
732 crt
->force_hotplug_required
= 1;
738 * Routines for controlling stuff on the analog port
741 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
742 .reset
= intel_crt_reset
,
743 .dpms
= drm_atomic_helper_connector_dpms
,
744 .detect
= intel_crt_detect
,
745 .fill_modes
= drm_helper_probe_single_connector_modes
,
746 .destroy
= intel_crt_destroy
,
747 .set_property
= intel_crt_set_property
,
748 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
749 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
750 .atomic_get_property
= intel_connector_atomic_get_property
,
753 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
754 .mode_valid
= intel_crt_mode_valid
,
755 .get_modes
= intel_crt_get_modes
,
756 .best_encoder
= intel_best_encoder
,
759 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
760 .destroy
= intel_encoder_destroy
,
763 static int intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
765 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
769 static const struct dmi_system_id intel_no_crt
[] = {
771 .callback
= intel_no_crt_dmi_callback
,
774 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
775 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
779 .callback
= intel_no_crt_dmi_callback
,
780 .ident
= "DELL XPS 8700",
782 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
783 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
789 void intel_crt_init(struct drm_device
*dev
)
791 struct drm_connector
*connector
;
792 struct intel_crt
*crt
;
793 struct intel_connector
*intel_connector
;
794 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
798 /* Skip machines without VGA that falsely report hotplug events */
799 if (dmi_check_system(intel_no_crt
))
802 if (HAS_PCH_SPLIT(dev
))
804 else if (IS_VALLEYVIEW(dev
))
809 adpa
= I915_READ(adpa_reg
);
810 if ((adpa
& ADPA_DAC_ENABLE
) == 0) {
812 * On some machines (some IVB at least) CRT can be
813 * fused off, but there's no known fuse bit to
814 * indicate that. On these machine the ADPA register
815 * works normally, except the DAC enable bit won't
816 * take. So the only way to tell is attempt to enable
817 * it and see what happens.
819 I915_WRITE(adpa_reg
, adpa
| ADPA_DAC_ENABLE
|
820 ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
821 if ((I915_READ(adpa_reg
) & ADPA_DAC_ENABLE
) == 0)
823 I915_WRITE(adpa_reg
, adpa
);
826 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
830 intel_connector
= intel_connector_alloc();
831 if (!intel_connector
) {
836 connector
= &intel_connector
->base
;
837 crt
->connector
= intel_connector
;
838 drm_connector_init(dev
, &intel_connector
->base
,
839 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
841 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
842 DRM_MODE_ENCODER_DAC
, NULL
);
844 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
846 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
847 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
849 crt
->base
.crtc_mask
= (1 << 0);
851 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
854 connector
->interlace_allowed
= 0;
856 connector
->interlace_allowed
= 1;
857 connector
->doublescan_allowed
= 0;
859 crt
->adpa_reg
= adpa_reg
;
861 crt
->base
.compute_config
= intel_crt_compute_config
;
862 if (HAS_PCH_SPLIT(dev
)) {
863 crt
->base
.disable
= pch_disable_crt
;
864 crt
->base
.post_disable
= pch_post_disable_crt
;
866 crt
->base
.disable
= intel_disable_crt
;
868 crt
->base
.enable
= intel_enable_crt
;
869 if (I915_HAS_HOTPLUG(dev
))
870 crt
->base
.hpd_pin
= HPD_CRT
;
872 crt
->base
.get_config
= hsw_crt_get_config
;
873 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
875 crt
->base
.get_config
= intel_crt_get_config
;
876 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
878 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
879 intel_connector
->unregister
= intel_connector_unregister
;
881 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
883 drm_connector_register(connector
);
885 if (!I915_HAS_HOTPLUG(dev
))
886 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
889 * Configure the automatic hotplug detection stuff
891 crt
->force_hotplug_required
= 0;
894 * TODO: find a proper way to discover whether we need to set the the
895 * polarity and link reversal bits or not, instead of relying on the
898 if (HAS_PCH_LPT(dev
)) {
899 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
900 FDI_RX_LINK_REVERSAL_OVERRIDE
;
902 dev_priv
->fdi_rx_config
= I915_READ(FDI_RX_CTL(PIPE_A
)) & fdi_config
;
905 intel_crt_reset(connector
);