2 * Copyright © 2006-2007 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_crtc.h>
33 #include <drm/drm_crtc_helper.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
39 /* Here's the desired hotplug mode */
40 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \
41 ADPA_CRT_HOTPLUG_WARMUP_10MS | \
42 ADPA_CRT_HOTPLUG_SAMPLE_4S | \
43 ADPA_CRT_HOTPLUG_VOLTAGE_50 | \
44 ADPA_CRT_HOTPLUG_VOLREF_325MV | \
45 ADPA_CRT_HOTPLUG_ENABLE)
48 struct intel_encoder base
;
49 /* DPMS state is stored in the connector, which we need in the
50 * encoder's enable/disable callbacks */
51 struct intel_connector
*connector
;
52 bool force_hotplug_required
;
56 static struct intel_crt
*intel_encoder_to_crt(struct intel_encoder
*encoder
)
58 return container_of(encoder
, struct intel_crt
, base
);
61 static struct intel_crt
*intel_attached_crt(struct drm_connector
*connector
)
63 return intel_encoder_to_crt(intel_attached_encoder(connector
));
66 static bool intel_crt_get_hw_state(struct intel_encoder
*encoder
,
69 struct drm_device
*dev
= encoder
->base
.dev
;
70 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
71 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
72 enum intel_display_power_domain power_domain
;
75 power_domain
= intel_display_port_power_domain(encoder
);
76 if (!intel_display_power_is_enabled(dev_priv
, power_domain
))
79 tmp
= I915_READ(crt
->adpa_reg
);
81 if (!(tmp
& ADPA_DAC_ENABLE
))
85 *pipe
= PORT_TO_PIPE_CPT(tmp
);
87 *pipe
= PORT_TO_PIPE(tmp
);
92 static unsigned int intel_crt_get_flags(struct intel_encoder
*encoder
)
94 struct drm_i915_private
*dev_priv
= encoder
->base
.dev
->dev_private
;
95 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
98 tmp
= I915_READ(crt
->adpa_reg
);
100 if (tmp
& ADPA_HSYNC_ACTIVE_HIGH
)
101 flags
|= DRM_MODE_FLAG_PHSYNC
;
103 flags
|= DRM_MODE_FLAG_NHSYNC
;
105 if (tmp
& ADPA_VSYNC_ACTIVE_HIGH
)
106 flags
|= DRM_MODE_FLAG_PVSYNC
;
108 flags
|= DRM_MODE_FLAG_NVSYNC
;
113 static void intel_crt_get_config(struct intel_encoder
*encoder
,
114 struct intel_crtc_state
*pipe_config
)
116 struct drm_device
*dev
= encoder
->base
.dev
;
119 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
121 dotclock
= pipe_config
->port_clock
;
123 if (HAS_PCH_SPLIT(dev
))
124 ironlake_check_encoder_dotclock(pipe_config
, dotclock
);
126 pipe_config
->base
.adjusted_mode
.crtc_clock
= dotclock
;
129 static void hsw_crt_get_config(struct intel_encoder
*encoder
,
130 struct intel_crtc_state
*pipe_config
)
132 intel_ddi_get_config(encoder
, pipe_config
);
134 pipe_config
->base
.adjusted_mode
.flags
&= ~(DRM_MODE_FLAG_PHSYNC
|
135 DRM_MODE_FLAG_NHSYNC
|
136 DRM_MODE_FLAG_PVSYNC
|
137 DRM_MODE_FLAG_NVSYNC
);
138 pipe_config
->base
.adjusted_mode
.flags
|= intel_crt_get_flags(encoder
);
141 /* Note: The caller is required to filter out dpms modes not supported by the
143 static void intel_crt_set_dpms(struct intel_encoder
*encoder
, int mode
)
145 struct drm_device
*dev
= encoder
->base
.dev
;
146 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
147 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
148 struct intel_crtc
*crtc
= to_intel_crtc(encoder
->base
.crtc
);
149 const struct drm_display_mode
*adjusted_mode
= &crtc
->config
->base
.adjusted_mode
;
152 if (INTEL_INFO(dev
)->gen
>= 5)
153 adpa
= ADPA_HOTPLUG_BITS
;
157 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
158 adpa
|= ADPA_HSYNC_ACTIVE_HIGH
;
159 if (adjusted_mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
160 adpa
|= ADPA_VSYNC_ACTIVE_HIGH
;
162 /* For CPT allow 3 pipe config, for others just use A or B */
163 if (HAS_PCH_LPT(dev
))
164 ; /* Those bits don't exist here */
165 else if (HAS_PCH_CPT(dev
))
166 adpa
|= PORT_TRANS_SEL_CPT(crtc
->pipe
);
167 else if (crtc
->pipe
== 0)
168 adpa
|= ADPA_PIPE_A_SELECT
;
170 adpa
|= ADPA_PIPE_B_SELECT
;
172 if (!HAS_PCH_SPLIT(dev
))
173 I915_WRITE(BCLRPAT(crtc
->pipe
), 0);
176 case DRM_MODE_DPMS_ON
:
177 adpa
|= ADPA_DAC_ENABLE
;
179 case DRM_MODE_DPMS_STANDBY
:
180 adpa
|= ADPA_DAC_ENABLE
| ADPA_HSYNC_CNTL_DISABLE
;
182 case DRM_MODE_DPMS_SUSPEND
:
183 adpa
|= ADPA_DAC_ENABLE
| ADPA_VSYNC_CNTL_DISABLE
;
185 case DRM_MODE_DPMS_OFF
:
186 adpa
|= ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
;
190 I915_WRITE(crt
->adpa_reg
, adpa
);
193 static void intel_disable_crt(struct intel_encoder
*encoder
)
195 intel_crt_set_dpms(encoder
, DRM_MODE_DPMS_OFF
);
198 static void pch_disable_crt(struct intel_encoder
*encoder
)
202 static void pch_post_disable_crt(struct intel_encoder
*encoder
)
204 intel_disable_crt(encoder
);
207 static void intel_enable_crt(struct intel_encoder
*encoder
)
209 struct intel_crt
*crt
= intel_encoder_to_crt(encoder
);
211 intel_crt_set_dpms(encoder
, crt
->connector
->base
.dpms
);
214 static enum drm_mode_status
215 intel_crt_mode_valid(struct drm_connector
*connector
,
216 struct drm_display_mode
*mode
)
218 struct drm_device
*dev
= connector
->dev
;
221 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
222 return MODE_NO_DBLESCAN
;
224 if (mode
->clock
< 25000)
225 return MODE_CLOCK_LOW
;
231 if (mode
->clock
> max_clock
)
232 return MODE_CLOCK_HIGH
;
234 /* The FDI receiver on LPT only supports 8bpc and only has 2 lanes. */
235 if (HAS_PCH_LPT(dev
) &&
236 (ironlake_get_lanes_required(mode
->clock
, 270000, 24) > 2))
237 return MODE_CLOCK_HIGH
;
242 static bool intel_crt_compute_config(struct intel_encoder
*encoder
,
243 struct intel_crtc_state
*pipe_config
)
245 struct drm_device
*dev
= encoder
->base
.dev
;
247 if (HAS_PCH_SPLIT(dev
))
248 pipe_config
->has_pch_encoder
= true;
250 /* LPT FDI RX only supports 8bpc. */
251 if (HAS_PCH_LPT(dev
))
252 pipe_config
->pipe_bpp
= 24;
254 /* FDI must always be 2.7 GHz */
256 pipe_config
->ddi_pll_sel
= PORT_CLK_SEL_SPLL
;
257 pipe_config
->port_clock
= 135000 * 2;
259 pipe_config
->dpll_hw_state
.wrpll
= 0;
260 pipe_config
->dpll_hw_state
.spll
=
261 SPLL_PLL_ENABLE
| SPLL_PLL_FREQ_1350MHz
| SPLL_PLL_SSC
;
267 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector
*connector
)
269 struct drm_device
*dev
= connector
->dev
;
270 struct intel_crt
*crt
= intel_attached_crt(connector
);
271 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
275 /* The first time through, trigger an explicit detection cycle */
276 if (crt
->force_hotplug_required
) {
277 bool turn_off_dac
= HAS_PCH_SPLIT(dev
);
280 crt
->force_hotplug_required
= 0;
282 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
283 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
285 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
287 adpa
&= ~ADPA_DAC_ENABLE
;
289 I915_WRITE(crt
->adpa_reg
, adpa
);
291 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
293 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
296 I915_WRITE(crt
->adpa_reg
, save_adpa
);
297 POSTING_READ(crt
->adpa_reg
);
301 /* Check the status to see if both blue and green are on now */
302 adpa
= I915_READ(crt
->adpa_reg
);
303 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
307 DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa
, ret
);
312 static bool valleyview_crt_detect_hotplug(struct drm_connector
*connector
)
314 struct drm_device
*dev
= connector
->dev
;
315 struct intel_crt
*crt
= intel_attached_crt(connector
);
316 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
321 save_adpa
= adpa
= I915_READ(crt
->adpa_reg
);
322 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa
);
324 adpa
|= ADPA_CRT_HOTPLUG_FORCE_TRIGGER
;
326 I915_WRITE(crt
->adpa_reg
, adpa
);
328 if (wait_for((I915_READ(crt
->adpa_reg
) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER
) == 0,
330 DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
331 I915_WRITE(crt
->adpa_reg
, save_adpa
);
334 /* Check the status to see if both blue and green are on now */
335 adpa
= I915_READ(crt
->adpa_reg
);
336 if ((adpa
& ADPA_CRT_HOTPLUG_MONITOR_MASK
) != 0)
341 DRM_DEBUG_KMS("valleyview hotplug adpa=0x%x, result %d\n", adpa
, ret
);
347 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
349 * Not for i915G/i915GM
351 * \return true if CRT is connected.
352 * \return false if CRT is disconnected.
354 static bool intel_crt_detect_hotplug(struct drm_connector
*connector
)
356 struct drm_device
*dev
= connector
->dev
;
357 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
362 if (HAS_PCH_SPLIT(dev
))
363 return intel_ironlake_crt_detect_hotplug(connector
);
365 if (IS_VALLEYVIEW(dev
))
366 return valleyview_crt_detect_hotplug(connector
);
369 * On 4 series desktop, CRT detect sequence need to be done twice
370 * to get a reliable result.
373 if (IS_G4X(dev
) && !IS_GM45(dev
))
378 for (i
= 0; i
< tries
; i
++) {
379 /* turn on the FORCE_DETECT */
380 i915_hotplug_interrupt_update(dev_priv
,
381 CRT_HOTPLUG_FORCE_DETECT
,
382 CRT_HOTPLUG_FORCE_DETECT
);
383 /* wait for FORCE_DETECT to go off */
384 if (wait_for((I915_READ(PORT_HOTPLUG_EN
) &
385 CRT_HOTPLUG_FORCE_DETECT
) == 0,
387 DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
390 stat
= I915_READ(PORT_HOTPLUG_STAT
);
391 if ((stat
& CRT_HOTPLUG_MONITOR_MASK
) != CRT_HOTPLUG_MONITOR_NONE
)
394 /* clear the interrupt we just generated, if any */
395 I915_WRITE(PORT_HOTPLUG_STAT
, CRT_HOTPLUG_INT_STATUS
);
397 i915_hotplug_interrupt_update(dev_priv
, CRT_HOTPLUG_FORCE_DETECT
, 0);
402 static struct edid
*intel_crt_get_edid(struct drm_connector
*connector
,
403 struct i2c_adapter
*i2c
)
407 edid
= drm_get_edid(connector
, i2c
);
409 if (!edid
&& !intel_gmbus_is_forced_bit(i2c
)) {
410 DRM_DEBUG_KMS("CRT GMBUS EDID read failed, retry using GPIO bit-banging\n");
411 intel_gmbus_force_bit(i2c
, true);
412 edid
= drm_get_edid(connector
, i2c
);
413 intel_gmbus_force_bit(i2c
, false);
419 /* local version of intel_ddc_get_modes() to use intel_crt_get_edid() */
420 static int intel_crt_ddc_get_modes(struct drm_connector
*connector
,
421 struct i2c_adapter
*adapter
)
426 edid
= intel_crt_get_edid(connector
, adapter
);
430 ret
= intel_connector_update_modes(connector
, edid
);
436 static bool intel_crt_detect_ddc(struct drm_connector
*connector
)
438 struct intel_crt
*crt
= intel_attached_crt(connector
);
439 struct drm_i915_private
*dev_priv
= crt
->base
.base
.dev
->dev_private
;
441 struct i2c_adapter
*i2c
;
443 BUG_ON(crt
->base
.type
!= INTEL_OUTPUT_ANALOG
);
445 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
446 edid
= intel_crt_get_edid(connector
, i2c
);
449 bool is_digital
= edid
->input
& DRM_EDID_INPUT_DIGITAL
;
452 * This may be a DVI-I connector with a shared DDC
453 * link between analog and digital outputs, so we
454 * have to check the EDID input spec of the attached device.
457 DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
461 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
463 DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [no valid EDID found]\n");
471 static enum drm_connector_status
472 intel_crt_load_detect(struct intel_crt
*crt
)
474 struct drm_device
*dev
= crt
->base
.base
.dev
;
475 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
476 uint32_t pipe
= to_intel_crtc(crt
->base
.base
.crtc
)->pipe
;
477 uint32_t save_bclrpat
;
478 uint32_t save_vtotal
;
479 uint32_t vtotal
, vactive
;
481 uint32_t vblank
, vblank_start
, vblank_end
;
483 i915_reg_t bclrpat_reg
, vtotal_reg
,
484 vblank_reg
, vsync_reg
, pipeconf_reg
, pipe_dsl_reg
;
486 enum drm_connector_status status
;
488 DRM_DEBUG_KMS("starting load-detect on CRT\n");
490 bclrpat_reg
= BCLRPAT(pipe
);
491 vtotal_reg
= VTOTAL(pipe
);
492 vblank_reg
= VBLANK(pipe
);
493 vsync_reg
= VSYNC(pipe
);
494 pipeconf_reg
= PIPECONF(pipe
);
495 pipe_dsl_reg
= PIPEDSL(pipe
);
497 save_bclrpat
= I915_READ(bclrpat_reg
);
498 save_vtotal
= I915_READ(vtotal_reg
);
499 vblank
= I915_READ(vblank_reg
);
501 vtotal
= ((save_vtotal
>> 16) & 0xfff) + 1;
502 vactive
= (save_vtotal
& 0x7ff) + 1;
504 vblank_start
= (vblank
& 0xfff) + 1;
505 vblank_end
= ((vblank
>> 16) & 0xfff) + 1;
507 /* Set the border color to purple. */
508 I915_WRITE(bclrpat_reg
, 0x500050);
511 uint32_t pipeconf
= I915_READ(pipeconf_reg
);
512 I915_WRITE(pipeconf_reg
, pipeconf
| PIPECONF_FORCE_BORDER
);
513 POSTING_READ(pipeconf_reg
);
514 /* Wait for next Vblank to substitue
515 * border color for Color info */
516 intel_wait_for_vblank(dev
, pipe
);
517 st00
= I915_READ8(_VGA_MSR_WRITE
);
518 status
= ((st00
& (1 << 4)) != 0) ?
519 connector_status_connected
:
520 connector_status_disconnected
;
522 I915_WRITE(pipeconf_reg
, pipeconf
);
524 bool restore_vblank
= false;
528 * If there isn't any border, add some.
529 * Yes, this will flicker
531 if (vblank_start
<= vactive
&& vblank_end
>= vtotal
) {
532 uint32_t vsync
= I915_READ(vsync_reg
);
533 uint32_t vsync_start
= (vsync
& 0xffff) + 1;
535 vblank_start
= vsync_start
;
536 I915_WRITE(vblank_reg
,
538 ((vblank_end
- 1) << 16));
539 restore_vblank
= true;
541 /* sample in the vertical border, selecting the larger one */
542 if (vblank_start
- vactive
>= vtotal
- vblank_end
)
543 vsample
= (vblank_start
+ vactive
) >> 1;
545 vsample
= (vtotal
+ vblank_end
) >> 1;
548 * Wait for the border to be displayed
550 while (I915_READ(pipe_dsl_reg
) >= vactive
)
552 while ((dsl
= I915_READ(pipe_dsl_reg
)) <= vsample
)
555 * Watch ST00 for an entire scanline
561 /* Read the ST00 VGA status register */
562 st00
= I915_READ8(_VGA_MSR_WRITE
);
565 } while ((I915_READ(pipe_dsl_reg
) == dsl
));
567 /* restore vblank if necessary */
569 I915_WRITE(vblank_reg
, vblank
);
571 * If more than 3/4 of the scanline detected a monitor,
572 * then it is assumed to be present. This works even on i830,
573 * where there isn't any way to force the border color across
576 status
= detect
* 4 > count
* 3 ?
577 connector_status_connected
:
578 connector_status_disconnected
;
581 /* Restore previous settings */
582 I915_WRITE(bclrpat_reg
, save_bclrpat
);
587 static enum drm_connector_status
588 intel_crt_detect(struct drm_connector
*connector
, bool force
)
590 struct drm_device
*dev
= connector
->dev
;
591 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
592 struct intel_crt
*crt
= intel_attached_crt(connector
);
593 struct intel_encoder
*intel_encoder
= &crt
->base
;
594 enum intel_display_power_domain power_domain
;
595 enum drm_connector_status status
;
596 struct intel_load_detect_pipe tmp
;
597 struct drm_modeset_acquire_ctx ctx
;
599 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] force=%d\n",
600 connector
->base
.id
, connector
->name
,
603 power_domain
= intel_display_port_power_domain(intel_encoder
);
604 intel_display_power_get(dev_priv
, power_domain
);
606 if (I915_HAS_HOTPLUG(dev
)) {
607 /* We can not rely on the HPD pin always being correctly wired
608 * up, for example many KVM do not pass it through, and so
609 * only trust an assertion that the monitor is connected.
611 if (intel_crt_detect_hotplug(connector
)) {
612 DRM_DEBUG_KMS("CRT detected via hotplug\n");
613 status
= connector_status_connected
;
616 DRM_DEBUG_KMS("CRT not detected via hotplug\n");
619 if (intel_crt_detect_ddc(connector
)) {
620 status
= connector_status_connected
;
624 /* Load detection is broken on HPD capable machines. Whoever wants a
625 * broken monitor (without edid) to work behind a broken kvm (that fails
626 * to have the right resistors for HP detection) needs to fix this up.
627 * For now just bail out. */
628 if (I915_HAS_HOTPLUG(dev
) && !i915
.load_detect_test
) {
629 status
= connector_status_disconnected
;
634 status
= connector
->status
;
638 drm_modeset_acquire_init(&ctx
, 0);
640 /* for pre-945g platforms use load detect */
641 if (intel_get_load_detect_pipe(connector
, NULL
, &tmp
, &ctx
)) {
642 if (intel_crt_detect_ddc(connector
))
643 status
= connector_status_connected
;
644 else if (INTEL_INFO(dev
)->gen
< 4)
645 status
= intel_crt_load_detect(crt
);
647 status
= connector_status_unknown
;
648 intel_release_load_detect_pipe(connector
, &tmp
, &ctx
);
650 status
= connector_status_unknown
;
652 drm_modeset_drop_locks(&ctx
);
653 drm_modeset_acquire_fini(&ctx
);
656 intel_display_power_put(dev_priv
, power_domain
);
660 static void intel_crt_destroy(struct drm_connector
*connector
)
662 drm_connector_cleanup(connector
);
666 static int intel_crt_get_modes(struct drm_connector
*connector
)
668 struct drm_device
*dev
= connector
->dev
;
669 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
670 struct intel_crt
*crt
= intel_attached_crt(connector
);
671 struct intel_encoder
*intel_encoder
= &crt
->base
;
672 enum intel_display_power_domain power_domain
;
674 struct i2c_adapter
*i2c
;
676 power_domain
= intel_display_port_power_domain(intel_encoder
);
677 intel_display_power_get(dev_priv
, power_domain
);
679 i2c
= intel_gmbus_get_adapter(dev_priv
, dev_priv
->vbt
.crt_ddc_pin
);
680 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
681 if (ret
|| !IS_G4X(dev
))
684 /* Try to probe digital port for output in DVI-I -> VGA mode. */
685 i2c
= intel_gmbus_get_adapter(dev_priv
, GMBUS_PIN_DPB
);
686 ret
= intel_crt_ddc_get_modes(connector
, i2c
);
689 intel_display_power_put(dev_priv
, power_domain
);
694 static int intel_crt_set_property(struct drm_connector
*connector
,
695 struct drm_property
*property
,
701 static void intel_crt_reset(struct drm_connector
*connector
)
703 struct drm_device
*dev
= connector
->dev
;
704 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
705 struct intel_crt
*crt
= intel_attached_crt(connector
);
707 if (INTEL_INFO(dev
)->gen
>= 5) {
710 adpa
= I915_READ(crt
->adpa_reg
);
711 adpa
&= ~ADPA_CRT_HOTPLUG_MASK
;
712 adpa
|= ADPA_HOTPLUG_BITS
;
713 I915_WRITE(crt
->adpa_reg
, adpa
);
714 POSTING_READ(crt
->adpa_reg
);
716 DRM_DEBUG_KMS("crt adpa set to 0x%x\n", adpa
);
717 crt
->force_hotplug_required
= 1;
723 * Routines for controlling stuff on the analog port
726 static const struct drm_connector_funcs intel_crt_connector_funcs
= {
727 .reset
= intel_crt_reset
,
728 .dpms
= drm_atomic_helper_connector_dpms
,
729 .detect
= intel_crt_detect
,
730 .fill_modes
= drm_helper_probe_single_connector_modes
,
731 .destroy
= intel_crt_destroy
,
732 .set_property
= intel_crt_set_property
,
733 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
734 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
735 .atomic_get_property
= intel_connector_atomic_get_property
,
738 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs
= {
739 .mode_valid
= intel_crt_mode_valid
,
740 .get_modes
= intel_crt_get_modes
,
741 .best_encoder
= intel_best_encoder
,
744 static const struct drm_encoder_funcs intel_crt_enc_funcs
= {
745 .destroy
= intel_encoder_destroy
,
748 static int intel_no_crt_dmi_callback(const struct dmi_system_id
*id
)
750 DRM_INFO("Skipping CRT initialization for %s\n", id
->ident
);
754 static const struct dmi_system_id intel_no_crt
[] = {
756 .callback
= intel_no_crt_dmi_callback
,
759 DMI_MATCH(DMI_SYS_VENDOR
, "ACER"),
760 DMI_MATCH(DMI_PRODUCT_NAME
, "ZGB"),
764 .callback
= intel_no_crt_dmi_callback
,
765 .ident
= "DELL XPS 8700",
767 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
768 DMI_MATCH(DMI_PRODUCT_NAME
, "XPS 8700"),
774 void intel_crt_init(struct drm_device
*dev
)
776 struct drm_connector
*connector
;
777 struct intel_crt
*crt
;
778 struct intel_connector
*intel_connector
;
779 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
783 /* Skip machines without VGA that falsely report hotplug events */
784 if (dmi_check_system(intel_no_crt
))
787 if (HAS_PCH_SPLIT(dev
))
789 else if (IS_VALLEYVIEW(dev
))
794 adpa
= I915_READ(adpa_reg
);
795 if ((adpa
& ADPA_DAC_ENABLE
) == 0) {
797 * On some machines (some IVB at least) CRT can be
798 * fused off, but there's no known fuse bit to
799 * indicate that. On these machine the ADPA register
800 * works normally, except the DAC enable bit won't
801 * take. So the only way to tell is attempt to enable
802 * it and see what happens.
804 I915_WRITE(adpa_reg
, adpa
| ADPA_DAC_ENABLE
|
805 ADPA_HSYNC_CNTL_DISABLE
| ADPA_VSYNC_CNTL_DISABLE
);
806 if ((I915_READ(adpa_reg
) & ADPA_DAC_ENABLE
) == 0)
808 I915_WRITE(adpa_reg
, adpa
);
811 crt
= kzalloc(sizeof(struct intel_crt
), GFP_KERNEL
);
815 intel_connector
= intel_connector_alloc();
816 if (!intel_connector
) {
821 connector
= &intel_connector
->base
;
822 crt
->connector
= intel_connector
;
823 drm_connector_init(dev
, &intel_connector
->base
,
824 &intel_crt_connector_funcs
, DRM_MODE_CONNECTOR_VGA
);
826 drm_encoder_init(dev
, &crt
->base
.base
, &intel_crt_enc_funcs
,
827 DRM_MODE_ENCODER_DAC
, NULL
);
829 intel_connector_attach_encoder(intel_connector
, &crt
->base
);
831 crt
->base
.type
= INTEL_OUTPUT_ANALOG
;
832 crt
->base
.cloneable
= (1 << INTEL_OUTPUT_DVO
) | (1 << INTEL_OUTPUT_HDMI
);
834 crt
->base
.crtc_mask
= (1 << 0);
836 crt
->base
.crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
839 connector
->interlace_allowed
= 0;
841 connector
->interlace_allowed
= 1;
842 connector
->doublescan_allowed
= 0;
844 crt
->adpa_reg
= adpa_reg
;
846 crt
->base
.compute_config
= intel_crt_compute_config
;
847 if (HAS_PCH_SPLIT(dev
)) {
848 crt
->base
.disable
= pch_disable_crt
;
849 crt
->base
.post_disable
= pch_post_disable_crt
;
851 crt
->base
.disable
= intel_disable_crt
;
853 crt
->base
.enable
= intel_enable_crt
;
854 if (I915_HAS_HOTPLUG(dev
))
855 crt
->base
.hpd_pin
= HPD_CRT
;
857 crt
->base
.get_config
= hsw_crt_get_config
;
858 crt
->base
.get_hw_state
= intel_ddi_get_hw_state
;
860 crt
->base
.get_config
= intel_crt_get_config
;
861 crt
->base
.get_hw_state
= intel_crt_get_hw_state
;
863 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
864 intel_connector
->unregister
= intel_connector_unregister
;
866 drm_connector_helper_add(connector
, &intel_crt_connector_helper_funcs
);
868 drm_connector_register(connector
);
870 if (!I915_HAS_HOTPLUG(dev
))
871 intel_connector
->polled
= DRM_CONNECTOR_POLL_CONNECT
;
874 * Configure the automatic hotplug detection stuff
876 crt
->force_hotplug_required
= 0;
879 * TODO: find a proper way to discover whether we need to set the the
880 * polarity and link reversal bits or not, instead of relying on the
883 if (HAS_PCH_LPT(dev
)) {
884 u32 fdi_config
= FDI_RX_POLARITY_REVERSED_LPT
|
885 FDI_RX_LINK_REVERSAL_OVERRIDE
;
887 dev_priv
->fdi_rx_config
= I915_READ(FDI_RX_CTL(PIPE_A
)) & fdi_config
;
890 intel_crt_reset(connector
);