drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include "i915_drm.h"
  30 #include "i915_drv.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_fb_helper.h"
  34
  35 #define _wait_for(COND, MS, W) ({ \
  36         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  37         int ret__ = 0;                                                  \
  38         while (!(COND)) {                                               \
  39                 if (time_after(jiffies, timeout__)) {                   \
  40                         ret__ = -ETIMEDOUT;                             \
  41                         break;                                          \
  42                 }                                                       \
  43                 if (W && drm_can_sleep()) msleep(W);    \
  44         }                                                               \
  45         ret__;                                                          \
  46 })
  47
  48 #define wait_for_atomic_us(COND, US) ({ \
  49         int i, ret__ = -ETIMEDOUT;      \
  50         for (i = 0; i < (US); i++) {    \
  51                 if ((COND)) {           \
  52                         ret__ = 0;      \
  53                         break;          \
  54                 }                       \
  55                 udelay(1);              \
  56         }                               \
  57         ret__;                          \
  58 })
  59
  60 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  61 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  62
  63 #define KHz(x) (1000*x)
  64 #define MHz(x) KHz(1000*x)
  65
  66 /*
  67  * Display related stuff
  68  */
  69
  70 /* store information about an Ixxx DVO */
  71 /* The i830->i865 use multiple DVOs with multiple i2cs */
  72 /* the i915, i945 have a single sDVO i2c bus - which is different */
  73 #define MAX_OUTPUTS 6
  74 /* maximum connectors per crtcs in the mode set */
  75 #define INTELFB_CONN_LIMIT 4
  76
  77 #define INTEL_I2C_BUS_DVO 1
  78 #define INTEL_I2C_BUS_SDVO 2
  79
  80 /* these are outputs from the chip - integrated only
  81    external chips are via DVO or SDVO output */
  82 #define INTEL_OUTPUT_UNUSED 0
  83 #define INTEL_OUTPUT_ANALOG 1
  84 #define INTEL_OUTPUT_DVO 2
  85 #define INTEL_OUTPUT_SDVO 3
  86 #define INTEL_OUTPUT_LVDS 4
  87 #define INTEL_OUTPUT_TVOUT 5
  88 #define INTEL_OUTPUT_HDMI 6
  89 #define INTEL_OUTPUT_DISPLAYPORT 7
  90 #define INTEL_OUTPUT_EDP 8
  91
  92 /* Intel Pipe Clone Bit */
  93 #define INTEL_HDMIB_CLONE_BIT 1
  94 #define INTEL_HDMIC_CLONE_BIT 2
  95 #define INTEL_HDMID_CLONE_BIT 3
  96 #define INTEL_HDMIE_CLONE_BIT 4
  97 #define INTEL_HDMIF_CLONE_BIT 5
  98 #define INTEL_SDVO_NON_TV_CLONE_BIT 6
  99 #define INTEL_SDVO_TV_CLONE_BIT 7
 100 #define INTEL_SDVO_LVDS_CLONE_BIT 8
 101 #define INTEL_ANALOG_CLONE_BIT 9
 102 #define INTEL_TV_CLONE_BIT 10
 103 #define INTEL_DP_B_CLONE_BIT 11
 104 #define INTEL_DP_C_CLONE_BIT 12
 105 #define INTEL_DP_D_CLONE_BIT 13
 106 #define INTEL_LVDS_CLONE_BIT 14
 107 #define INTEL_DVO_TMDS_CLONE_BIT 15
 108 #define INTEL_DVO_LVDS_CLONE_BIT 16
 109 #define INTEL_EDP_CLONE_BIT 17
 110
 111 #define INTEL_DVO_CHIP_NONE 0
 112 #define INTEL_DVO_CHIP_LVDS 1
 113 #define INTEL_DVO_CHIP_TMDS 2
 114 #define INTEL_DVO_CHIP_TVOUT 4
 115
 116 /* drm_display_mode->private_flags */
 117 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 118 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 119 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 120 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 121  * timings in the mode to prevent the crtc fixup from overwriting them.
 122  * Currently only lvds needs that. */
 123 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 124
 125 static inline void
 126 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 127                                 int multiplier)
 128 {
 129         mode->clock *= multiplier;
 130         mode->private_flags |= multiplier;
 131 }
 132
 133 static inline int
 134 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 135 {
 136         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 137 }
 138
 139 struct intel_framebuffer {
 140         struct drm_framebuffer base;
 141         struct drm_i915_gem_object *obj;
 142 };
 143
 144 struct intel_fbdev {
 145         struct drm_fb_helper helper;
 146         struct intel_framebuffer ifb;
 147         struct list_head fbdev_list;
 148         struct drm_display_mode *our_mode;
 149 };
 150
 151 struct intel_encoder {
 152         struct drm_encoder base;
 153         int type;
 154         bool needs_tv_clock;
 155         void (*hot_plug)(struct intel_encoder *);
 156         int crtc_mask;
 157         int clone_mask;
 158 };
 159
 160 struct intel_connector {
 161         struct drm_connector base;
 162         struct intel_encoder *encoder;
 163 };
 164
 165 struct intel_crtc {
 166         struct drm_crtc base;
 167         enum pipe pipe;
 168         enum plane plane;
 169         u8 lut_r[256], lut_g[256], lut_b[256];
 170         int dpms_mode;
 171         bool active; /* is the crtc on? independent of the dpms mode */
 172         bool primary_disabled; /* is the crtc obscured by a plane? */
 173         bool busy; /* is scanout buffer being updated frequently? */
 174         struct timer_list idle_timer;
 175         bool lowfreq_avail;
 176         struct intel_overlay *overlay;
 177         struct intel_unpin_work *unpin_work;
 178         int fdi_lanes;
 179
 180         /* Display surface base address adjustement for pageflips. Note that on
 181          * gen4+ this only adjusts up to a tile, offsets within a tile are
 182          * handled in the hw itself (with the TILEOFF register). */
 183         unsigned long dspaddr_offset;
 184
 185         struct drm_i915_gem_object *cursor_bo;
 186         uint32_t cursor_addr;
 187         int16_t cursor_x, cursor_y;
 188         int16_t cursor_width, cursor_height;
 189         bool cursor_visible;
 190         unsigned int bpp;
 191
 192         /* We can share PLLs across outputs if the timings match */
 193         struct intel_pch_pll *pch_pll;
 194 };
 195
 196 struct intel_plane {
 197         struct drm_plane base;
 198         enum pipe pipe;
 199         struct drm_i915_gem_object *obj;
 200         int max_downscale;
 201         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 202         void (*update_plane)(struct drm_plane *plane,
 203                              struct drm_framebuffer *fb,
 204                              struct drm_i915_gem_object *obj,
 205                              int crtc_x, int crtc_y,
 206                              unsigned int crtc_w, unsigned int crtc_h,
 207                              uint32_t x, uint32_t y,
 208                              uint32_t src_w, uint32_t src_h);
 209         void (*disable_plane)(struct drm_plane *plane);
 210         int (*update_colorkey)(struct drm_plane *plane,
 211                                struct drm_intel_sprite_colorkey *key);
 212         void (*get_colorkey)(struct drm_plane *plane,
 213                              struct drm_intel_sprite_colorkey *key);
 214 };
 215
 216 struct intel_watermark_params {
 217         unsigned long fifo_size;
 218         unsigned long max_wm;
 219         unsigned long default_wm;
 220         unsigned long guard_size;
 221         unsigned long cacheline_size;
 222 };
 223
 224 struct cxsr_latency {
 225         int is_desktop;
 226         int is_ddr3;
 227         unsigned long fsb_freq;
 228         unsigned long mem_freq;
 229         unsigned long display_sr;
 230         unsigned long display_hpll_disable;
 231         unsigned long cursor_sr;
 232         unsigned long cursor_hpll_disable;
 233 };
 234
 235 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 236 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 237 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 238 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 239 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 240
 241 #define DIP_HEADER_SIZE 5
 242
 243 #define DIP_TYPE_AVI    0x82
 244 #define DIP_VERSION_AVI 0x2
 245 #define DIP_LEN_AVI     13
 246 #define DIP_AVI_PR_1    0
 247 #define DIP_AVI_PR_2    1
 248
 249 #define DIP_TYPE_SPD    0x83
 250 #define DIP_VERSION_SPD 0x1
 251 #define DIP_LEN_SPD     25
 252 #define DIP_SPD_UNKNOWN 0
 253 #define DIP_SPD_DSTB    0x1
 254 #define DIP_SPD_DVDP    0x2
 255 #define DIP_SPD_DVHS    0x3
 256 #define DIP_SPD_HDDVR   0x4
 257 #define DIP_SPD_DVC     0x5
 258 #define DIP_SPD_DSC     0x6
 259 #define DIP_SPD_VCD     0x7
 260 #define DIP_SPD_GAME    0x8
 261 #define DIP_SPD_PC      0x9
 262 #define DIP_SPD_BD      0xa
 263 #define DIP_SPD_SCD     0xb
 264
 265 struct dip_infoframe {
 266         uint8_t type;           /* HB0 */
 267         uint8_t ver;            /* HB1 */
 268         uint8_t len;            /* HB2 - body len, not including checksum */
 269         uint8_t ecc;            /* Header ECC */
 270         uint8_t checksum;       /* PB0 */
 271         union {
 272                 struct {
 273                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 274                         uint8_t Y_A_B_S;
 275                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 276                         uint8_t C_M_R;
 277                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 278                         uint8_t ITC_EC_Q_SC;
 279                         /* PB4 - VIC 6:0 */
 280                         uint8_t VIC;
 281                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 282                         uint8_t YQ_CN_PR;
 283                         /* PB6 to PB13 */
 284                         uint16_t top_bar_end;
 285                         uint16_t bottom_bar_start;
 286                         uint16_t left_bar_end;
 287                         uint16_t right_bar_start;
 288                 } __attribute__ ((packed)) avi;
 289                 struct {
 290                         uint8_t vn[8];
 291                         uint8_t pd[16];
 292                         uint8_t sdi;
 293                 } __attribute__ ((packed)) spd;
 294                 uint8_t payload[27];
 295         } __attribute__ ((packed)) body;
 296 } __attribute__((packed));
 297
 298 struct intel_hdmi {
 299         struct intel_encoder base;
 300         u32 sdvox_reg;
 301         int ddc_bus;
 302         int ddi_port;
 303         uint32_t color_range;
 304         bool has_hdmi_sink;
 305         bool has_audio;
 306         enum hdmi_force_audio force_audio;
 307         void (*write_infoframe)(struct drm_encoder *encoder,
 308                                 struct dip_infoframe *frame);
 309         void (*set_infoframes)(struct drm_encoder *encoder,
 310                                struct drm_display_mode *adjusted_mode);
 311 };
 312
 313 static inline struct drm_crtc *
 314 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 315 {
 316         struct drm_i915_private *dev_priv = dev->dev_private;
 317         return dev_priv->pipe_to_crtc_mapping[pipe];
 318 }
 319
 320 static inline struct drm_crtc *
 321 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 322 {
 323         struct drm_i915_private *dev_priv = dev->dev_private;
 324         return dev_priv->plane_to_crtc_mapping[plane];
 325 }
 326
 327 struct intel_unpin_work {
 328         struct work_struct work;
 329         struct drm_device *dev;
 330         struct drm_i915_gem_object *old_fb_obj;
 331         struct drm_i915_gem_object *pending_flip_obj;
 332         struct drm_pending_vblank_event *event;
 333         int pending;
 334         bool enable_stall_check;
 335 };
 336
 337 struct intel_fbc_work {
 338         struct delayed_work work;
 339         struct drm_crtc *crtc;
 340         struct drm_framebuffer *fb;
 341         int interval;
 342 };
 343
 344 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 345 extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
 346
 347 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 348 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 349
 350 extern void intel_crt_init(struct drm_device *dev);
 351 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 352 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 353 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 354 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 355                             bool is_sdvob);
 356 extern void intel_dvo_init(struct drm_device *dev);
 357 extern void intel_tv_init(struct drm_device *dev);
 358 extern void intel_mark_busy(struct drm_device *dev,
 359                             struct drm_i915_gem_object *obj);
 360 extern bool intel_lvds_init(struct drm_device *dev);
 361 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
 362 void
 363 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 364                  struct drm_display_mode *adjusted_mode);
 365 extern bool intel_dpd_is_edp(struct drm_device *dev);
 366 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 367 extern int intel_edp_target_clock(struct intel_encoder *,
 368                                   struct drm_display_mode *mode);
 369 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 370 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 371 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 372                                       enum plane plane);
 373
 374 void intel_sanitize_pm(struct drm_device *dev);
 375
 376 /* intel_panel.c */
 377 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 378                                    struct drm_display_mode *adjusted_mode);
 379 extern void intel_pch_panel_fitting(struct drm_device *dev,
 380                                     int fitting_mode,
 381                                     const struct drm_display_mode *mode,
 382                                     struct drm_display_mode *adjusted_mode);
 383 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 384 extern u32 intel_panel_get_backlight(struct drm_device *dev);
 385 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 386 extern int intel_panel_setup_backlight(struct drm_device *dev);
 387 extern void intel_panel_enable_backlight(struct drm_device *dev,
 388                                          enum pipe pipe);
 389 extern void intel_panel_disable_backlight(struct drm_device *dev);
 390 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 391 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 392
 393 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 394 extern void intel_encoder_prepare(struct drm_encoder *encoder);
 395 extern void intel_encoder_commit(struct drm_encoder *encoder);
 396 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 397
 398 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 399 {
 400         return to_intel_connector(connector)->encoder;
 401 }
 402
 403 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 404                                            struct intel_encoder *encoder);
 405 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 406
 407 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 408                                                     struct drm_crtc *crtc);
 409 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 410                                 struct drm_file *file_priv);
 411 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 412 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 413
 414 struct intel_load_detect_pipe {
 415         struct drm_framebuffer *release_fb;
 416         bool load_detect_temp;
 417         int dpms_mode;
 418 };
 419 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
 420                                        struct drm_connector *connector,
 421                                        struct drm_display_mode *mode,
 422                                        struct intel_load_detect_pipe *old);
 423 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
 424                                            struct drm_connector *connector,
 425                                            struct intel_load_detect_pipe *old);
 426
 427 extern void intelfb_restore(void);
 428 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 429                                     u16 blue, int regno);
 430 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 431                                     u16 *blue, int regno);
 432 extern void intel_enable_clock_gating(struct drm_device *dev);
 433
 434 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 435                                       struct drm_i915_gem_object *obj,
 436                                       struct intel_ring_buffer *pipelined);
 437 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 438
 439 extern int intel_framebuffer_init(struct drm_device *dev,
 440                                   struct intel_framebuffer *ifb,
 441                                   struct drm_mode_fb_cmd2 *mode_cmd,
 442                                   struct drm_i915_gem_object *obj);
 443 extern int intel_fbdev_init(struct drm_device *dev);
 444 extern void intel_fbdev_fini(struct drm_device *dev);
 445 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 446 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 447 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 448 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 449
 450 extern void intel_setup_overlay(struct drm_device *dev);
 451 extern void intel_cleanup_overlay(struct drm_device *dev);
 452 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 453 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 454                                    struct drm_file *file_priv);
 455 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 456                                struct drm_file *file_priv);
 457
 458 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 459 extern void intel_fb_restore_mode(struct drm_device *dev);
 460
 461 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 462                         bool state);
 463 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 464 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 465
 466 extern void intel_init_clock_gating(struct drm_device *dev);
 467 extern void intel_write_eld(struct drm_encoder *encoder,
 468                             struct drm_display_mode *mode);
 469 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 470 extern void intel_prepare_ddi(struct drm_device *dev);
 471 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 472 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 473
 474 /* For use by IVB LP watermark workaround in intel_sprite.c */
 475 extern void intel_update_watermarks(struct drm_device *dev);
 476 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 477                                            uint32_t sprite_width,
 478                                            int pixel_size);
 479 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 480                          struct drm_display_mode *mode);
 481
 482 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 483                                      struct drm_file *file_priv);
 484 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 485                                      struct drm_file *file_priv);
 486
 487 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 488
 489 /* Power-related functions, located in intel_pm.c */
 490 extern void intel_init_pm(struct drm_device *dev);
 491 /* FBC */
 492 extern bool intel_fbc_enabled(struct drm_device *dev);
 493 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 494 extern void intel_update_fbc(struct drm_device *dev);
 495 /* IPS */
 496 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 497 extern void intel_gpu_ips_teardown(void);
 498
 499 extern void intel_init_power_wells(struct drm_device *dev);
 500 extern void intel_enable_gt_powersave(struct drm_device *dev);
 501 extern void intel_disable_gt_powersave(struct drm_device *dev);
 502 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 503 extern void ironlake_teardown_rc6(struct drm_device *dev);
 504
 505 extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
 506 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
 507                                 struct drm_display_mode *mode,
 508                                 struct drm_display_mode *adjusted_mode);
 509
 510 #endif /* __INTEL_DRV_H__ */