drivers/gpu/drm/i915/intel_drv.h

   1 /*
   2  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright (c) 2007-2008 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25 #ifndef __INTEL_DRV_H__
  26 #define __INTEL_DRV_H__
  27
  28 #include <linux/i2c.h>
  29 #include "i915_drm.h"
  30 #include "i915_drv.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_fb_helper.h"
  34 #include "drm_dp_helper.h"
  35
  36 #define _wait_for(COND, MS, W) ({ \
  37         unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);       \
  38         int ret__ = 0;                                                  \
  39         while (!(COND)) {                                               \
  40                 if (time_after(jiffies, timeout__)) {                   \
  41                         ret__ = -ETIMEDOUT;                             \
  42                         break;                                          \
  43                 }                                                       \
  44                 if (W && drm_can_sleep()) msleep(W);    \
  45         }                                                               \
  46         ret__;                                                          \
  47 })
  48
  49 #define wait_for_atomic_us(COND, US) ({ \
  50         int i, ret__ = -ETIMEDOUT;      \
  51         for (i = 0; i < (US); i++) {    \
  52                 if ((COND)) {           \
  53                         ret__ = 0;      \
  54                         break;          \
  55                 }                       \
  56                 udelay(1);              \
  57         }                               \
  58         ret__;                          \
  59 })
  60
  61 #define wait_for(COND, MS) _wait_for(COND, MS, 1)
  62 #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
  63
  64 #define KHz(x) (1000*x)
  65 #define MHz(x) KHz(1000*x)
  66
  67 /*
  68  * Display related stuff
  69  */
  70
  71 /* store information about an Ixxx DVO */
  72 /* The i830->i865 use multiple DVOs with multiple i2cs */
  73 /* the i915, i945 have a single sDVO i2c bus - which is different */
  74 #define MAX_OUTPUTS 6
  75 /* maximum connectors per crtcs in the mode set */
  76 #define INTELFB_CONN_LIMIT 4
  77
  78 #define INTEL_I2C_BUS_DVO 1
  79 #define INTEL_I2C_BUS_SDVO 2
  80
  81 /* these are outputs from the chip - integrated only
  82    external chips are via DVO or SDVO output */
  83 #define INTEL_OUTPUT_UNUSED 0
  84 #define INTEL_OUTPUT_ANALOG 1
  85 #define INTEL_OUTPUT_DVO 2
  86 #define INTEL_OUTPUT_SDVO 3
  87 #define INTEL_OUTPUT_LVDS 4
  88 #define INTEL_OUTPUT_TVOUT 5
  89 #define INTEL_OUTPUT_HDMI 6
  90 #define INTEL_OUTPUT_DISPLAYPORT 7
  91 #define INTEL_OUTPUT_EDP 8
  92
  93 #define INTEL_DVO_CHIP_NONE 0
  94 #define INTEL_DVO_CHIP_LVDS 1
  95 #define INTEL_DVO_CHIP_TMDS 2
  96 #define INTEL_DVO_CHIP_TVOUT 4
  97
  98 /* drm_display_mode->private_flags */
  99 #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
 100 #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
 101 #define INTEL_MODE_DP_FORCE_6BPC (0x10)
 102 /* This flag must be set by the encoder's mode_fixup if it changes the crtc
 103  * timings in the mode to prevent the crtc fixup from overwriting them.
 104  * Currently only lvds needs that. */
 105 #define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
 106
 107 static inline void
 108 intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
 109                                 int multiplier)
 110 {
 111         mode->clock *= multiplier;
 112         mode->private_flags |= multiplier;
 113 }
 114
 115 static inline int
 116 intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
 117 {
 118         return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
 119 }
 120
 121 struct intel_framebuffer {
 122         struct drm_framebuffer base;
 123         struct drm_i915_gem_object *obj;
 124 };
 125
 126 struct intel_fbdev {
 127         struct drm_fb_helper helper;
 128         struct intel_framebuffer ifb;
 129         struct list_head fbdev_list;
 130         struct drm_display_mode *our_mode;
 131 };
 132
 133 struct intel_encoder {
 134         struct drm_encoder base;
 135         int type;
 136         bool needs_tv_clock;
 137         /*
 138          * Intel hw has only one MUX where encoders could be clone, hence a
 139          * simple flag is enough to compute the possible_clones mask.
 140          */
 141         bool cloneable;
 142         void (*hot_plug)(struct intel_encoder *);
 143         int crtc_mask;
 144 };
 145
 146 struct intel_connector {
 147         struct drm_connector base;
 148         struct intel_encoder *encoder;
 149 };
 150
 151 struct intel_crtc {
 152         struct drm_crtc base;
 153         enum pipe pipe;
 154         enum plane plane;
 155         u8 lut_r[256], lut_g[256], lut_b[256];
 156         int dpms_mode;
 157         bool active; /* is the crtc on? independent of the dpms mode */
 158         bool primary_disabled; /* is the crtc obscured by a plane? */
 159         bool busy; /* is scanout buffer being updated frequently? */
 160         struct timer_list idle_timer;
 161         bool lowfreq_avail;
 162         struct intel_overlay *overlay;
 163         struct intel_unpin_work *unpin_work;
 164         int fdi_lanes;
 165
 166         /* Display surface base address adjustement for pageflips. Note that on
 167          * gen4+ this only adjusts up to a tile, offsets within a tile are
 168          * handled in the hw itself (with the TILEOFF register). */
 169         unsigned long dspaddr_offset;
 170
 171         struct drm_i915_gem_object *cursor_bo;
 172         uint32_t cursor_addr;
 173         int16_t cursor_x, cursor_y;
 174         int16_t cursor_width, cursor_height;
 175         bool cursor_visible;
 176         unsigned int bpp;
 177
 178         /* We can share PLLs across outputs if the timings match */
 179         struct intel_pch_pll *pch_pll;
 180 };
 181
 182 struct intel_plane {
 183         struct drm_plane base;
 184         enum pipe pipe;
 185         struct drm_i915_gem_object *obj;
 186         int max_downscale;
 187         u32 lut_r[1024], lut_g[1024], lut_b[1024];
 188         void (*update_plane)(struct drm_plane *plane,
 189                              struct drm_framebuffer *fb,
 190                              struct drm_i915_gem_object *obj,
 191                              int crtc_x, int crtc_y,
 192                              unsigned int crtc_w, unsigned int crtc_h,
 193                              uint32_t x, uint32_t y,
 194                              uint32_t src_w, uint32_t src_h);
 195         void (*disable_plane)(struct drm_plane *plane);
 196         int (*update_colorkey)(struct drm_plane *plane,
 197                                struct drm_intel_sprite_colorkey *key);
 198         void (*get_colorkey)(struct drm_plane *plane,
 199                              struct drm_intel_sprite_colorkey *key);
 200 };
 201
 202 struct intel_watermark_params {
 203         unsigned long fifo_size;
 204         unsigned long max_wm;
 205         unsigned long default_wm;
 206         unsigned long guard_size;
 207         unsigned long cacheline_size;
 208 };
 209
 210 struct cxsr_latency {
 211         int is_desktop;
 212         int is_ddr3;
 213         unsigned long fsb_freq;
 214         unsigned long mem_freq;
 215         unsigned long display_sr;
 216         unsigned long display_hpll_disable;
 217         unsigned long cursor_sr;
 218         unsigned long cursor_hpll_disable;
 219 };
 220
 221 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
 222 #define to_intel_connector(x) container_of(x, struct intel_connector, base)
 223 #define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
 224 #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
 225 #define to_intel_plane(x) container_of(x, struct intel_plane, base)
 226
 227 #define DIP_HEADER_SIZE 5
 228
 229 #define DIP_TYPE_AVI    0x82
 230 #define DIP_VERSION_AVI 0x2
 231 #define DIP_LEN_AVI     13
 232 #define DIP_AVI_PR_1    0
 233 #define DIP_AVI_PR_2    1
 234
 235 #define DIP_TYPE_SPD    0x83
 236 #define DIP_VERSION_SPD 0x1
 237 #define DIP_LEN_SPD     25
 238 #define DIP_SPD_UNKNOWN 0
 239 #define DIP_SPD_DSTB    0x1
 240 #define DIP_SPD_DVDP    0x2
 241 #define DIP_SPD_DVHS    0x3
 242 #define DIP_SPD_HDDVR   0x4
 243 #define DIP_SPD_DVC     0x5
 244 #define DIP_SPD_DSC     0x6
 245 #define DIP_SPD_VCD     0x7
 246 #define DIP_SPD_GAME    0x8
 247 #define DIP_SPD_PC      0x9
 248 #define DIP_SPD_BD      0xa
 249 #define DIP_SPD_SCD     0xb
 250
 251 struct dip_infoframe {
 252         uint8_t type;           /* HB0 */
 253         uint8_t ver;            /* HB1 */
 254         uint8_t len;            /* HB2 - body len, not including checksum */
 255         uint8_t ecc;            /* Header ECC */
 256         uint8_t checksum;       /* PB0 */
 257         union {
 258                 struct {
 259                         /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
 260                         uint8_t Y_A_B_S;
 261                         /* PB2 - C 7:6, M 5:4, R 3:0 */
 262                         uint8_t C_M_R;
 263                         /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
 264                         uint8_t ITC_EC_Q_SC;
 265                         /* PB4 - VIC 6:0 */
 266                         uint8_t VIC;
 267                         /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
 268                         uint8_t YQ_CN_PR;
 269                         /* PB6 to PB13 */
 270                         uint16_t top_bar_end;
 271                         uint16_t bottom_bar_start;
 272                         uint16_t left_bar_end;
 273                         uint16_t right_bar_start;
 274                 } __attribute__ ((packed)) avi;
 275                 struct {
 276                         uint8_t vn[8];
 277                         uint8_t pd[16];
 278                         uint8_t sdi;
 279                 } __attribute__ ((packed)) spd;
 280                 uint8_t payload[27];
 281         } __attribute__ ((packed)) body;
 282 } __attribute__((packed));
 283
 284 struct intel_hdmi {
 285         struct intel_encoder base;
 286         u32 sdvox_reg;
 287         int ddc_bus;
 288         int ddi_port;
 289         uint32_t color_range;
 290         bool has_hdmi_sink;
 291         bool has_audio;
 292         enum hdmi_force_audio force_audio;
 293         void (*write_infoframe)(struct drm_encoder *encoder,
 294                                 struct dip_infoframe *frame);
 295         void (*set_infoframes)(struct drm_encoder *encoder,
 296                                struct drm_display_mode *adjusted_mode);
 297 };
 298
 299 #define DP_RECEIVER_CAP_SIZE            0xf
 300 #define DP_LINK_CONFIGURATION_SIZE      9
 301
 302 struct intel_dp {
 303         struct intel_encoder base;
 304         uint32_t output_reg;
 305         uint32_t DP;
 306         uint8_t  link_configuration[DP_LINK_CONFIGURATION_SIZE];
 307         bool has_audio;
 308         enum hdmi_force_audio force_audio;
 309         uint32_t color_range;
 310         int dpms_mode;
 311         uint8_t link_bw;
 312         uint8_t lane_count;
 313         uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
 314         struct i2c_adapter adapter;
 315         struct i2c_algo_dp_aux_data algo;
 316         bool is_pch_edp;
 317         uint8_t train_set[4];
 318         int panel_power_up_delay;
 319         int panel_power_down_delay;
 320         int panel_power_cycle_delay;
 321         int backlight_on_delay;
 322         int backlight_off_delay;
 323         struct drm_display_mode *panel_fixed_mode;  /* for eDP */
 324         struct delayed_work panel_vdd_work;
 325         bool want_panel_vdd;
 326         struct edid *edid; /* cached EDID for eDP */
 327         int edid_mode_count;
 328 };
 329
 330 static inline struct drm_crtc *
 331 intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
 332 {
 333         struct drm_i915_private *dev_priv = dev->dev_private;
 334         return dev_priv->pipe_to_crtc_mapping[pipe];
 335 }
 336
 337 static inline struct drm_crtc *
 338 intel_get_crtc_for_plane(struct drm_device *dev, int plane)
 339 {
 340         struct drm_i915_private *dev_priv = dev->dev_private;
 341         return dev_priv->plane_to_crtc_mapping[plane];
 342 }
 343
 344 struct intel_unpin_work {
 345         struct work_struct work;
 346         struct drm_device *dev;
 347         struct drm_i915_gem_object *old_fb_obj;
 348         struct drm_i915_gem_object *pending_flip_obj;
 349         struct drm_pending_vblank_event *event;
 350         int pending;
 351         bool enable_stall_check;
 352 };
 353
 354 struct intel_fbc_work {
 355         struct delayed_work work;
 356         struct drm_crtc *crtc;
 357         struct drm_framebuffer *fb;
 358         int interval;
 359 };
 360
 361 int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
 362
 363 extern void intel_attach_force_audio_property(struct drm_connector *connector);
 364 extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
 365
 366 extern void intel_crt_init(struct drm_device *dev);
 367 extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
 368 extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
 369 extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
 370 extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
 371                             bool is_sdvob);
 372 extern void intel_dvo_init(struct drm_device *dev);
 373 extern void intel_tv_init(struct drm_device *dev);
 374 extern void intel_mark_busy(struct drm_device *dev,
 375                             struct drm_i915_gem_object *obj);
 376 extern bool intel_lvds_init(struct drm_device *dev);
 377 extern void intel_dp_init(struct drm_device *dev, int dp_reg);
 378 void
 379 intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
 380                  struct drm_display_mode *adjusted_mode);
 381 extern bool intel_dpd_is_edp(struct drm_device *dev);
 382 extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
 383 extern int intel_edp_target_clock(struct intel_encoder *,
 384                                   struct drm_display_mode *mode);
 385 extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
 386 extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
 387 extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
 388                                       enum plane plane);
 389
 390 void intel_sanitize_pm(struct drm_device *dev);
 391
 392 /* intel_panel.c */
 393 extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
 394                                    struct drm_display_mode *adjusted_mode);
 395 extern void intel_pch_panel_fitting(struct drm_device *dev,
 396                                     int fitting_mode,
 397                                     const struct drm_display_mode *mode,
 398                                     struct drm_display_mode *adjusted_mode);
 399 extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
 400 extern u32 intel_panel_get_backlight(struct drm_device *dev);
 401 extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
 402 extern int intel_panel_setup_backlight(struct drm_device *dev);
 403 extern void intel_panel_enable_backlight(struct drm_device *dev,
 404                                          enum pipe pipe);
 405 extern void intel_panel_disable_backlight(struct drm_device *dev);
 406 extern void intel_panel_destroy_backlight(struct drm_device *dev);
 407 extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
 408
 409 extern void intel_crtc_load_lut(struct drm_crtc *crtc);
 410 extern void intel_encoder_prepare(struct drm_encoder *encoder);
 411 extern void intel_encoder_commit(struct drm_encoder *encoder);
 412 extern void intel_encoder_destroy(struct drm_encoder *encoder);
 413
 414 static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
 415 {
 416         return to_intel_connector(connector)->encoder;
 417 }
 418
 419 extern void intel_connector_attach_encoder(struct intel_connector *connector,
 420                                            struct intel_encoder *encoder);
 421 extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
 422
 423 extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
 424                                                     struct drm_crtc *crtc);
 425 int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
 426                                 struct drm_file *file_priv);
 427 extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
 428 extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
 429
 430 struct intel_load_detect_pipe {
 431         struct drm_framebuffer *release_fb;
 432         bool load_detect_temp;
 433         int dpms_mode;
 434 };
 435 extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
 436                                        struct drm_connector *connector,
 437                                        struct drm_display_mode *mode,
 438                                        struct intel_load_detect_pipe *old);
 439 extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
 440                                            struct drm_connector *connector,
 441                                            struct intel_load_detect_pipe *old);
 442
 443 extern void intelfb_restore(void);
 444 extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
 445                                     u16 blue, int regno);
 446 extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
 447                                     u16 *blue, int regno);
 448 extern void intel_enable_clock_gating(struct drm_device *dev);
 449
 450 extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
 451                                       struct drm_i915_gem_object *obj,
 452                                       struct intel_ring_buffer *pipelined);
 453 extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
 454
 455 extern int intel_framebuffer_init(struct drm_device *dev,
 456                                   struct intel_framebuffer *ifb,
 457                                   struct drm_mode_fb_cmd2 *mode_cmd,
 458                                   struct drm_i915_gem_object *obj);
 459 extern int intel_fbdev_init(struct drm_device *dev);
 460 extern void intel_fbdev_fini(struct drm_device *dev);
 461 extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
 462 extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
 463 extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
 464 extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
 465
 466 extern void intel_setup_overlay(struct drm_device *dev);
 467 extern void intel_cleanup_overlay(struct drm_device *dev);
 468 extern int intel_overlay_switch_off(struct intel_overlay *overlay);
 469 extern int intel_overlay_put_image(struct drm_device *dev, void *data,
 470                                    struct drm_file *file_priv);
 471 extern int intel_overlay_attrs(struct drm_device *dev, void *data,
 472                                struct drm_file *file_priv);
 473
 474 extern void intel_fb_output_poll_changed(struct drm_device *dev);
 475 extern void intel_fb_restore_mode(struct drm_device *dev);
 476
 477 extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
 478                         bool state);
 479 #define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
 480 #define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
 481
 482 extern void intel_init_clock_gating(struct drm_device *dev);
 483 extern void intel_write_eld(struct drm_encoder *encoder,
 484                             struct drm_display_mode *mode);
 485 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
 486 extern void intel_prepare_ddi(struct drm_device *dev);
 487 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 488 extern void intel_ddi_init(struct drm_device *dev, enum port port);
 489
 490 /* For use by IVB LP watermark workaround in intel_sprite.c */
 491 extern void intel_update_watermarks(struct drm_device *dev);
 492 extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
 493                                            uint32_t sprite_width,
 494                                            int pixel_size);
 495 extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
 496                          struct drm_display_mode *mode);
 497
 498 extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
 499                                      struct drm_file *file_priv);
 500 extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
 501                                      struct drm_file *file_priv);
 502
 503 extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
 504
 505 /* Power-related functions, located in intel_pm.c */
 506 extern void intel_init_pm(struct drm_device *dev);
 507 /* FBC */
 508 extern bool intel_fbc_enabled(struct drm_device *dev);
 509 extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
 510 extern void intel_update_fbc(struct drm_device *dev);
 511 /* IPS */
 512 extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
 513 extern void intel_gpu_ips_teardown(void);
 514
 515 extern void intel_init_power_wells(struct drm_device *dev);
 516 extern void intel_enable_gt_powersave(struct drm_device *dev);
 517 extern void intel_disable_gt_powersave(struct drm_device *dev);
 518 extern void gen6_gt_check_fifodbg(struct drm_i915_private *dev_priv);
 519 extern void ironlake_teardown_rc6(struct drm_device *dev);
 520
 521 extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
 522 extern void intel_ddi_mode_set(struct drm_encoder *encoder,
 523                                 struct drm_display_mode *mode,
 524                                 struct drm_display_mode *adjusted_mode);
 525
 526 #endif /* __INTEL_DRV_H__ */