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1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_atomic_helper.h>
31 #include <drm/drm_crtc.h>
32 #include "intel_drv.h"
33 #include <drm/i915_drm.h>
34 #include "i915_drv.h"
35 #include "dvo.h"
36
37 #define SIL164_ADDR 0x38
38 #define CH7xxx_ADDR 0x76
39 #define TFP410_ADDR 0x38
40 #define NS2501_ADDR 0x38
41
42 static const struct intel_dvo_device intel_dvo_devices[] = {
43 {
44 .type = INTEL_DVO_CHIP_TMDS,
45 .name = "sil164",
46 .dvo_reg = DVOC,
47 .slave_addr = SIL164_ADDR,
48 .dev_ops = &sil164_ops,
49 },
50 {
51 .type = INTEL_DVO_CHIP_TMDS,
52 .name = "ch7xxx",
53 .dvo_reg = DVOC,
54 .slave_addr = CH7xxx_ADDR,
55 .dev_ops = &ch7xxx_ops,
56 },
57 {
58 .type = INTEL_DVO_CHIP_TMDS,
59 .name = "ch7xxx",
60 .dvo_reg = DVOC,
61 .slave_addr = 0x75, /* For some ch7010 */
62 .dev_ops = &ch7xxx_ops,
63 },
64 {
65 .type = INTEL_DVO_CHIP_LVDS,
66 .name = "ivch",
67 .dvo_reg = DVOA,
68 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
69 .dev_ops = &ivch_ops,
70 },
71 {
72 .type = INTEL_DVO_CHIP_TMDS,
73 .name = "tfp410",
74 .dvo_reg = DVOC,
75 .slave_addr = TFP410_ADDR,
76 .dev_ops = &tfp410_ops,
77 },
78 {
79 .type = INTEL_DVO_CHIP_LVDS,
80 .name = "ch7017",
81 .dvo_reg = DVOC,
82 .slave_addr = 0x75,
83 .gpio = GMBUS_PIN_DPB,
84 .dev_ops = &ch7017_ops,
85 },
86 {
87 .type = INTEL_DVO_CHIP_TMDS,
88 .name = "ns2501",
89 .dvo_reg = DVOB,
90 .slave_addr = NS2501_ADDR,
91 .dev_ops = &ns2501_ops,
92 }
93 };
94
95 struct intel_dvo {
96 struct intel_encoder base;
97
98 struct intel_dvo_device dev;
99
100 struct drm_display_mode *panel_fixed_mode;
101 bool panel_wants_dither;
102 };
103
104 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
105 {
106 return container_of(encoder, struct intel_dvo, base);
107 }
108
109 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
110 {
111 return enc_to_dvo(intel_attached_encoder(connector));
112 }
113
114 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
115 {
116 struct drm_device *dev = connector->base.dev;
117 struct drm_i915_private *dev_priv = dev->dev_private;
118 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
119 u32 tmp;
120
121 tmp = I915_READ(intel_dvo->dev.dvo_reg);
122
123 if (!(tmp & DVO_ENABLE))
124 return false;
125
126 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
127 }
128
129 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
130 enum pipe *pipe)
131 {
132 struct drm_device *dev = encoder->base.dev;
133 struct drm_i915_private *dev_priv = dev->dev_private;
134 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
135 u32 tmp;
136
137 tmp = I915_READ(intel_dvo->dev.dvo_reg);
138
139 if (!(tmp & DVO_ENABLE))
140 return false;
141
142 *pipe = PORT_TO_PIPE(tmp);
143
144 return true;
145 }
146
147 static void intel_dvo_get_config(struct intel_encoder *encoder,
148 struct intel_crtc_state *pipe_config)
149 {
150 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
151 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
152 u32 tmp, flags = 0;
153
154 tmp = I915_READ(intel_dvo->dev.dvo_reg);
155 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
156 flags |= DRM_MODE_FLAG_PHSYNC;
157 else
158 flags |= DRM_MODE_FLAG_NHSYNC;
159 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
160 flags |= DRM_MODE_FLAG_PVSYNC;
161 else
162 flags |= DRM_MODE_FLAG_NVSYNC;
163
164 pipe_config->base.adjusted_mode.flags |= flags;
165
166 pipe_config->base.adjusted_mode.crtc_clock = pipe_config->port_clock;
167 }
168
169 static void intel_disable_dvo(struct intel_encoder *encoder)
170 {
171 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
172 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
173 u32 dvo_reg = intel_dvo->dev.dvo_reg;
174 u32 temp = I915_READ(dvo_reg);
175
176 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
177 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
178 I915_READ(dvo_reg);
179 }
180
181 static void intel_enable_dvo(struct intel_encoder *encoder)
182 {
183 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
184 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
185 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
186 u32 dvo_reg = intel_dvo->dev.dvo_reg;
187 u32 temp = I915_READ(dvo_reg);
188
189 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
190 &crtc->config->base.mode,
191 &crtc->config->base.adjusted_mode);
192
193 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
194 I915_READ(dvo_reg);
195
196 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
197 }
198
199 static enum drm_mode_status
200 intel_dvo_mode_valid(struct drm_connector *connector,
201 struct drm_display_mode *mode)
202 {
203 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
204
205 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
206 return MODE_NO_DBLESCAN;
207
208 /* XXX: Validate clock range */
209
210 if (intel_dvo->panel_fixed_mode) {
211 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
212 return MODE_PANEL;
213 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
214 return MODE_PANEL;
215 }
216
217 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
218 }
219
220 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
221 struct intel_crtc_state *pipe_config)
222 {
223 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
224 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
225
226 /* If we have timings from the BIOS for the panel, put them in
227 * to the adjusted mode. The CRTC will be set up for this mode,
228 * with the panel scaling set up to source from the H/VDisplay
229 * of the original mode.
230 */
231 if (intel_dvo->panel_fixed_mode != NULL) {
232 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
233 C(hdisplay);
234 C(hsync_start);
235 C(hsync_end);
236 C(htotal);
237 C(vdisplay);
238 C(vsync_start);
239 C(vsync_end);
240 C(vtotal);
241 C(clock);
242 #undef C
243
244 drm_mode_set_crtcinfo(adjusted_mode, 0);
245 }
246
247 return true;
248 }
249
250 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
251 {
252 struct drm_device *dev = encoder->base.dev;
253 struct drm_i915_private *dev_priv = dev->dev_private;
254 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
255 struct drm_display_mode *adjusted_mode = &crtc->config->base.adjusted_mode;
256 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
257 int pipe = crtc->pipe;
258 u32 dvo_val;
259 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
260
261 switch (dvo_reg) {
262 case DVOA:
263 default:
264 dvo_srcdim_reg = DVOA_SRCDIM;
265 break;
266 case DVOB:
267 dvo_srcdim_reg = DVOB_SRCDIM;
268 break;
269 case DVOC:
270 dvo_srcdim_reg = DVOC_SRCDIM;
271 break;
272 }
273
274 /* Save the data order, since I don't know what it should be set to. */
275 dvo_val = I915_READ(dvo_reg) &
276 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
277 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
278 DVO_BLANK_ACTIVE_HIGH;
279
280 if (pipe == 1)
281 dvo_val |= DVO_PIPE_B_SELECT;
282 dvo_val |= DVO_PIPE_STALL;
283 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
284 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
285 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
286 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
287
288 /*I915_WRITE(DVOB_SRCDIM,
289 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
290 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
291 I915_WRITE(dvo_srcdim_reg,
292 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
293 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
294 /*I915_WRITE(DVOB, dvo_val);*/
295 I915_WRITE(dvo_reg, dvo_val);
296 }
297
298 /**
299 * Detect the output connection on our DVO device.
300 *
301 * Unimplemented.
302 */
303 static enum drm_connector_status
304 intel_dvo_detect(struct drm_connector *connector, bool force)
305 {
306 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
307 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
308 connector->base.id, connector->name);
309 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
310 }
311
312 static int intel_dvo_get_modes(struct drm_connector *connector)
313 {
314 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
315 struct drm_i915_private *dev_priv = connector->dev->dev_private;
316
317 /* We should probably have an i2c driver get_modes function for those
318 * devices which will have a fixed set of modes determined by the chip
319 * (TV-out, for example), but for now with just TMDS and LVDS,
320 * that's not the case.
321 */
322 intel_ddc_get_modes(connector,
323 intel_gmbus_get_adapter(dev_priv, GMBUS_PIN_DPC));
324 if (!list_empty(&connector->probed_modes))
325 return 1;
326
327 if (intel_dvo->panel_fixed_mode != NULL) {
328 struct drm_display_mode *mode;
329 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
330 if (mode) {
331 drm_mode_probed_add(connector, mode);
332 return 1;
333 }
334 }
335
336 return 0;
337 }
338
339 static void intel_dvo_destroy(struct drm_connector *connector)
340 {
341 drm_connector_cleanup(connector);
342 kfree(connector);
343 }
344
345 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
346 .dpms = drm_atomic_helper_connector_dpms,
347 .detect = intel_dvo_detect,
348 .destroy = intel_dvo_destroy,
349 .fill_modes = drm_helper_probe_single_connector_modes,
350 .atomic_get_property = intel_connector_atomic_get_property,
351 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
352 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
353 };
354
355 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
356 .mode_valid = intel_dvo_mode_valid,
357 .get_modes = intel_dvo_get_modes,
358 .best_encoder = intel_best_encoder,
359 };
360
361 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
362 {
363 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
364
365 if (intel_dvo->dev.dev_ops->destroy)
366 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
367
368 kfree(intel_dvo->panel_fixed_mode);
369
370 intel_encoder_destroy(encoder);
371 }
372
373 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
374 .destroy = intel_dvo_enc_destroy,
375 };
376
377 /**
378 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
379 *
380 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
381 * chip being on DVOB/C and having multiple pipes.
382 */
383 static struct drm_display_mode *
384 intel_dvo_get_current_mode(struct drm_connector *connector)
385 {
386 struct drm_device *dev = connector->dev;
387 struct drm_i915_private *dev_priv = dev->dev_private;
388 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
389 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
390 struct drm_display_mode *mode = NULL;
391
392 /* If the DVO port is active, that'll be the LVDS, so we can pull out
393 * its timings to get how the BIOS set up the panel.
394 */
395 if (dvo_val & DVO_ENABLE) {
396 struct drm_crtc *crtc;
397 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
398
399 crtc = intel_get_crtc_for_pipe(dev, pipe);
400 if (crtc) {
401 mode = intel_crtc_mode_get(dev, crtc);
402 if (mode) {
403 mode->type |= DRM_MODE_TYPE_PREFERRED;
404 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
405 mode->flags |= DRM_MODE_FLAG_PHSYNC;
406 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
407 mode->flags |= DRM_MODE_FLAG_PVSYNC;
408 }
409 }
410 }
411
412 return mode;
413 }
414
415 void intel_dvo_init(struct drm_device *dev)
416 {
417 struct drm_i915_private *dev_priv = dev->dev_private;
418 struct intel_encoder *intel_encoder;
419 struct intel_dvo *intel_dvo;
420 struct intel_connector *intel_connector;
421 int i;
422 int encoder_type = DRM_MODE_ENCODER_NONE;
423
424 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
425 if (!intel_dvo)
426 return;
427
428 intel_connector = intel_connector_alloc();
429 if (!intel_connector) {
430 kfree(intel_dvo);
431 return;
432 }
433
434 intel_encoder = &intel_dvo->base;
435 drm_encoder_init(dev, &intel_encoder->base,
436 &intel_dvo_enc_funcs, encoder_type);
437
438 intel_encoder->disable = intel_disable_dvo;
439 intel_encoder->enable = intel_enable_dvo;
440 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
441 intel_encoder->get_config = intel_dvo_get_config;
442 intel_encoder->compute_config = intel_dvo_compute_config;
443 intel_encoder->pre_enable = intel_dvo_pre_enable;
444 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
445 intel_connector->unregister = intel_connector_unregister;
446
447 /* Now, try to find a controller */
448 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
449 struct drm_connector *connector = &intel_connector->base;
450 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
451 struct i2c_adapter *i2c;
452 int gpio;
453 bool dvoinit;
454 enum pipe pipe;
455 uint32_t dpll[I915_MAX_PIPES];
456
457 /* Allow the I2C driver info to specify the GPIO to be used in
458 * special cases, but otherwise default to what's defined
459 * in the spec.
460 */
461 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
462 gpio = dvo->gpio;
463 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
464 gpio = GMBUS_PIN_SSC;
465 else
466 gpio = GMBUS_PIN_DPB;
467
468 /* Set up the I2C bus necessary for the chip we're probing.
469 * It appears that everything is on GPIOE except for panels
470 * on i830 laptops, which are on GPIOB (DVOA).
471 */
472 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
473
474 intel_dvo->dev = *dvo;
475
476 /* GMBUS NAK handling seems to be unstable, hence let the
477 * transmitter detection run in bit banging mode for now.
478 */
479 intel_gmbus_force_bit(i2c, true);
480
481 /* ns2501 requires the DVO 2x clock before it will
482 * respond to i2c accesses, so make sure we have
483 * have the clock enabled before we attempt to
484 * initialize the device.
485 */
486 for_each_pipe(dev_priv, pipe) {
487 dpll[pipe] = I915_READ(DPLL(pipe));
488 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE);
489 }
490
491 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
492
493 /* restore the DVO 2x clock state to original */
494 for_each_pipe(dev_priv, pipe) {
495 I915_WRITE(DPLL(pipe), dpll[pipe]);
496 }
497
498 intel_gmbus_force_bit(i2c, false);
499
500 if (!dvoinit)
501 continue;
502
503 intel_encoder->type = INTEL_OUTPUT_DVO;
504 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
505 switch (dvo->type) {
506 case INTEL_DVO_CHIP_TMDS:
507 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
508 (1 << INTEL_OUTPUT_DVO);
509 drm_connector_init(dev, connector,
510 &intel_dvo_connector_funcs,
511 DRM_MODE_CONNECTOR_DVII);
512 encoder_type = DRM_MODE_ENCODER_TMDS;
513 break;
514 case INTEL_DVO_CHIP_LVDS:
515 intel_encoder->cloneable = 0;
516 drm_connector_init(dev, connector,
517 &intel_dvo_connector_funcs,
518 DRM_MODE_CONNECTOR_LVDS);
519 encoder_type = DRM_MODE_ENCODER_LVDS;
520 break;
521 }
522
523 drm_connector_helper_add(connector,
524 &intel_dvo_connector_helper_funcs);
525 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
526 connector->interlace_allowed = false;
527 connector->doublescan_allowed = false;
528
529 intel_connector_attach_encoder(intel_connector, intel_encoder);
530 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
531 /* For our LVDS chipsets, we should hopefully be able
532 * to dig the fixed panel mode out of the BIOS data.
533 * However, it's in a different format from the BIOS
534 * data on chipsets with integrated LVDS (stored in AIM
535 * headers, likely), so for now, just get the current
536 * mode being output through DVO.
537 */
538 intel_dvo->panel_fixed_mode =
539 intel_dvo_get_current_mode(connector);
540 intel_dvo->panel_wants_dither = true;
541 }
542
543 drm_connector_register(connector);
544 return;
545 }
546
547 drm_encoder_cleanup(&intel_encoder->base);
548 kfree(intel_dvo);
549 kfree(intel_connector);
550 }