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1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include "drmP.h"
35 #include "drm.h"
36 #include "drm_crtc.h"
37 #include "drm_edid.h"
38 #include "intel_drv.h"
39 #include "i915_drm.h"
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds {
45 struct intel_encoder base;
46
47 struct edid *edid;
48
49 int fitting_mode;
50 u32 pfit_control;
51 u32 pfit_pgm_ratios;
52 bool pfit_dirty;
53
54 struct drm_display_mode *fixed_mode;
55 };
56
57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
58 {
59 return container_of(encoder, struct intel_lvds, base.base);
60 }
61
62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
63 {
64 return container_of(intel_attached_encoder(connector),
65 struct intel_lvds, base);
66 }
67
68 /**
69 * Sets the power state for the panel.
70 */
71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
72 {
73 struct drm_device *dev = intel_lvds->base.base.dev;
74 struct intel_crtc *intel_crtc = to_intel_crtc(intel_lvds->base.base.crtc);
75 struct drm_i915_private *dev_priv = dev->dev_private;
76 u32 ctl_reg, lvds_reg, stat_reg;
77
78 if (HAS_PCH_SPLIT(dev)) {
79 ctl_reg = PCH_PP_CONTROL;
80 lvds_reg = PCH_LVDS;
81 stat_reg = PCH_PP_STATUS;
82 } else {
83 ctl_reg = PP_CONTROL;
84 lvds_reg = LVDS;
85 stat_reg = PP_STATUS;
86 }
87
88 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
89
90 if (intel_lvds->pfit_dirty) {
91 /*
92 * Enable automatic panel scaling so that non-native modes
93 * fill the screen. The panel fitter should only be
94 * adjusted whilst the pipe is disabled, according to
95 * register description and PRM.
96 */
97 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
98 intel_lvds->pfit_control,
99 intel_lvds->pfit_pgm_ratios);
100
101 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
102 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
103 intel_lvds->pfit_dirty = false;
104 }
105
106 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
107 POSTING_READ(lvds_reg);
108 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
109 DRM_ERROR("timed out waiting for panel to power on\n");
110
111 intel_panel_enable_backlight(dev, intel_crtc->pipe);
112 }
113
114 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
115 {
116 struct drm_device *dev = intel_lvds->base.base.dev;
117 struct drm_i915_private *dev_priv = dev->dev_private;
118 u32 ctl_reg, lvds_reg, stat_reg;
119
120 if (HAS_PCH_SPLIT(dev)) {
121 ctl_reg = PCH_PP_CONTROL;
122 lvds_reg = PCH_LVDS;
123 stat_reg = PCH_PP_STATUS;
124 } else {
125 ctl_reg = PP_CONTROL;
126 lvds_reg = LVDS;
127 stat_reg = PP_STATUS;
128 }
129
130 intel_panel_disable_backlight(dev);
131
132 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
133 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
134 DRM_ERROR("timed out waiting for panel to power off\n");
135
136 if (intel_lvds->pfit_control) {
137 I915_WRITE(PFIT_CONTROL, 0);
138 intel_lvds->pfit_dirty = true;
139 }
140
141 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
142 POSTING_READ(lvds_reg);
143 }
144
145 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
146 {
147 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
148
149 if (mode == DRM_MODE_DPMS_ON)
150 intel_lvds_enable(intel_lvds);
151 else
152 intel_lvds_disable(intel_lvds);
153
154 /* XXX: We never power down the LVDS pairs. */
155 }
156
157 static int intel_lvds_mode_valid(struct drm_connector *connector,
158 struct drm_display_mode *mode)
159 {
160 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
161 struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
162
163 if (mode->hdisplay > fixed_mode->hdisplay)
164 return MODE_PANEL;
165 if (mode->vdisplay > fixed_mode->vdisplay)
166 return MODE_PANEL;
167
168 return MODE_OK;
169 }
170
171 static void
172 centre_horizontally(struct drm_display_mode *mode,
173 int width)
174 {
175 u32 border, sync_pos, blank_width, sync_width;
176
177 /* keep the hsync and hblank widths constant */
178 sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
179 blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
180 sync_pos = (blank_width - sync_width + 1) / 2;
181
182 border = (mode->hdisplay - width + 1) / 2;
183 border += border & 1; /* make the border even */
184
185 mode->crtc_hdisplay = width;
186 mode->crtc_hblank_start = width + border;
187 mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
188
189 mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
190 mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
191
192 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
193 }
194
195 static void
196 centre_vertically(struct drm_display_mode *mode,
197 int height)
198 {
199 u32 border, sync_pos, blank_width, sync_width;
200
201 /* keep the vsync and vblank widths constant */
202 sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
203 blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
204 sync_pos = (blank_width - sync_width + 1) / 2;
205
206 border = (mode->vdisplay - height + 1) / 2;
207
208 mode->crtc_vdisplay = height;
209 mode->crtc_vblank_start = height + border;
210 mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
211
212 mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
213 mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
214
215 mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
216 }
217
218 static inline u32 panel_fitter_scaling(u32 source, u32 target)
219 {
220 /*
221 * Floating point operation is not supported. So the FACTOR
222 * is defined, which can avoid the floating point computation
223 * when calculating the panel ratio.
224 */
225 #define ACCURACY 12
226 #define FACTOR (1 << ACCURACY)
227 u32 ratio = source * FACTOR / target;
228 return (FACTOR * ratio + FACTOR/2) / FACTOR;
229 }
230
231 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
232 struct drm_display_mode *mode,
233 struct drm_display_mode *adjusted_mode)
234 {
235 struct drm_device *dev = encoder->dev;
236 struct drm_i915_private *dev_priv = dev->dev_private;
237 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
238 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
239 struct drm_encoder *tmp_encoder;
240 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
241 int pipe;
242
243 /* Should never happen!! */
244 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
245 DRM_ERROR("Can't support LVDS on pipe A\n");
246 return false;
247 }
248
249 /* Should never happen!! */
250 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
251 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
252 DRM_ERROR("Can't enable LVDS and another "
253 "encoder on the same pipe\n");
254 return false;
255 }
256 }
257
258 /*
259 * We have timings from the BIOS for the panel, put them in
260 * to the adjusted mode. The CRTC will be set up for this mode,
261 * with the panel scaling set up to source from the H/VDisplay
262 * of the original mode.
263 */
264 intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
265
266 if (HAS_PCH_SPLIT(dev)) {
267 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
268 mode, adjusted_mode);
269 return true;
270 }
271
272 /* Native modes don't need fitting */
273 if (adjusted_mode->hdisplay == mode->hdisplay &&
274 adjusted_mode->vdisplay == mode->vdisplay)
275 goto out;
276
277 /* 965+ wants fuzzy fitting */
278 if (INTEL_INFO(dev)->gen >= 4)
279 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
280 PFIT_FILTER_FUZZY);
281
282 /*
283 * Enable automatic panel scaling for non-native modes so that they fill
284 * the screen. Should be enabled before the pipe is enabled, according
285 * to register description and PRM.
286 * Change the value here to see the borders for debugging
287 */
288 for_each_pipe(pipe)
289 I915_WRITE(BCLRPAT(pipe), 0);
290
291 drm_mode_set_crtcinfo(adjusted_mode, 0);
292
293 switch (intel_lvds->fitting_mode) {
294 case DRM_MODE_SCALE_CENTER:
295 /*
296 * For centered modes, we have to calculate border widths &
297 * heights and modify the values programmed into the CRTC.
298 */
299 centre_horizontally(adjusted_mode, mode->hdisplay);
300 centre_vertically(adjusted_mode, mode->vdisplay);
301 border = LVDS_BORDER_ENABLE;
302 break;
303
304 case DRM_MODE_SCALE_ASPECT:
305 /* Scale but preserve the aspect ratio */
306 if (INTEL_INFO(dev)->gen >= 4) {
307 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
308 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
309
310 /* 965+ is easy, it does everything in hw */
311 if (scaled_width > scaled_height)
312 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
313 else if (scaled_width < scaled_height)
314 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
315 else if (adjusted_mode->hdisplay != mode->hdisplay)
316 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
317 } else {
318 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
319 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
320 /*
321 * For earlier chips we have to calculate the scaling
322 * ratio by hand and program it into the
323 * PFIT_PGM_RATIO register
324 */
325 if (scaled_width > scaled_height) { /* pillar */
326 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
327
328 border = LVDS_BORDER_ENABLE;
329 if (mode->vdisplay != adjusted_mode->vdisplay) {
330 u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
331 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
332 bits << PFIT_VERT_SCALE_SHIFT);
333 pfit_control |= (PFIT_ENABLE |
334 VERT_INTERP_BILINEAR |
335 HORIZ_INTERP_BILINEAR);
336 }
337 } else if (scaled_width < scaled_height) { /* letter */
338 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
339
340 border = LVDS_BORDER_ENABLE;
341 if (mode->hdisplay != adjusted_mode->hdisplay) {
342 u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
343 pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
344 bits << PFIT_VERT_SCALE_SHIFT);
345 pfit_control |= (PFIT_ENABLE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_INTERP_BILINEAR);
348 }
349 } else
350 /* Aspects match, Let hw scale both directions */
351 pfit_control |= (PFIT_ENABLE |
352 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
353 VERT_INTERP_BILINEAR |
354 HORIZ_INTERP_BILINEAR);
355 }
356 break;
357
358 case DRM_MODE_SCALE_FULLSCREEN:
359 /*
360 * Full scaling, even if it changes the aspect ratio.
361 * Fortunately this is all done for us in hw.
362 */
363 if (mode->vdisplay != adjusted_mode->vdisplay ||
364 mode->hdisplay != adjusted_mode->hdisplay) {
365 pfit_control |= PFIT_ENABLE;
366 if (INTEL_INFO(dev)->gen >= 4)
367 pfit_control |= PFIT_SCALING_AUTO;
368 else
369 pfit_control |= (VERT_AUTO_SCALE |
370 VERT_INTERP_BILINEAR |
371 HORIZ_AUTO_SCALE |
372 HORIZ_INTERP_BILINEAR);
373 }
374 break;
375
376 default:
377 break;
378 }
379
380 out:
381 /* If not enabling scaling, be consistent and always use 0. */
382 if ((pfit_control & PFIT_ENABLE) == 0) {
383 pfit_control = 0;
384 pfit_pgm_ratios = 0;
385 }
386
387 /* Make sure pre-965 set dither correctly */
388 if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
389 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
390
391 if (pfit_control != intel_lvds->pfit_control ||
392 pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
393 intel_lvds->pfit_control = pfit_control;
394 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
395 intel_lvds->pfit_dirty = true;
396 }
397 dev_priv->lvds_border_bits = border;
398
399 /*
400 * XXX: It would be nice to support lower refresh rates on the
401 * panels to reduce power consumption, and perhaps match the
402 * user's requested refresh rate.
403 */
404
405 return true;
406 }
407
408 static void intel_lvds_prepare(struct drm_encoder *encoder)
409 {
410 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
411
412 /*
413 * Prior to Ironlake, we must disable the pipe if we want to adjust
414 * the panel fitter. However at all other times we can just reset
415 * the registers regardless.
416 */
417 if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
418 intel_lvds_disable(intel_lvds);
419 }
420
421 static void intel_lvds_commit(struct drm_encoder *encoder)
422 {
423 struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
424
425 /* Always do a full power on as we do not know what state
426 * we were left in.
427 */
428 intel_lvds_enable(intel_lvds);
429 }
430
431 static void intel_lvds_mode_set(struct drm_encoder *encoder,
432 struct drm_display_mode *mode,
433 struct drm_display_mode *adjusted_mode)
434 {
435 /*
436 * The LVDS pin pair will already have been turned on in the
437 * intel_crtc_mode_set since it has a large impact on the DPLL
438 * settings.
439 */
440 }
441
442 /**
443 * Detect the LVDS connection.
444 *
445 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
446 * connected and closed means disconnected. We also send hotplug events as
447 * needed, using lid status notification from the input layer.
448 */
449 static enum drm_connector_status
450 intel_lvds_detect(struct drm_connector *connector, bool force)
451 {
452 struct drm_device *dev = connector->dev;
453 enum drm_connector_status status;
454
455 status = intel_panel_detect(dev);
456 if (status != connector_status_unknown)
457 return status;
458
459 return connector_status_connected;
460 }
461
462 /**
463 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
464 */
465 static int intel_lvds_get_modes(struct drm_connector *connector)
466 {
467 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
468 struct drm_device *dev = connector->dev;
469 struct drm_display_mode *mode;
470
471 if (intel_lvds->edid)
472 return drm_add_edid_modes(connector, intel_lvds->edid);
473
474 mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
475 if (mode == NULL)
476 return 0;
477
478 drm_mode_probed_add(connector, mode);
479 return 1;
480 }
481
482 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
483 {
484 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
485 return 1;
486 }
487
488 /* The GPU hangs up on these systems if modeset is performed on LID open */
489 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
490 {
491 .callback = intel_no_modeset_on_lid_dmi_callback,
492 .ident = "Toshiba Tecra A11",
493 .matches = {
494 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
495 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
496 },
497 },
498
499 { } /* terminating entry */
500 };
501
502 /*
503 * Lid events. Note the use of 'modeset_on_lid':
504 * - we set it on lid close, and reset it on open
505 * - we use it as a "only once" bit (ie we ignore
506 * duplicate events where it was already properly
507 * set/reset)
508 * - the suspend/resume paths will also set it to
509 * zero, since they restore the mode ("lid open").
510 */
511 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
512 void *unused)
513 {
514 struct drm_i915_private *dev_priv =
515 container_of(nb, struct drm_i915_private, lid_notifier);
516 struct drm_device *dev = dev_priv->dev;
517 struct drm_connector *connector = dev_priv->int_lvds_connector;
518
519 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
520 return NOTIFY_OK;
521
522 /*
523 * check and update the status of LVDS connector after receiving
524 * the LID nofication event.
525 */
526 if (connector)
527 connector->status = connector->funcs->detect(connector,
528 false);
529
530 /* Don't force modeset on machines where it causes a GPU lockup */
531 if (dmi_check_system(intel_no_modeset_on_lid))
532 return NOTIFY_OK;
533 if (!acpi_lid_open()) {
534 dev_priv->modeset_on_lid = 1;
535 return NOTIFY_OK;
536 }
537
538 if (!dev_priv->modeset_on_lid)
539 return NOTIFY_OK;
540
541 dev_priv->modeset_on_lid = 0;
542
543 mutex_lock(&dev->mode_config.mutex);
544 drm_helper_resume_force_mode(dev);
545 mutex_unlock(&dev->mode_config.mutex);
546
547 return NOTIFY_OK;
548 }
549
550 /**
551 * intel_lvds_destroy - unregister and free LVDS structures
552 * @connector: connector to free
553 *
554 * Unregister the DDC bus for this connector then free the driver private
555 * structure.
556 */
557 static void intel_lvds_destroy(struct drm_connector *connector)
558 {
559 struct drm_device *dev = connector->dev;
560 struct drm_i915_private *dev_priv = dev->dev_private;
561
562 intel_panel_destroy_backlight(dev);
563
564 if (dev_priv->lid_notifier.notifier_call)
565 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
566 drm_sysfs_connector_remove(connector);
567 drm_connector_cleanup(connector);
568 kfree(connector);
569 }
570
571 static int intel_lvds_set_property(struct drm_connector *connector,
572 struct drm_property *property,
573 uint64_t value)
574 {
575 struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
576 struct drm_device *dev = connector->dev;
577
578 if (property == dev->mode_config.scaling_mode_property) {
579 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
580
581 if (value == DRM_MODE_SCALE_NONE) {
582 DRM_DEBUG_KMS("no scaling not supported\n");
583 return -EINVAL;
584 }
585
586 if (intel_lvds->fitting_mode == value) {
587 /* the LVDS scaling property is not changed */
588 return 0;
589 }
590 intel_lvds->fitting_mode = value;
591 if (crtc && crtc->enabled) {
592 /*
593 * If the CRTC is enabled, the display will be changed
594 * according to the new panel fitting mode.
595 */
596 drm_crtc_helper_set_mode(crtc, &crtc->mode,
597 crtc->x, crtc->y, crtc->fb);
598 }
599 }
600
601 return 0;
602 }
603
604 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
605 .dpms = intel_lvds_dpms,
606 .mode_fixup = intel_lvds_mode_fixup,
607 .prepare = intel_lvds_prepare,
608 .mode_set = intel_lvds_mode_set,
609 .commit = intel_lvds_commit,
610 };
611
612 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
613 .get_modes = intel_lvds_get_modes,
614 .mode_valid = intel_lvds_mode_valid,
615 .best_encoder = intel_best_encoder,
616 };
617
618 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
619 .dpms = drm_helper_connector_dpms,
620 .detect = intel_lvds_detect,
621 .fill_modes = drm_helper_probe_single_connector_modes,
622 .set_property = intel_lvds_set_property,
623 .destroy = intel_lvds_destroy,
624 };
625
626 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
627 .destroy = intel_encoder_destroy,
628 };
629
630 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
631 {
632 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
633 return 1;
634 }
635
636 /* These systems claim to have LVDS, but really don't */
637 static const struct dmi_system_id intel_no_lvds[] = {
638 {
639 .callback = intel_no_lvds_dmi_callback,
640 .ident = "Apple Mac Mini (Core series)",
641 .matches = {
642 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
643 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
644 },
645 },
646 {
647 .callback = intel_no_lvds_dmi_callback,
648 .ident = "Apple Mac Mini (Core 2 series)",
649 .matches = {
650 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
651 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
652 },
653 },
654 {
655 .callback = intel_no_lvds_dmi_callback,
656 .ident = "MSI IM-945GSE-A",
657 .matches = {
658 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
659 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
660 },
661 },
662 {
663 .callback = intel_no_lvds_dmi_callback,
664 .ident = "Dell Studio Hybrid",
665 .matches = {
666 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
667 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
668 },
669 },
670 {
671 .callback = intel_no_lvds_dmi_callback,
672 .ident = "Dell OptiPlex FX170",
673 .matches = {
674 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
675 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
676 },
677 },
678 {
679 .callback = intel_no_lvds_dmi_callback,
680 .ident = "AOpen Mini PC",
681 .matches = {
682 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
683 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
684 },
685 },
686 {
687 .callback = intel_no_lvds_dmi_callback,
688 .ident = "AOpen Mini PC MP915",
689 .matches = {
690 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
691 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
692 },
693 },
694 {
695 .callback = intel_no_lvds_dmi_callback,
696 .ident = "AOpen i915GMm-HFS",
697 .matches = {
698 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
699 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
700 },
701 },
702 {
703 .callback = intel_no_lvds_dmi_callback,
704 .ident = "AOpen i45GMx-I",
705 .matches = {
706 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
707 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
708 },
709 },
710 {
711 .callback = intel_no_lvds_dmi_callback,
712 .ident = "Aopen i945GTt-VFA",
713 .matches = {
714 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
715 },
716 },
717 {
718 .callback = intel_no_lvds_dmi_callback,
719 .ident = "Clientron U800",
720 .matches = {
721 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
722 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
723 },
724 },
725 {
726 .callback = intel_no_lvds_dmi_callback,
727 .ident = "Clientron E830",
728 .matches = {
729 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
730 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
731 },
732 },
733 {
734 .callback = intel_no_lvds_dmi_callback,
735 .ident = "Asus EeeBox PC EB1007",
736 .matches = {
737 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
738 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
739 },
740 },
741 {
742 .callback = intel_no_lvds_dmi_callback,
743 .ident = "Asus AT5NM10T-I",
744 .matches = {
745 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
746 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
747 },
748 },
749 {
750 .callback = intel_no_lvds_dmi_callback,
751 .ident = "Hewlett-Packard HP t5740e Thin Client",
752 .matches = {
753 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
754 DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
755 },
756 },
757 {
758 .callback = intel_no_lvds_dmi_callback,
759 .ident = "Hewlett-Packard t5745",
760 .matches = {
761 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
762 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
763 },
764 },
765 {
766 .callback = intel_no_lvds_dmi_callback,
767 .ident = "Hewlett-Packard st5747",
768 .matches = {
769 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
770 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
771 },
772 },
773 {
774 .callback = intel_no_lvds_dmi_callback,
775 .ident = "MSI Wind Box DC500",
776 .matches = {
777 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
778 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
779 },
780 },
781
782 { } /* terminating entry */
783 };
784
785 /**
786 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
787 * @dev: drm device
788 * @connector: LVDS connector
789 *
790 * Find the reduced downclock for LVDS in EDID.
791 */
792 static void intel_find_lvds_downclock(struct drm_device *dev,
793 struct drm_display_mode *fixed_mode,
794 struct drm_connector *connector)
795 {
796 struct drm_i915_private *dev_priv = dev->dev_private;
797 struct drm_display_mode *scan;
798 int temp_downclock;
799
800 temp_downclock = fixed_mode->clock;
801 list_for_each_entry(scan, &connector->probed_modes, head) {
802 /*
803 * If one mode has the same resolution with the fixed_panel
804 * mode while they have the different refresh rate, it means
805 * that the reduced downclock is found for the LVDS. In such
806 * case we can set the different FPx0/1 to dynamically select
807 * between low and high frequency.
808 */
809 if (scan->hdisplay == fixed_mode->hdisplay &&
810 scan->hsync_start == fixed_mode->hsync_start &&
811 scan->hsync_end == fixed_mode->hsync_end &&
812 scan->htotal == fixed_mode->htotal &&
813 scan->vdisplay == fixed_mode->vdisplay &&
814 scan->vsync_start == fixed_mode->vsync_start &&
815 scan->vsync_end == fixed_mode->vsync_end &&
816 scan->vtotal == fixed_mode->vtotal) {
817 if (scan->clock < temp_downclock) {
818 /*
819 * The downclock is already found. But we
820 * expect to find the lower downclock.
821 */
822 temp_downclock = scan->clock;
823 }
824 }
825 }
826 if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
827 /* We found the downclock for LVDS. */
828 dev_priv->lvds_downclock_avail = 1;
829 dev_priv->lvds_downclock = temp_downclock;
830 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
831 "Normal clock %dKhz, downclock %dKhz\n",
832 fixed_mode->clock, temp_downclock);
833 }
834 }
835
836 /*
837 * Enumerate the child dev array parsed from VBT to check whether
838 * the LVDS is present.
839 * If it is present, return 1.
840 * If it is not present, return false.
841 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
842 */
843 static bool lvds_is_present_in_vbt(struct drm_device *dev,
844 u8 *i2c_pin)
845 {
846 struct drm_i915_private *dev_priv = dev->dev_private;
847 int i;
848
849 if (!dev_priv->child_dev_num)
850 return true;
851
852 for (i = 0; i < dev_priv->child_dev_num; i++) {
853 struct child_device_config *child = dev_priv->child_dev + i;
854
855 /* If the device type is not LFP, continue.
856 * We have to check both the new identifiers as well as the
857 * old for compatibility with some BIOSes.
858 */
859 if (child->device_type != DEVICE_TYPE_INT_LFP &&
860 child->device_type != DEVICE_TYPE_LFP)
861 continue;
862
863 if (intel_gmbus_is_port_valid(child->i2c_pin))
864 *i2c_pin = child->i2c_pin;
865
866 /* However, we cannot trust the BIOS writers to populate
867 * the VBT correctly. Since LVDS requires additional
868 * information from AIM blocks, a non-zero addin offset is
869 * a good indicator that the LVDS is actually present.
870 */
871 if (child->addin_offset)
872 return true;
873
874 /* But even then some BIOS writers perform some black magic
875 * and instantiate the device without reference to any
876 * additional data. Trust that if the VBT was written into
877 * the OpRegion then they have validated the LVDS's existence.
878 */
879 if (dev_priv->opregion.vbt)
880 return true;
881 }
882
883 return false;
884 }
885
886 static bool intel_lvds_supported(struct drm_device *dev)
887 {
888 /* With the introduction of the PCH we gained a dedicated
889 * LVDS presence pin, use it. */
890 if (HAS_PCH_SPLIT(dev))
891 return true;
892
893 /* Otherwise LVDS was only attached to mobile products,
894 * except for the inglorious 830gm */
895 return IS_MOBILE(dev) && !IS_I830(dev);
896 }
897
898 /**
899 * intel_lvds_init - setup LVDS connectors on this device
900 * @dev: drm device
901 *
902 * Create the connector, register the LVDS DDC bus, and try to figure out what
903 * modes we can display on the LVDS panel (if present).
904 */
905 bool intel_lvds_init(struct drm_device *dev)
906 {
907 struct drm_i915_private *dev_priv = dev->dev_private;
908 struct intel_lvds *intel_lvds;
909 struct intel_encoder *intel_encoder;
910 struct intel_connector *intel_connector;
911 struct drm_connector *connector;
912 struct drm_encoder *encoder;
913 struct drm_display_mode *scan; /* *modes, *bios_mode; */
914 struct drm_crtc *crtc;
915 u32 lvds;
916 int pipe;
917 u8 pin;
918
919 if (!intel_lvds_supported(dev))
920 return false;
921
922 /* Skip init on machines we know falsely report LVDS */
923 if (dmi_check_system(intel_no_lvds))
924 return false;
925
926 pin = GMBUS_PORT_PANEL;
927 if (!lvds_is_present_in_vbt(dev, &pin)) {
928 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
929 return false;
930 }
931
932 if (HAS_PCH_SPLIT(dev)) {
933 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
934 return false;
935 if (dev_priv->edp.support) {
936 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
937 return false;
938 }
939 }
940
941 intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
942 if (!intel_lvds) {
943 return false;
944 }
945
946 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
947 if (!intel_connector) {
948 kfree(intel_lvds);
949 return false;
950 }
951
952 if (!HAS_PCH_SPLIT(dev)) {
953 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
954 }
955
956 intel_encoder = &intel_lvds->base;
957 encoder = &intel_encoder->base;
958 connector = &intel_connector->base;
959 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
960 DRM_MODE_CONNECTOR_LVDS);
961
962 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
963 DRM_MODE_ENCODER_LVDS);
964
965 intel_connector_attach_encoder(intel_connector, intel_encoder);
966 intel_encoder->type = INTEL_OUTPUT_LVDS;
967
968 intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
969 if (HAS_PCH_SPLIT(dev))
970 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
971 else
972 intel_encoder->crtc_mask = (1 << 1);
973
974 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
975 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
976 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
977 connector->interlace_allowed = false;
978 connector->doublescan_allowed = false;
979
980 /* create the scaling mode property */
981 drm_mode_create_scaling_mode_property(dev);
982 /*
983 * the initial panel fitting mode will be FULL_SCREEN.
984 */
985
986 drm_connector_attach_property(&intel_connector->base,
987 dev->mode_config.scaling_mode_property,
988 DRM_MODE_SCALE_ASPECT);
989 intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
990 /*
991 * LVDS discovery:
992 * 1) check for EDID on DDC
993 * 2) check for VBT data
994 * 3) check to see if LVDS is already on
995 * if none of the above, no panel
996 * 4) make sure lid is open
997 * if closed, act like it's not there for now
998 */
999
1000 /*
1001 * Attempt to get the fixed panel mode from DDC. Assume that the
1002 * preferred mode is the right one.
1003 */
1004 intel_lvds->edid = drm_get_edid(connector,
1005 intel_gmbus_get_adapter(dev_priv,
1006 pin));
1007 if (intel_lvds->edid) {
1008 if (drm_add_edid_modes(connector,
1009 intel_lvds->edid)) {
1010 drm_mode_connector_update_edid_property(connector,
1011 intel_lvds->edid);
1012 } else {
1013 kfree(intel_lvds->edid);
1014 intel_lvds->edid = NULL;
1015 }
1016 }
1017 if (!intel_lvds->edid) {
1018 /* Didn't get an EDID, so
1019 * Set wide sync ranges so we get all modes
1020 * handed to valid_mode for checking
1021 */
1022 connector->display_info.min_vfreq = 0;
1023 connector->display_info.max_vfreq = 200;
1024 connector->display_info.min_hfreq = 0;
1025 connector->display_info.max_hfreq = 200;
1026 }
1027
1028 list_for_each_entry(scan, &connector->probed_modes, head) {
1029 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1030 intel_lvds->fixed_mode =
1031 drm_mode_duplicate(dev, scan);
1032 intel_find_lvds_downclock(dev,
1033 intel_lvds->fixed_mode,
1034 connector);
1035 goto out;
1036 }
1037 }
1038
1039 /* Failed to get EDID, what about VBT? */
1040 if (dev_priv->lfp_lvds_vbt_mode) {
1041 intel_lvds->fixed_mode =
1042 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1043 if (intel_lvds->fixed_mode) {
1044 intel_lvds->fixed_mode->type |=
1045 DRM_MODE_TYPE_PREFERRED;
1046 goto out;
1047 }
1048 }
1049
1050 /*
1051 * If we didn't get EDID, try checking if the panel is already turned
1052 * on. If so, assume that whatever is currently programmed is the
1053 * correct mode.
1054 */
1055
1056 /* Ironlake: FIXME if still fail, not try pipe mode now */
1057 if (HAS_PCH_SPLIT(dev))
1058 goto failed;
1059
1060 lvds = I915_READ(LVDS);
1061 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1062 crtc = intel_get_crtc_for_pipe(dev, pipe);
1063
1064 if (crtc && (lvds & LVDS_PORT_EN)) {
1065 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1066 if (intel_lvds->fixed_mode) {
1067 intel_lvds->fixed_mode->type |=
1068 DRM_MODE_TYPE_PREFERRED;
1069 goto out;
1070 }
1071 }
1072
1073 /* If we still don't have a mode after all that, give up. */
1074 if (!intel_lvds->fixed_mode)
1075 goto failed;
1076
1077 out:
1078 /*
1079 * Unlock registers and just
1080 * leave them unlocked
1081 */
1082 if (HAS_PCH_SPLIT(dev)) {
1083 I915_WRITE(PCH_PP_CONTROL,
1084 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1085 } else {
1086 I915_WRITE(PP_CONTROL,
1087 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1088 }
1089 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1090 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1091 DRM_DEBUG_KMS("lid notifier registration failed\n");
1092 dev_priv->lid_notifier.notifier_call = NULL;
1093 }
1094 /* keep the LVDS connector */
1095 dev_priv->int_lvds_connector = connector;
1096 drm_sysfs_connector_add(connector);
1097
1098 intel_panel_setup_backlight(dev);
1099
1100 return true;
1101
1102 failed:
1103 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1104 drm_connector_cleanup(connector);
1105 drm_encoder_cleanup(encoder);
1106 kfree(intel_lvds);
1107 kfree(intel_connector);
1108 return false;
1109 }