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1 /*
2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 */
29
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <drm/drmP.h>
35 #include <drm/drm_atomic_helper.h>
36 #include <drm/drm_crtc.h>
37 #include <drm/drm_edid.h>
38 #include "intel_drv.h"
39 #include <drm/i915_drm.h>
40 #include "i915_drv.h"
41 #include <linux/acpi.h>
42
43 /* Private structure for the integrated LVDS support */
44 struct intel_lvds_connector {
45 struct intel_connector base;
46
47 struct notifier_block lid_notifier;
48 };
49
50 struct intel_lvds_encoder {
51 struct intel_encoder base;
52
53 bool is_dual_link;
54 u32 reg;
55 u32 a3_power;
56
57 struct intel_lvds_connector *attached_connector;
58 };
59
60 static struct intel_lvds_encoder *to_lvds_encoder(struct drm_encoder *encoder)
61 {
62 return container_of(encoder, struct intel_lvds_encoder, base.base);
63 }
64
65 static struct intel_lvds_connector *to_lvds_connector(struct drm_connector *connector)
66 {
67 return container_of(connector, struct intel_lvds_connector, base.base);
68 }
69
70 static bool intel_lvds_get_hw_state(struct intel_encoder *encoder,
71 enum pipe *pipe)
72 {
73 struct drm_device *dev = encoder->base.dev;
74 struct drm_i915_private *dev_priv = dev->dev_private;
75 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
76 enum intel_display_power_domain power_domain;
77 u32 tmp;
78
79 power_domain = intel_display_port_power_domain(encoder);
80 if (!intel_display_power_is_enabled(dev_priv, power_domain))
81 return false;
82
83 tmp = I915_READ(lvds_encoder->reg);
84
85 if (!(tmp & LVDS_PORT_EN))
86 return false;
87
88 if (HAS_PCH_CPT(dev))
89 *pipe = PORT_TO_PIPE_CPT(tmp);
90 else
91 *pipe = PORT_TO_PIPE(tmp);
92
93 return true;
94 }
95
96 static void intel_lvds_get_config(struct intel_encoder *encoder,
97 struct intel_crtc_state *pipe_config)
98 {
99 struct drm_device *dev = encoder->base.dev;
100 struct drm_i915_private *dev_priv = dev->dev_private;
101 u32 lvds_reg, tmp, flags = 0;
102 int dotclock;
103
104 if (HAS_PCH_SPLIT(dev))
105 lvds_reg = PCH_LVDS;
106 else
107 lvds_reg = LVDS;
108
109 tmp = I915_READ(lvds_reg);
110 if (tmp & LVDS_HSYNC_POLARITY)
111 flags |= DRM_MODE_FLAG_NHSYNC;
112 else
113 flags |= DRM_MODE_FLAG_PHSYNC;
114 if (tmp & LVDS_VSYNC_POLARITY)
115 flags |= DRM_MODE_FLAG_NVSYNC;
116 else
117 flags |= DRM_MODE_FLAG_PVSYNC;
118
119 pipe_config->base.adjusted_mode.flags |= flags;
120
121 /* gen2/3 store dither state in pfit control, needs to match */
122 if (INTEL_INFO(dev)->gen < 4) {
123 tmp = I915_READ(PFIT_CONTROL);
124
125 pipe_config->gmch_pfit.control |= tmp & PANEL_8TO6_DITHER_ENABLE;
126 }
127
128 dotclock = pipe_config->port_clock;
129
130 if (HAS_PCH_SPLIT(dev_priv->dev))
131 ironlake_check_encoder_dotclock(pipe_config, dotclock);
132
133 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
134 }
135
136 static void intel_pre_enable_lvds(struct intel_encoder *encoder)
137 {
138 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
139 struct drm_device *dev = encoder->base.dev;
140 struct drm_i915_private *dev_priv = dev->dev_private;
141 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
142 const struct drm_display_mode *adjusted_mode =
143 &crtc->config->base.adjusted_mode;
144 int pipe = crtc->pipe;
145 u32 temp;
146
147 if (HAS_PCH_SPLIT(dev)) {
148 assert_fdi_rx_pll_disabled(dev_priv, pipe);
149 assert_shared_dpll_disabled(dev_priv,
150 intel_crtc_to_shared_dpll(crtc));
151 } else {
152 assert_pll_disabled(dev_priv, pipe);
153 }
154
155 temp = I915_READ(lvds_encoder->reg);
156 temp |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP;
157
158 if (HAS_PCH_CPT(dev)) {
159 temp &= ~PORT_TRANS_SEL_MASK;
160 temp |= PORT_TRANS_SEL_CPT(pipe);
161 } else {
162 if (pipe == 1) {
163 temp |= LVDS_PIPEB_SELECT;
164 } else {
165 temp &= ~LVDS_PIPEB_SELECT;
166 }
167 }
168
169 /* set the corresponsding LVDS_BORDER bit */
170 temp &= ~LVDS_BORDER_ENABLE;
171 temp |= crtc->config->gmch_pfit.lvds_border_bits;
172 /* Set the B0-B3 data pairs corresponding to whether we're going to
173 * set the DPLLs for dual-channel mode or not.
174 */
175 if (lvds_encoder->is_dual_link)
176 temp |= LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP;
177 else
178 temp &= ~(LVDS_B0B3_POWER_UP | LVDS_CLKB_POWER_UP);
179
180 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
181 * appropriately here, but we need to look more thoroughly into how
182 * panels behave in the two modes. For now, let's just maintain the
183 * value we got from the BIOS.
184 */
185 temp &= ~LVDS_A3_POWER_MASK;
186 temp |= lvds_encoder->a3_power;
187
188 /* Set the dithering flag on LVDS as needed, note that there is no
189 * special lvds dither control bit on pch-split platforms, dithering is
190 * only controlled through the PIPECONF reg. */
191 if (INTEL_INFO(dev)->gen == 4) {
192 /* Bspec wording suggests that LVDS port dithering only exists
193 * for 18bpp panels. */
194 if (crtc->config->dither && crtc->config->pipe_bpp == 18)
195 temp |= LVDS_ENABLE_DITHER;
196 else
197 temp &= ~LVDS_ENABLE_DITHER;
198 }
199 temp &= ~(LVDS_HSYNC_POLARITY | LVDS_VSYNC_POLARITY);
200 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
201 temp |= LVDS_HSYNC_POLARITY;
202 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
203 temp |= LVDS_VSYNC_POLARITY;
204
205 I915_WRITE(lvds_encoder->reg, temp);
206 }
207
208 /**
209 * Sets the power state for the panel.
210 */
211 static void intel_enable_lvds(struct intel_encoder *encoder)
212 {
213 struct drm_device *dev = encoder->base.dev;
214 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
215 struct intel_connector *intel_connector =
216 &lvds_encoder->attached_connector->base;
217 struct drm_i915_private *dev_priv = dev->dev_private;
218 u32 ctl_reg, stat_reg;
219
220 if (HAS_PCH_SPLIT(dev)) {
221 ctl_reg = PCH_PP_CONTROL;
222 stat_reg = PCH_PP_STATUS;
223 } else {
224 ctl_reg = PP_CONTROL;
225 stat_reg = PP_STATUS;
226 }
227
228 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) | LVDS_PORT_EN);
229
230 I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
231 POSTING_READ(lvds_encoder->reg);
232 if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
233 DRM_ERROR("timed out waiting for panel to power on\n");
234
235 intel_panel_enable_backlight(intel_connector);
236 }
237
238 static void intel_disable_lvds(struct intel_encoder *encoder)
239 {
240 struct drm_device *dev = encoder->base.dev;
241 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
242 struct drm_i915_private *dev_priv = dev->dev_private;
243 u32 ctl_reg, stat_reg;
244
245 if (HAS_PCH_SPLIT(dev)) {
246 ctl_reg = PCH_PP_CONTROL;
247 stat_reg = PCH_PP_STATUS;
248 } else {
249 ctl_reg = PP_CONTROL;
250 stat_reg = PP_STATUS;
251 }
252
253 I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
254 if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
255 DRM_ERROR("timed out waiting for panel to power off\n");
256
257 I915_WRITE(lvds_encoder->reg, I915_READ(lvds_encoder->reg) & ~LVDS_PORT_EN);
258 POSTING_READ(lvds_encoder->reg);
259 }
260
261 static void gmch_disable_lvds(struct intel_encoder *encoder)
262 {
263 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
264 struct intel_connector *intel_connector =
265 &lvds_encoder->attached_connector->base;
266
267 intel_panel_disable_backlight(intel_connector);
268
269 intel_disable_lvds(encoder);
270 }
271
272 static void pch_disable_lvds(struct intel_encoder *encoder)
273 {
274 struct intel_lvds_encoder *lvds_encoder = to_lvds_encoder(&encoder->base);
275 struct intel_connector *intel_connector =
276 &lvds_encoder->attached_connector->base;
277
278 intel_panel_disable_backlight(intel_connector);
279 }
280
281 static void pch_post_disable_lvds(struct intel_encoder *encoder)
282 {
283 intel_disable_lvds(encoder);
284 }
285
286 static enum drm_mode_status
287 intel_lvds_mode_valid(struct drm_connector *connector,
288 struct drm_display_mode *mode)
289 {
290 struct intel_connector *intel_connector = to_intel_connector(connector);
291 struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
292
293 if (mode->hdisplay > fixed_mode->hdisplay)
294 return MODE_PANEL;
295 if (mode->vdisplay > fixed_mode->vdisplay)
296 return MODE_PANEL;
297
298 return MODE_OK;
299 }
300
301 static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
302 struct intel_crtc_state *pipe_config)
303 {
304 struct drm_device *dev = intel_encoder->base.dev;
305 struct intel_lvds_encoder *lvds_encoder =
306 to_lvds_encoder(&intel_encoder->base);
307 struct intel_connector *intel_connector =
308 &lvds_encoder->attached_connector->base;
309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc);
311 unsigned int lvds_bpp;
312
313 /* Should never happen!! */
314 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
315 DRM_ERROR("Can't support LVDS on pipe A\n");
316 return false;
317 }
318
319 if (lvds_encoder->a3_power == LVDS_A3_POWER_UP)
320 lvds_bpp = 8*3;
321 else
322 lvds_bpp = 6*3;
323
324 if (lvds_bpp != pipe_config->pipe_bpp && !pipe_config->bw_constrained) {
325 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
326 pipe_config->pipe_bpp, lvds_bpp);
327 pipe_config->pipe_bpp = lvds_bpp;
328 }
329
330 /*
331 * We have timings from the BIOS for the panel, put them in
332 * to the adjusted mode. The CRTC will be set up for this mode,
333 * with the panel scaling set up to source from the H/VDisplay
334 * of the original mode.
335 */
336 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
337 adjusted_mode);
338
339 if (HAS_PCH_SPLIT(dev)) {
340 pipe_config->has_pch_encoder = true;
341
342 intel_pch_panel_fitting(intel_crtc, pipe_config,
343 intel_connector->panel.fitting_mode);
344 } else {
345 intel_gmch_panel_fitting(intel_crtc, pipe_config,
346 intel_connector->panel.fitting_mode);
347
348 }
349
350 /*
351 * XXX: It would be nice to support lower refresh rates on the
352 * panels to reduce power consumption, and perhaps match the
353 * user's requested refresh rate.
354 */
355
356 return true;
357 }
358
359 /**
360 * Detect the LVDS connection.
361 *
362 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
363 * connected and closed means disconnected. We also send hotplug events as
364 * needed, using lid status notification from the input layer.
365 */
366 static enum drm_connector_status
367 intel_lvds_detect(struct drm_connector *connector, bool force)
368 {
369 struct drm_device *dev = connector->dev;
370 enum drm_connector_status status;
371
372 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
373 connector->base.id, connector->name);
374
375 status = intel_panel_detect(dev);
376 if (status != connector_status_unknown)
377 return status;
378
379 return connector_status_connected;
380 }
381
382 /**
383 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
384 */
385 static int intel_lvds_get_modes(struct drm_connector *connector)
386 {
387 struct intel_lvds_connector *lvds_connector = to_lvds_connector(connector);
388 struct drm_device *dev = connector->dev;
389 struct drm_display_mode *mode;
390
391 /* use cached edid if we have one */
392 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
393 return drm_add_edid_modes(connector, lvds_connector->base.edid);
394
395 mode = drm_mode_duplicate(dev, lvds_connector->base.panel.fixed_mode);
396 if (mode == NULL)
397 return 0;
398
399 drm_mode_probed_add(connector, mode);
400 return 1;
401 }
402
403 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
404 {
405 DRM_INFO("Skipping forced modeset for %s\n", id->ident);
406 return 1;
407 }
408
409 /* The GPU hangs up on these systems if modeset is performed on LID open */
410 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
411 {
412 .callback = intel_no_modeset_on_lid_dmi_callback,
413 .ident = "Toshiba Tecra A11",
414 .matches = {
415 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
416 DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
417 },
418 },
419
420 { } /* terminating entry */
421 };
422
423 /*
424 * Lid events. Note the use of 'modeset':
425 * - we set it to MODESET_ON_LID_OPEN on lid close,
426 * and set it to MODESET_DONE on open
427 * - we use it as a "only once" bit (ie we ignore
428 * duplicate events where it was already properly set)
429 * - the suspend/resume paths will set it to
430 * MODESET_SUSPENDED and ignore the lid open event,
431 * because they restore the mode ("lid open").
432 */
433 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
434 void *unused)
435 {
436 struct intel_lvds_connector *lvds_connector =
437 container_of(nb, struct intel_lvds_connector, lid_notifier);
438 struct drm_connector *connector = &lvds_connector->base.base;
439 struct drm_device *dev = connector->dev;
440 struct drm_i915_private *dev_priv = dev->dev_private;
441
442 if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
443 return NOTIFY_OK;
444
445 mutex_lock(&dev_priv->modeset_restore_lock);
446 if (dev_priv->modeset_restore == MODESET_SUSPENDED)
447 goto exit;
448 /*
449 * check and update the status of LVDS connector after receiving
450 * the LID nofication event.
451 */
452 connector->status = connector->funcs->detect(connector, false);
453
454 /* Don't force modeset on machines where it causes a GPU lockup */
455 if (dmi_check_system(intel_no_modeset_on_lid))
456 goto exit;
457 if (!acpi_lid_open()) {
458 /* do modeset on next lid open event */
459 dev_priv->modeset_restore = MODESET_ON_LID_OPEN;
460 goto exit;
461 }
462
463 if (dev_priv->modeset_restore == MODESET_DONE)
464 goto exit;
465
466 /*
467 * Some old platform's BIOS love to wreak havoc while the lid is closed.
468 * We try to detect this here and undo any damage. The split for PCH
469 * platforms is rather conservative and a bit arbitrary expect that on
470 * those platforms VGA disabling requires actual legacy VGA I/O access,
471 * and as part of the cleanup in the hw state restore we also redisable
472 * the vga plane.
473 */
474 if (!HAS_PCH_SPLIT(dev)) {
475 drm_modeset_lock_all(dev);
476 intel_display_resume(dev);
477 drm_modeset_unlock_all(dev);
478 }
479
480 dev_priv->modeset_restore = MODESET_DONE;
481
482 exit:
483 mutex_unlock(&dev_priv->modeset_restore_lock);
484 return NOTIFY_OK;
485 }
486
487 /**
488 * intel_lvds_destroy - unregister and free LVDS structures
489 * @connector: connector to free
490 *
491 * Unregister the DDC bus for this connector then free the driver private
492 * structure.
493 */
494 static void intel_lvds_destroy(struct drm_connector *connector)
495 {
496 struct intel_lvds_connector *lvds_connector =
497 to_lvds_connector(connector);
498
499 if (lvds_connector->lid_notifier.notifier_call)
500 acpi_lid_notifier_unregister(&lvds_connector->lid_notifier);
501
502 if (!IS_ERR_OR_NULL(lvds_connector->base.edid))
503 kfree(lvds_connector->base.edid);
504
505 intel_panel_fini(&lvds_connector->base.panel);
506
507 drm_connector_cleanup(connector);
508 kfree(connector);
509 }
510
511 static int intel_lvds_set_property(struct drm_connector *connector,
512 struct drm_property *property,
513 uint64_t value)
514 {
515 struct intel_connector *intel_connector = to_intel_connector(connector);
516 struct drm_device *dev = connector->dev;
517
518 if (property == dev->mode_config.scaling_mode_property) {
519 struct drm_crtc *crtc;
520
521 if (value == DRM_MODE_SCALE_NONE) {
522 DRM_DEBUG_KMS("no scaling not supported\n");
523 return -EINVAL;
524 }
525
526 if (intel_connector->panel.fitting_mode == value) {
527 /* the LVDS scaling property is not changed */
528 return 0;
529 }
530 intel_connector->panel.fitting_mode = value;
531
532 crtc = intel_attached_encoder(connector)->base.crtc;
533 if (crtc && crtc->state->enable) {
534 /*
535 * If the CRTC is enabled, the display will be changed
536 * according to the new panel fitting mode.
537 */
538 intel_crtc_restore_mode(crtc);
539 }
540 }
541
542 return 0;
543 }
544
545 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
546 .get_modes = intel_lvds_get_modes,
547 .mode_valid = intel_lvds_mode_valid,
548 .best_encoder = intel_best_encoder,
549 };
550
551 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
552 .dpms = drm_atomic_helper_connector_dpms,
553 .detect = intel_lvds_detect,
554 .fill_modes = drm_helper_probe_single_connector_modes,
555 .set_property = intel_lvds_set_property,
556 .atomic_get_property = intel_connector_atomic_get_property,
557 .destroy = intel_lvds_destroy,
558 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
559 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
560 };
561
562 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
563 .destroy = intel_encoder_destroy,
564 };
565
566 static int intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
567 {
568 DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
569 return 1;
570 }
571
572 /* These systems claim to have LVDS, but really don't */
573 static const struct dmi_system_id intel_no_lvds[] = {
574 {
575 .callback = intel_no_lvds_dmi_callback,
576 .ident = "Apple Mac Mini (Core series)",
577 .matches = {
578 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
579 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
580 },
581 },
582 {
583 .callback = intel_no_lvds_dmi_callback,
584 .ident = "Apple Mac Mini (Core 2 series)",
585 .matches = {
586 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
587 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
588 },
589 },
590 {
591 .callback = intel_no_lvds_dmi_callback,
592 .ident = "MSI IM-945GSE-A",
593 .matches = {
594 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
595 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
596 },
597 },
598 {
599 .callback = intel_no_lvds_dmi_callback,
600 .ident = "Dell Studio Hybrid",
601 .matches = {
602 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
603 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
604 },
605 },
606 {
607 .callback = intel_no_lvds_dmi_callback,
608 .ident = "Dell OptiPlex FX170",
609 .matches = {
610 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
611 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
612 },
613 },
614 {
615 .callback = intel_no_lvds_dmi_callback,
616 .ident = "AOpen Mini PC",
617 .matches = {
618 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
619 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
620 },
621 },
622 {
623 .callback = intel_no_lvds_dmi_callback,
624 .ident = "AOpen Mini PC MP915",
625 .matches = {
626 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
627 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
628 },
629 },
630 {
631 .callback = intel_no_lvds_dmi_callback,
632 .ident = "AOpen i915GMm-HFS",
633 .matches = {
634 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
635 DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
636 },
637 },
638 {
639 .callback = intel_no_lvds_dmi_callback,
640 .ident = "AOpen i45GMx-I",
641 .matches = {
642 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
643 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
644 },
645 },
646 {
647 .callback = intel_no_lvds_dmi_callback,
648 .ident = "Aopen i945GTt-VFA",
649 .matches = {
650 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
651 },
652 },
653 {
654 .callback = intel_no_lvds_dmi_callback,
655 .ident = "Clientron U800",
656 .matches = {
657 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
658 DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
659 },
660 },
661 {
662 .callback = intel_no_lvds_dmi_callback,
663 .ident = "Clientron E830",
664 .matches = {
665 DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
666 DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
667 },
668 },
669 {
670 .callback = intel_no_lvds_dmi_callback,
671 .ident = "Asus EeeBox PC EB1007",
672 .matches = {
673 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
674 DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
675 },
676 },
677 {
678 .callback = intel_no_lvds_dmi_callback,
679 .ident = "Asus AT5NM10T-I",
680 .matches = {
681 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
682 DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
683 },
684 },
685 {
686 .callback = intel_no_lvds_dmi_callback,
687 .ident = "Hewlett-Packard HP t5740",
688 .matches = {
689 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
690 DMI_MATCH(DMI_PRODUCT_NAME, " t5740"),
691 },
692 },
693 {
694 .callback = intel_no_lvds_dmi_callback,
695 .ident = "Hewlett-Packard t5745",
696 .matches = {
697 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
698 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
699 },
700 },
701 {
702 .callback = intel_no_lvds_dmi_callback,
703 .ident = "Hewlett-Packard st5747",
704 .matches = {
705 DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
706 DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
707 },
708 },
709 {
710 .callback = intel_no_lvds_dmi_callback,
711 .ident = "MSI Wind Box DC500",
712 .matches = {
713 DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
714 DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
715 },
716 },
717 {
718 .callback = intel_no_lvds_dmi_callback,
719 .ident = "Gigabyte GA-D525TUD",
720 .matches = {
721 DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
722 DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
723 },
724 },
725 {
726 .callback = intel_no_lvds_dmi_callback,
727 .ident = "Supermicro X7SPA-H",
728 .matches = {
729 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
730 DMI_MATCH(DMI_PRODUCT_NAME, "X7SPA-H"),
731 },
732 },
733 {
734 .callback = intel_no_lvds_dmi_callback,
735 .ident = "Fujitsu Esprimo Q900",
736 .matches = {
737 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU"),
738 DMI_MATCH(DMI_PRODUCT_NAME, "ESPRIMO Q900"),
739 },
740 },
741 {
742 .callback = intel_no_lvds_dmi_callback,
743 .ident = "Intel D410PT",
744 .matches = {
745 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
746 DMI_MATCH(DMI_BOARD_NAME, "D410PT"),
747 },
748 },
749 {
750 .callback = intel_no_lvds_dmi_callback,
751 .ident = "Intel D425KT",
752 .matches = {
753 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
754 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D425KT"),
755 },
756 },
757 {
758 .callback = intel_no_lvds_dmi_callback,
759 .ident = "Intel D510MO",
760 .matches = {
761 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
762 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D510MO"),
763 },
764 },
765 {
766 .callback = intel_no_lvds_dmi_callback,
767 .ident = "Intel D525MW",
768 .matches = {
769 DMI_MATCH(DMI_BOARD_VENDOR, "Intel"),
770 DMI_EXACT_MATCH(DMI_BOARD_NAME, "D525MW"),
771 },
772 },
773
774 { } /* terminating entry */
775 };
776
777 /*
778 * Enumerate the child dev array parsed from VBT to check whether
779 * the LVDS is present.
780 * If it is present, return 1.
781 * If it is not present, return false.
782 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
783 */
784 static bool lvds_is_present_in_vbt(struct drm_device *dev,
785 u8 *i2c_pin)
786 {
787 struct drm_i915_private *dev_priv = dev->dev_private;
788 int i;
789
790 if (!dev_priv->vbt.child_dev_num)
791 return true;
792
793 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
794 union child_device_config *uchild = dev_priv->vbt.child_dev + i;
795 struct old_child_dev_config *child = &uchild->old;
796
797 /* If the device type is not LFP, continue.
798 * We have to check both the new identifiers as well as the
799 * old for compatibility with some BIOSes.
800 */
801 if (child->device_type != DEVICE_TYPE_INT_LFP &&
802 child->device_type != DEVICE_TYPE_LFP)
803 continue;
804
805 if (intel_gmbus_is_valid_pin(dev_priv, child->i2c_pin))
806 *i2c_pin = child->i2c_pin;
807
808 /* However, we cannot trust the BIOS writers to populate
809 * the VBT correctly. Since LVDS requires additional
810 * information from AIM blocks, a non-zero addin offset is
811 * a good indicator that the LVDS is actually present.
812 */
813 if (child->addin_offset)
814 return true;
815
816 /* But even then some BIOS writers perform some black magic
817 * and instantiate the device without reference to any
818 * additional data. Trust that if the VBT was written into
819 * the OpRegion then they have validated the LVDS's existence.
820 */
821 if (dev_priv->opregion.vbt)
822 return true;
823 }
824
825 return false;
826 }
827
828 static int intel_dual_link_lvds_callback(const struct dmi_system_id *id)
829 {
830 DRM_INFO("Forcing lvds to dual link mode on %s\n", id->ident);
831 return 1;
832 }
833
834 static const struct dmi_system_id intel_dual_link_lvds[] = {
835 {
836 .callback = intel_dual_link_lvds_callback,
837 .ident = "Apple MacBook Pro 15\" (2010)",
838 .matches = {
839 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
840 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro6,2"),
841 },
842 },
843 {
844 .callback = intel_dual_link_lvds_callback,
845 .ident = "Apple MacBook Pro 15\" (2011)",
846 .matches = {
847 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
848 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro8,2"),
849 },
850 },
851 {
852 .callback = intel_dual_link_lvds_callback,
853 .ident = "Apple MacBook Pro 15\" (2012)",
854 .matches = {
855 DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
856 DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro9,1"),
857 },
858 },
859 { } /* terminating entry */
860 };
861
862 bool intel_is_dual_link_lvds(struct drm_device *dev)
863 {
864 struct intel_encoder *encoder;
865 struct intel_lvds_encoder *lvds_encoder;
866
867 for_each_intel_encoder(dev, encoder) {
868 if (encoder->type == INTEL_OUTPUT_LVDS) {
869 lvds_encoder = to_lvds_encoder(&encoder->base);
870
871 return lvds_encoder->is_dual_link;
872 }
873 }
874
875 return false;
876 }
877
878 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
879 {
880 struct drm_device *dev = lvds_encoder->base.base.dev;
881 unsigned int val;
882 struct drm_i915_private *dev_priv = dev->dev_private;
883
884 /* use the module option value if specified */
885 if (i915.lvds_channel_mode > 0)
886 return i915.lvds_channel_mode == 2;
887
888 /* single channel LVDS is limited to 112 MHz */
889 if (lvds_encoder->attached_connector->base.panel.fixed_mode->clock
890 > 112999)
891 return true;
892
893 if (dmi_check_system(intel_dual_link_lvds))
894 return true;
895
896 /* BIOS should set the proper LVDS register value at boot, but
897 * in reality, it doesn't set the value when the lid is closed;
898 * we need to check "the value to be set" in VBT when LVDS
899 * register is uninitialized.
900 */
901 val = I915_READ(lvds_encoder->reg);
902 if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
903 val = dev_priv->vbt.bios_lvds_val;
904
905 return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
906 }
907
908 static bool intel_lvds_supported(struct drm_device *dev)
909 {
910 /* With the introduction of the PCH we gained a dedicated
911 * LVDS presence pin, use it. */
912 if (HAS_PCH_IBX(dev) || HAS_PCH_CPT(dev))
913 return true;
914
915 /* Otherwise LVDS was only attached to mobile products,
916 * except for the inglorious 830gm */
917 if (INTEL_INFO(dev)->gen <= 4 && IS_MOBILE(dev) && !IS_I830(dev))
918 return true;
919
920 return false;
921 }
922
923 /**
924 * intel_lvds_init - setup LVDS connectors on this device
925 * @dev: drm device
926 *
927 * Create the connector, register the LVDS DDC bus, and try to figure out what
928 * modes we can display on the LVDS panel (if present).
929 */
930 void intel_lvds_init(struct drm_device *dev)
931 {
932 struct drm_i915_private *dev_priv = dev->dev_private;
933 struct intel_lvds_encoder *lvds_encoder;
934 struct intel_encoder *intel_encoder;
935 struct intel_lvds_connector *lvds_connector;
936 struct intel_connector *intel_connector;
937 struct drm_connector *connector;
938 struct drm_encoder *encoder;
939 struct drm_display_mode *scan; /* *modes, *bios_mode; */
940 struct drm_display_mode *fixed_mode = NULL;
941 struct drm_display_mode *downclock_mode = NULL;
942 struct edid *edid;
943 struct drm_crtc *crtc;
944 u32 lvds;
945 int pipe;
946 u8 pin;
947
948 /*
949 * Unlock registers and just leave them unlocked. Do this before
950 * checking quirk lists to avoid bogus WARNINGs.
951 */
952 if (HAS_PCH_SPLIT(dev)) {
953 I915_WRITE(PCH_PP_CONTROL,
954 I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
955 } else {
956 I915_WRITE(PP_CONTROL,
957 I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
958 }
959 if (!intel_lvds_supported(dev))
960 return;
961
962 /* Skip init on machines we know falsely report LVDS */
963 if (dmi_check_system(intel_no_lvds))
964 return;
965
966 if (HAS_PCH_SPLIT(dev)) {
967 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
968 return;
969 if (dev_priv->vbt.edp_support) {
970 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
971 return;
972 }
973 }
974
975 pin = GMBUS_PIN_PANEL;
976 if (!lvds_is_present_in_vbt(dev, &pin)) {
977 u32 reg = HAS_PCH_SPLIT(dev) ? PCH_LVDS : LVDS;
978 if ((I915_READ(reg) & LVDS_PORT_EN) == 0) {
979 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
980 return;
981 }
982 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
983 }
984
985 lvds_encoder = kzalloc(sizeof(*lvds_encoder), GFP_KERNEL);
986 if (!lvds_encoder)
987 return;
988
989 lvds_connector = kzalloc(sizeof(*lvds_connector), GFP_KERNEL);
990 if (!lvds_connector) {
991 kfree(lvds_encoder);
992 return;
993 }
994
995 if (intel_connector_init(&lvds_connector->base) < 0) {
996 kfree(lvds_connector);
997 kfree(lvds_encoder);
998 return;
999 }
1000
1001 lvds_encoder->attached_connector = lvds_connector;
1002
1003 intel_encoder = &lvds_encoder->base;
1004 encoder = &intel_encoder->base;
1005 intel_connector = &lvds_connector->base;
1006 connector = &intel_connector->base;
1007 drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
1008 DRM_MODE_CONNECTOR_LVDS);
1009
1010 drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
1011 DRM_MODE_ENCODER_LVDS);
1012
1013 intel_encoder->enable = intel_enable_lvds;
1014 intel_encoder->pre_enable = intel_pre_enable_lvds;
1015 intel_encoder->compute_config = intel_lvds_compute_config;
1016 if (HAS_PCH_SPLIT(dev_priv)) {
1017 intel_encoder->disable = pch_disable_lvds;
1018 intel_encoder->post_disable = pch_post_disable_lvds;
1019 } else {
1020 intel_encoder->disable = gmch_disable_lvds;
1021 }
1022 intel_encoder->get_hw_state = intel_lvds_get_hw_state;
1023 intel_encoder->get_config = intel_lvds_get_config;
1024 intel_connector->get_hw_state = intel_connector_get_hw_state;
1025 intel_connector->unregister = intel_connector_unregister;
1026
1027 intel_connector_attach_encoder(intel_connector, intel_encoder);
1028 intel_encoder->type = INTEL_OUTPUT_LVDS;
1029
1030 intel_encoder->cloneable = 0;
1031 if (HAS_PCH_SPLIT(dev))
1032 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
1033 else if (IS_GEN4(dev))
1034 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
1035 else
1036 intel_encoder->crtc_mask = (1 << 1);
1037
1038 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1039 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1040 connector->interlace_allowed = false;
1041 connector->doublescan_allowed = false;
1042
1043 if (HAS_PCH_SPLIT(dev)) {
1044 lvds_encoder->reg = PCH_LVDS;
1045 } else {
1046 lvds_encoder->reg = LVDS;
1047 }
1048
1049 /* create the scaling mode property */
1050 drm_mode_create_scaling_mode_property(dev);
1051 drm_object_attach_property(&connector->base,
1052 dev->mode_config.scaling_mode_property,
1053 DRM_MODE_SCALE_ASPECT);
1054 intel_connector->panel.fitting_mode = DRM_MODE_SCALE_ASPECT;
1055 /*
1056 * LVDS discovery:
1057 * 1) check for EDID on DDC
1058 * 2) check for VBT data
1059 * 3) check to see if LVDS is already on
1060 * if none of the above, no panel
1061 * 4) make sure lid is open
1062 * if closed, act like it's not there for now
1063 */
1064
1065 /*
1066 * Attempt to get the fixed panel mode from DDC. Assume that the
1067 * preferred mode is the right one.
1068 */
1069 mutex_lock(&dev->mode_config.mutex);
1070 edid = drm_get_edid(connector, intel_gmbus_get_adapter(dev_priv, pin));
1071 if (edid) {
1072 if (drm_add_edid_modes(connector, edid)) {
1073 drm_mode_connector_update_edid_property(connector,
1074 edid);
1075 } else {
1076 kfree(edid);
1077 edid = ERR_PTR(-EINVAL);
1078 }
1079 } else {
1080 edid = ERR_PTR(-ENOENT);
1081 }
1082 lvds_connector->base.edid = edid;
1083
1084 if (IS_ERR_OR_NULL(edid)) {
1085 /* Didn't get an EDID, so
1086 * Set wide sync ranges so we get all modes
1087 * handed to valid_mode for checking
1088 */
1089 connector->display_info.min_vfreq = 0;
1090 connector->display_info.max_vfreq = 200;
1091 connector->display_info.min_hfreq = 0;
1092 connector->display_info.max_hfreq = 200;
1093 }
1094
1095 list_for_each_entry(scan, &connector->probed_modes, head) {
1096 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1097 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1098 drm_mode_debug_printmodeline(scan);
1099
1100 fixed_mode = drm_mode_duplicate(dev, scan);
1101 if (fixed_mode)
1102 goto out;
1103 }
1104 }
1105
1106 /* Failed to get EDID, what about VBT? */
1107 if (dev_priv->vbt.lfp_lvds_vbt_mode) {
1108 DRM_DEBUG_KMS("using mode from VBT: ");
1109 drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
1110
1111 fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
1112 if (fixed_mode) {
1113 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1114 goto out;
1115 }
1116 }
1117
1118 /*
1119 * If we didn't get EDID, try checking if the panel is already turned
1120 * on. If so, assume that whatever is currently programmed is the
1121 * correct mode.
1122 */
1123
1124 /* Ironlake: FIXME if still fail, not try pipe mode now */
1125 if (HAS_PCH_SPLIT(dev))
1126 goto failed;
1127
1128 lvds = I915_READ(LVDS);
1129 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1130 crtc = intel_get_crtc_for_pipe(dev, pipe);
1131
1132 if (crtc && (lvds & LVDS_PORT_EN)) {
1133 fixed_mode = intel_crtc_mode_get(dev, crtc);
1134 if (fixed_mode) {
1135 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1136 drm_mode_debug_printmodeline(fixed_mode);
1137 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
1138 goto out;
1139 }
1140 }
1141
1142 /* If we still don't have a mode after all that, give up. */
1143 if (!fixed_mode)
1144 goto failed;
1145
1146 out:
1147 mutex_unlock(&dev->mode_config.mutex);
1148
1149 intel_panel_init(&intel_connector->panel, fixed_mode, downclock_mode);
1150
1151 lvds_encoder->is_dual_link = compute_is_dual_link_lvds(lvds_encoder);
1152 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1153 lvds_encoder->is_dual_link ? "dual" : "single");
1154
1155 lvds_encoder->a3_power = I915_READ(lvds_encoder->reg) &
1156 LVDS_A3_POWER_MASK;
1157
1158 lvds_connector->lid_notifier.notifier_call = intel_lid_notify;
1159 if (acpi_lid_notifier_register(&lvds_connector->lid_notifier)) {
1160 DRM_DEBUG_KMS("lid notifier registration failed\n");
1161 lvds_connector->lid_notifier.notifier_call = NULL;
1162 }
1163 drm_connector_register(connector);
1164
1165 intel_panel_setup_backlight(connector, INVALID_PIPE);
1166
1167 return;
1168
1169 failed:
1170 mutex_unlock(&dev->mode_config.mutex);
1171
1172 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1173 drm_connector_cleanup(connector);
1174 drm_encoder_cleanup(encoder);
1175 kfree(lvds_encoder);
1176 kfree(lvds_connector);
1177 return;
1178 }