2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
33 #include <linux/slab.h>
34 #include <linux/vga_switcheroo.h>
36 #include <drm/drm_atomic_helper.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_edid.h>
39 #include "intel_drv.h"
40 #include <drm/i915_drm.h>
42 #include <linux/acpi.h>
44 /* Private structure for the integrated LVDS support */
45 struct intel_lvds_connector
{
46 struct intel_connector base
;
48 struct notifier_block lid_notifier
;
51 struct intel_lvds_pps
{
62 bool powerdown_on_reset
;
65 struct intel_lvds_encoder
{
66 struct intel_encoder base
;
72 struct intel_lvds_pps init_pps
;
75 struct intel_lvds_connector
*attached_connector
;
78 static struct intel_lvds_encoder
*to_lvds_encoder(struct drm_encoder
*encoder
)
80 return container_of(encoder
, struct intel_lvds_encoder
, base
.base
);
83 static struct intel_lvds_connector
*to_lvds_connector(struct drm_connector
*connector
)
85 return container_of(connector
, struct intel_lvds_connector
, base
.base
);
88 static bool intel_lvds_get_hw_state(struct intel_encoder
*encoder
,
91 struct drm_device
*dev
= encoder
->base
.dev
;
92 struct drm_i915_private
*dev_priv
= to_i915(dev
);
93 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
97 if (!intel_display_power_get_if_enabled(dev_priv
,
98 encoder
->power_domain
))
103 tmp
= I915_READ(lvds_encoder
->reg
);
105 if (!(tmp
& LVDS_PORT_EN
))
108 if (HAS_PCH_CPT(dev_priv
))
109 *pipe
= PORT_TO_PIPE_CPT(tmp
);
111 *pipe
= PORT_TO_PIPE(tmp
);
116 intel_display_power_put(dev_priv
, encoder
->power_domain
);
121 static void intel_lvds_get_config(struct intel_encoder
*encoder
,
122 struct intel_crtc_state
*pipe_config
)
124 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
125 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
128 tmp
= I915_READ(lvds_encoder
->reg
);
129 if (tmp
& LVDS_HSYNC_POLARITY
)
130 flags
|= DRM_MODE_FLAG_NHSYNC
;
132 flags
|= DRM_MODE_FLAG_PHSYNC
;
133 if (tmp
& LVDS_VSYNC_POLARITY
)
134 flags
|= DRM_MODE_FLAG_NVSYNC
;
136 flags
|= DRM_MODE_FLAG_PVSYNC
;
138 pipe_config
->base
.adjusted_mode
.flags
|= flags
;
140 if (INTEL_GEN(dev_priv
) < 5)
141 pipe_config
->gmch_pfit
.lvds_border_bits
=
142 tmp
& LVDS_BORDER_ENABLE
;
144 /* gen2/3 store dither state in pfit control, needs to match */
145 if (INTEL_GEN(dev_priv
) < 4) {
146 tmp
= I915_READ(PFIT_CONTROL
);
148 pipe_config
->gmch_pfit
.control
|= tmp
& PANEL_8TO6_DITHER_ENABLE
;
151 pipe_config
->base
.adjusted_mode
.crtc_clock
= pipe_config
->port_clock
;
154 static void intel_lvds_pps_get_hw_state(struct drm_i915_private
*dev_priv
,
155 struct intel_lvds_pps
*pps
)
159 pps
->powerdown_on_reset
= I915_READ(PP_CONTROL(0)) & PANEL_POWER_RESET
;
161 val
= I915_READ(PP_ON_DELAYS(0));
162 pps
->port
= (val
& PANEL_PORT_SELECT_MASK
) >>
163 PANEL_PORT_SELECT_SHIFT
;
164 pps
->t1_t2
= (val
& PANEL_POWER_UP_DELAY_MASK
) >>
165 PANEL_POWER_UP_DELAY_SHIFT
;
166 pps
->t5
= (val
& PANEL_LIGHT_ON_DELAY_MASK
) >>
167 PANEL_LIGHT_ON_DELAY_SHIFT
;
169 val
= I915_READ(PP_OFF_DELAYS(0));
170 pps
->t3
= (val
& PANEL_POWER_DOWN_DELAY_MASK
) >>
171 PANEL_POWER_DOWN_DELAY_SHIFT
;
172 pps
->tx
= (val
& PANEL_LIGHT_OFF_DELAY_MASK
) >>
173 PANEL_LIGHT_OFF_DELAY_SHIFT
;
175 val
= I915_READ(PP_DIVISOR(0));
176 pps
->divider
= (val
& PP_REFERENCE_DIVIDER_MASK
) >>
177 PP_REFERENCE_DIVIDER_SHIFT
;
178 val
= (val
& PANEL_POWER_CYCLE_DELAY_MASK
) >>
179 PANEL_POWER_CYCLE_DELAY_SHIFT
;
181 * Remove the BSpec specified +1 (100ms) offset that accounts for a
182 * too short power-cycle delay due to the asynchronous programming of
187 /* Convert from 100ms to 100us units */
188 pps
->t4
= val
* 1000;
190 if (INTEL_INFO(dev_priv
)->gen
<= 4 &&
191 pps
->t1_t2
== 0 && pps
->t5
== 0 && pps
->t3
== 0 && pps
->tx
== 0) {
192 DRM_DEBUG_KMS("Panel power timings uninitialized, "
193 "setting defaults\n");
194 /* Set T2 to 40ms and T5 to 200ms in 100 usec units */
195 pps
->t1_t2
= 40 * 10;
197 /* Set T3 to 35ms and Tx to 200ms in 100 usec units */
202 DRM_DEBUG_DRIVER("LVDS PPS:t1+t2 %d t3 %d t4 %d t5 %d tx %d "
203 "divider %d port %d powerdown_on_reset %d\n",
204 pps
->t1_t2
, pps
->t3
, pps
->t4
, pps
->t5
, pps
->tx
,
205 pps
->divider
, pps
->port
, pps
->powerdown_on_reset
);
208 static void intel_lvds_pps_init_hw(struct drm_i915_private
*dev_priv
,
209 struct intel_lvds_pps
*pps
)
213 val
= I915_READ(PP_CONTROL(0));
214 WARN_ON((val
& PANEL_UNLOCK_MASK
) != PANEL_UNLOCK_REGS
);
215 if (pps
->powerdown_on_reset
)
216 val
|= PANEL_POWER_RESET
;
217 I915_WRITE(PP_CONTROL(0), val
);
219 I915_WRITE(PP_ON_DELAYS(0), (pps
->port
<< PANEL_PORT_SELECT_SHIFT
) |
220 (pps
->t1_t2
<< PANEL_POWER_UP_DELAY_SHIFT
) |
221 (pps
->t5
<< PANEL_LIGHT_ON_DELAY_SHIFT
));
222 I915_WRITE(PP_OFF_DELAYS(0), (pps
->t3
<< PANEL_POWER_DOWN_DELAY_SHIFT
) |
223 (pps
->tx
<< PANEL_LIGHT_OFF_DELAY_SHIFT
));
225 val
= pps
->divider
<< PP_REFERENCE_DIVIDER_SHIFT
;
226 val
|= (DIV_ROUND_UP(pps
->t4
, 1000) + 1) <<
227 PANEL_POWER_CYCLE_DELAY_SHIFT
;
228 I915_WRITE(PP_DIVISOR(0), val
);
231 static void intel_pre_enable_lvds(struct intel_encoder
*encoder
,
232 const struct intel_crtc_state
*pipe_config
,
233 const struct drm_connector_state
*conn_state
)
235 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
236 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
237 struct intel_crtc
*crtc
= to_intel_crtc(pipe_config
->base
.crtc
);
238 const struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
239 int pipe
= crtc
->pipe
;
242 if (HAS_PCH_SPLIT(dev_priv
)) {
243 assert_fdi_rx_pll_disabled(dev_priv
, pipe
);
244 assert_shared_dpll_disabled(dev_priv
,
245 pipe_config
->shared_dpll
);
247 assert_pll_disabled(dev_priv
, pipe
);
250 intel_lvds_pps_init_hw(dev_priv
, &lvds_encoder
->init_pps
);
252 temp
= lvds_encoder
->init_lvds_val
;
253 temp
|= LVDS_PORT_EN
| LVDS_A0A2_CLKA_POWER_UP
;
255 if (HAS_PCH_CPT(dev_priv
)) {
256 temp
&= ~PORT_TRANS_SEL_MASK
;
257 temp
|= PORT_TRANS_SEL_CPT(pipe
);
260 temp
|= LVDS_PIPEB_SELECT
;
262 temp
&= ~LVDS_PIPEB_SELECT
;
266 /* set the corresponsding LVDS_BORDER bit */
267 temp
&= ~LVDS_BORDER_ENABLE
;
268 temp
|= pipe_config
->gmch_pfit
.lvds_border_bits
;
269 /* Set the B0-B3 data pairs corresponding to whether we're going to
270 * set the DPLLs for dual-channel mode or not.
272 if (lvds_encoder
->is_dual_link
)
273 temp
|= LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
;
275 temp
&= ~(LVDS_B0B3_POWER_UP
| LVDS_CLKB_POWER_UP
);
277 /* It would be nice to set 24 vs 18-bit mode (LVDS_A3_POWER_UP)
278 * appropriately here, but we need to look more thoroughly into how
279 * panels behave in the two modes. For now, let's just maintain the
280 * value we got from the BIOS.
282 temp
&= ~LVDS_A3_POWER_MASK
;
283 temp
|= lvds_encoder
->a3_power
;
285 /* Set the dithering flag on LVDS as needed, note that there is no
286 * special lvds dither control bit on pch-split platforms, dithering is
287 * only controlled through the PIPECONF reg. */
288 if (IS_GEN4(dev_priv
)) {
289 /* Bspec wording suggests that LVDS port dithering only exists
290 * for 18bpp panels. */
291 if (pipe_config
->dither
&& pipe_config
->pipe_bpp
== 18)
292 temp
|= LVDS_ENABLE_DITHER
;
294 temp
&= ~LVDS_ENABLE_DITHER
;
296 temp
&= ~(LVDS_HSYNC_POLARITY
| LVDS_VSYNC_POLARITY
);
297 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NHSYNC
)
298 temp
|= LVDS_HSYNC_POLARITY
;
299 if (adjusted_mode
->flags
& DRM_MODE_FLAG_NVSYNC
)
300 temp
|= LVDS_VSYNC_POLARITY
;
302 I915_WRITE(lvds_encoder
->reg
, temp
);
306 * Sets the power state for the panel.
308 static void intel_enable_lvds(struct intel_encoder
*encoder
,
309 const struct intel_crtc_state
*pipe_config
,
310 const struct drm_connector_state
*conn_state
)
312 struct drm_device
*dev
= encoder
->base
.dev
;
313 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
314 struct drm_i915_private
*dev_priv
= to_i915(dev
);
316 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) | LVDS_PORT_EN
);
318 I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) | PANEL_POWER_ON
);
319 POSTING_READ(lvds_encoder
->reg
);
320 if (intel_wait_for_register(dev_priv
, PP_STATUS(0), PP_ON
, PP_ON
, 1000))
321 DRM_ERROR("timed out waiting for panel to power on\n");
323 intel_panel_enable_backlight(pipe_config
, conn_state
);
326 static void intel_disable_lvds(struct intel_encoder
*encoder
,
327 const struct intel_crtc_state
*old_crtc_state
,
328 const struct drm_connector_state
*old_conn_state
)
330 struct intel_lvds_encoder
*lvds_encoder
= to_lvds_encoder(&encoder
->base
);
331 struct drm_i915_private
*dev_priv
= to_i915(encoder
->base
.dev
);
333 I915_WRITE(PP_CONTROL(0), I915_READ(PP_CONTROL(0)) & ~PANEL_POWER_ON
);
334 if (intel_wait_for_register(dev_priv
, PP_STATUS(0), PP_ON
, 0, 1000))
335 DRM_ERROR("timed out waiting for panel to power off\n");
337 I915_WRITE(lvds_encoder
->reg
, I915_READ(lvds_encoder
->reg
) & ~LVDS_PORT_EN
);
338 POSTING_READ(lvds_encoder
->reg
);
341 static void gmch_disable_lvds(struct intel_encoder
*encoder
,
342 const struct intel_crtc_state
*old_crtc_state
,
343 const struct drm_connector_state
*old_conn_state
)
346 intel_panel_disable_backlight(old_conn_state
);
348 intel_disable_lvds(encoder
, old_crtc_state
, old_conn_state
);
351 static void pch_disable_lvds(struct intel_encoder
*encoder
,
352 const struct intel_crtc_state
*old_crtc_state
,
353 const struct drm_connector_state
*old_conn_state
)
355 intel_panel_disable_backlight(old_conn_state
);
358 static void pch_post_disable_lvds(struct intel_encoder
*encoder
,
359 const struct intel_crtc_state
*old_crtc_state
,
360 const struct drm_connector_state
*old_conn_state
)
362 intel_disable_lvds(encoder
, old_crtc_state
, old_conn_state
);
365 static enum drm_mode_status
366 intel_lvds_mode_valid(struct drm_connector
*connector
,
367 struct drm_display_mode
*mode
)
369 struct intel_connector
*intel_connector
= to_intel_connector(connector
);
370 struct drm_display_mode
*fixed_mode
= intel_connector
->panel
.fixed_mode
;
371 int max_pixclk
= to_i915(connector
->dev
)->max_dotclk_freq
;
373 if (mode
->hdisplay
> fixed_mode
->hdisplay
)
375 if (mode
->vdisplay
> fixed_mode
->vdisplay
)
377 if (fixed_mode
->clock
> max_pixclk
)
378 return MODE_CLOCK_HIGH
;
383 static bool intel_lvds_compute_config(struct intel_encoder
*intel_encoder
,
384 struct intel_crtc_state
*pipe_config
,
385 struct drm_connector_state
*conn_state
)
387 struct drm_i915_private
*dev_priv
= to_i915(intel_encoder
->base
.dev
);
388 struct intel_lvds_encoder
*lvds_encoder
=
389 to_lvds_encoder(&intel_encoder
->base
);
390 struct intel_connector
*intel_connector
=
391 &lvds_encoder
->attached_connector
->base
;
392 struct drm_display_mode
*adjusted_mode
= &pipe_config
->base
.adjusted_mode
;
393 struct intel_crtc
*intel_crtc
= to_intel_crtc(pipe_config
->base
.crtc
);
394 unsigned int lvds_bpp
;
396 /* Should never happen!! */
397 if (INTEL_GEN(dev_priv
) < 4 && intel_crtc
->pipe
== 0) {
398 DRM_ERROR("Can't support LVDS on pipe A\n");
402 if (lvds_encoder
->a3_power
== LVDS_A3_POWER_UP
)
407 if (lvds_bpp
!= pipe_config
->pipe_bpp
&& !pipe_config
->bw_constrained
) {
408 DRM_DEBUG_KMS("forcing display bpp (was %d) to LVDS (%d)\n",
409 pipe_config
->pipe_bpp
, lvds_bpp
);
410 pipe_config
->pipe_bpp
= lvds_bpp
;
414 * We have timings from the BIOS for the panel, put them in
415 * to the adjusted mode. The CRTC will be set up for this mode,
416 * with the panel scaling set up to source from the H/VDisplay
417 * of the original mode.
419 intel_fixed_panel_mode(intel_connector
->panel
.fixed_mode
,
422 if (HAS_PCH_SPLIT(dev_priv
)) {
423 pipe_config
->has_pch_encoder
= true;
425 intel_pch_panel_fitting(intel_crtc
, pipe_config
,
426 conn_state
->scaling_mode
);
428 intel_gmch_panel_fitting(intel_crtc
, pipe_config
,
429 conn_state
->scaling_mode
);
434 * XXX: It would be nice to support lower refresh rates on the
435 * panels to reduce power consumption, and perhaps match the
436 * user's requested refresh rate.
443 * Detect the LVDS connection.
445 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
446 * connected and closed means disconnected. We also send hotplug events as
447 * needed, using lid status notification from the input layer.
449 static enum drm_connector_status
450 intel_lvds_detect(struct drm_connector
*connector
, bool force
)
452 struct drm_i915_private
*dev_priv
= to_i915(connector
->dev
);
453 enum drm_connector_status status
;
455 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
456 connector
->base
.id
, connector
->name
);
458 status
= intel_panel_detect(dev_priv
);
459 if (status
!= connector_status_unknown
)
462 return connector_status_connected
;
466 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
468 static int intel_lvds_get_modes(struct drm_connector
*connector
)
470 struct intel_lvds_connector
*lvds_connector
= to_lvds_connector(connector
);
471 struct drm_device
*dev
= connector
->dev
;
472 struct drm_display_mode
*mode
;
474 /* use cached edid if we have one */
475 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
476 return drm_add_edid_modes(connector
, lvds_connector
->base
.edid
);
478 mode
= drm_mode_duplicate(dev
, lvds_connector
->base
.panel
.fixed_mode
);
482 drm_mode_probed_add(connector
, mode
);
486 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id
*id
)
488 DRM_INFO("Skipping forced modeset for %s\n", id
->ident
);
492 /* The GPU hangs up on these systems if modeset is performed on LID open */
493 static const struct dmi_system_id intel_no_modeset_on_lid
[] = {
495 .callback
= intel_no_modeset_on_lid_dmi_callback
,
496 .ident
= "Toshiba Tecra A11",
498 DMI_MATCH(DMI_SYS_VENDOR
, "TOSHIBA"),
499 DMI_MATCH(DMI_PRODUCT_NAME
, "TECRA A11"),
503 { } /* terminating entry */
507 * Lid events. Note the use of 'modeset':
508 * - we set it to MODESET_ON_LID_OPEN on lid close,
509 * and set it to MODESET_DONE on open
510 * - we use it as a "only once" bit (ie we ignore
511 * duplicate events where it was already properly set)
512 * - the suspend/resume paths will set it to
513 * MODESET_SUSPENDED and ignore the lid open event,
514 * because they restore the mode ("lid open").
516 static int intel_lid_notify(struct notifier_block
*nb
, unsigned long val
,
519 struct intel_lvds_connector
*lvds_connector
=
520 container_of(nb
, struct intel_lvds_connector
, lid_notifier
);
521 struct drm_connector
*connector
= &lvds_connector
->base
.base
;
522 struct drm_device
*dev
= connector
->dev
;
523 struct drm_i915_private
*dev_priv
= to_i915(dev
);
525 if (dev
->switch_power_state
!= DRM_SWITCH_POWER_ON
)
528 mutex_lock(&dev_priv
->modeset_restore_lock
);
529 if (dev_priv
->modeset_restore
== MODESET_SUSPENDED
)
532 * check and update the status of LVDS connector after receiving
533 * the LID nofication event.
535 connector
->status
= connector
->funcs
->detect(connector
, false);
537 /* Don't force modeset on machines where it causes a GPU lockup */
538 if (dmi_check_system(intel_no_modeset_on_lid
))
540 if (!acpi_lid_open()) {
541 /* do modeset on next lid open event */
542 dev_priv
->modeset_restore
= MODESET_ON_LID_OPEN
;
546 if (dev_priv
->modeset_restore
== MODESET_DONE
)
550 * Some old platform's BIOS love to wreak havoc while the lid is closed.
551 * We try to detect this here and undo any damage. The split for PCH
552 * platforms is rather conservative and a bit arbitrary expect that on
553 * those platforms VGA disabling requires actual legacy VGA I/O access,
554 * and as part of the cleanup in the hw state restore we also redisable
557 if (!HAS_PCH_SPLIT(dev_priv
))
558 intel_display_resume(dev
);
560 dev_priv
->modeset_restore
= MODESET_DONE
;
563 mutex_unlock(&dev_priv
->modeset_restore_lock
);
568 * intel_lvds_destroy - unregister and free LVDS structures
569 * @connector: connector to free
571 * Unregister the DDC bus for this connector then free the driver private
574 static void intel_lvds_destroy(struct drm_connector
*connector
)
576 struct intel_lvds_connector
*lvds_connector
=
577 to_lvds_connector(connector
);
579 if (lvds_connector
->lid_notifier
.notifier_call
)
580 acpi_lid_notifier_unregister(&lvds_connector
->lid_notifier
);
582 if (!IS_ERR_OR_NULL(lvds_connector
->base
.edid
))
583 kfree(lvds_connector
->base
.edid
);
585 intel_panel_fini(&lvds_connector
->base
.panel
);
587 drm_connector_cleanup(connector
);
591 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs
= {
592 .get_modes
= intel_lvds_get_modes
,
593 .mode_valid
= intel_lvds_mode_valid
,
594 .atomic_check
= intel_digital_connector_atomic_check
,
597 static const struct drm_connector_funcs intel_lvds_connector_funcs
= {
598 .detect
= intel_lvds_detect
,
599 .fill_modes
= drm_helper_probe_single_connector_modes
,
600 .atomic_get_property
= intel_digital_connector_atomic_get_property
,
601 .atomic_set_property
= intel_digital_connector_atomic_set_property
,
602 .late_register
= intel_connector_register
,
603 .early_unregister
= intel_connector_unregister
,
604 .destroy
= intel_lvds_destroy
,
605 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
606 .atomic_duplicate_state
= intel_digital_connector_duplicate_state
,
609 static const struct drm_encoder_funcs intel_lvds_enc_funcs
= {
610 .destroy
= intel_encoder_destroy
,
613 static int intel_no_lvds_dmi_callback(const struct dmi_system_id
*id
)
615 DRM_INFO("Skipping LVDS initialization for %s\n", id
->ident
);
619 /* These systems claim to have LVDS, but really don't */
620 static const struct dmi_system_id intel_no_lvds
[] = {
622 .callback
= intel_no_lvds_dmi_callback
,
623 .ident
= "Apple Mac Mini (Core series)",
625 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
626 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini1,1"),
630 .callback
= intel_no_lvds_dmi_callback
,
631 .ident
= "Apple Mac Mini (Core 2 series)",
633 DMI_MATCH(DMI_SYS_VENDOR
, "Apple"),
634 DMI_MATCH(DMI_PRODUCT_NAME
, "Macmini2,1"),
638 .callback
= intel_no_lvds_dmi_callback
,
639 .ident
= "MSI IM-945GSE-A",
641 DMI_MATCH(DMI_SYS_VENDOR
, "MSI"),
642 DMI_MATCH(DMI_PRODUCT_NAME
, "A9830IMS"),
646 .callback
= intel_no_lvds_dmi_callback
,
647 .ident
= "Dell Studio Hybrid",
649 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
650 DMI_MATCH(DMI_PRODUCT_NAME
, "Studio Hybrid 140g"),
654 .callback
= intel_no_lvds_dmi_callback
,
655 .ident
= "Dell OptiPlex FX170",
657 DMI_MATCH(DMI_SYS_VENDOR
, "Dell Inc."),
658 DMI_MATCH(DMI_PRODUCT_NAME
, "OptiPlex FX170"),
662 .callback
= intel_no_lvds_dmi_callback
,
663 .ident
= "AOpen Mini PC",
665 DMI_MATCH(DMI_SYS_VENDOR
, "AOpen"),
666 DMI_MATCH(DMI_PRODUCT_NAME
, "i965GMx-IF"),
670 .callback
= intel_no_lvds_dmi_callback
,
671 .ident
= "AOpen Mini PC MP915",
673 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
674 DMI_MATCH(DMI_BOARD_NAME
, "i915GMx-F"),
678 .callback
= intel_no_lvds_dmi_callback
,
679 .ident
= "AOpen i915GMm-HFS",
681 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
682 DMI_MATCH(DMI_BOARD_NAME
, "i915GMm-HFS"),
686 .callback
= intel_no_lvds_dmi_callback
,
687 .ident
= "AOpen i45GMx-I",
689 DMI_MATCH(DMI_BOARD_VENDOR
, "AOpen"),
690 DMI_MATCH(DMI_BOARD_NAME
, "i45GMx-I"),
694 .callback
= intel_no_lvds_dmi_callback
,
695 .ident
= "Aopen i945GTt-VFA",
697 DMI_MATCH(DMI_PRODUCT_VERSION
, "AO00001JW"),
701 .callback
= intel_no_lvds_dmi_callback
,
702 .ident
= "Clientron U800",
704 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
705 DMI_MATCH(DMI_PRODUCT_NAME
, "U800"),
709 .callback
= intel_no_lvds_dmi_callback
,
710 .ident
= "Clientron E830",
712 DMI_MATCH(DMI_SYS_VENDOR
, "Clientron"),
713 DMI_MATCH(DMI_PRODUCT_NAME
, "E830"),
717 .callback
= intel_no_lvds_dmi_callback
,
718 .ident
= "Asus EeeBox PC EB1007",
720 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer INC."),
721 DMI_MATCH(DMI_PRODUCT_NAME
, "EB1007"),
725 .callback
= intel_no_lvds_dmi_callback
,
726 .ident
= "Asus AT5NM10T-I",
728 DMI_MATCH(DMI_BOARD_VENDOR
, "ASUSTeK Computer INC."),
729 DMI_MATCH(DMI_BOARD_NAME
, "AT5NM10T-I"),
733 .callback
= intel_no_lvds_dmi_callback
,
734 .ident
= "Hewlett-Packard HP t5740",
736 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
737 DMI_MATCH(DMI_PRODUCT_NAME
, " t5740"),
741 .callback
= intel_no_lvds_dmi_callback
,
742 .ident
= "Hewlett-Packard t5745",
744 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
745 DMI_MATCH(DMI_PRODUCT_NAME
, "hp t5745"),
749 .callback
= intel_no_lvds_dmi_callback
,
750 .ident
= "Hewlett-Packard st5747",
752 DMI_MATCH(DMI_BOARD_VENDOR
, "Hewlett-Packard"),
753 DMI_MATCH(DMI_PRODUCT_NAME
, "hp st5747"),
757 .callback
= intel_no_lvds_dmi_callback
,
758 .ident
= "MSI Wind Box DC500",
760 DMI_MATCH(DMI_BOARD_VENDOR
, "MICRO-STAR INTERNATIONAL CO., LTD"),
761 DMI_MATCH(DMI_BOARD_NAME
, "MS-7469"),
765 .callback
= intel_no_lvds_dmi_callback
,
766 .ident
= "Gigabyte GA-D525TUD",
768 DMI_MATCH(DMI_BOARD_VENDOR
, "Gigabyte Technology Co., Ltd."),
769 DMI_MATCH(DMI_BOARD_NAME
, "D525TUD"),
773 .callback
= intel_no_lvds_dmi_callback
,
774 .ident
= "Supermicro X7SPA-H",
776 DMI_MATCH(DMI_SYS_VENDOR
, "Supermicro"),
777 DMI_MATCH(DMI_PRODUCT_NAME
, "X7SPA-H"),
781 .callback
= intel_no_lvds_dmi_callback
,
782 .ident
= "Fujitsu Esprimo Q900",
784 DMI_MATCH(DMI_SYS_VENDOR
, "FUJITSU"),
785 DMI_MATCH(DMI_PRODUCT_NAME
, "ESPRIMO Q900"),
789 .callback
= intel_no_lvds_dmi_callback
,
790 .ident
= "Intel D410PT",
792 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
793 DMI_MATCH(DMI_BOARD_NAME
, "D410PT"),
797 .callback
= intel_no_lvds_dmi_callback
,
798 .ident
= "Intel D425KT",
800 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
801 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D425KT"),
805 .callback
= intel_no_lvds_dmi_callback
,
806 .ident
= "Intel D510MO",
808 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
809 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D510MO"),
813 .callback
= intel_no_lvds_dmi_callback
,
814 .ident
= "Intel D525MW",
816 DMI_MATCH(DMI_BOARD_VENDOR
, "Intel"),
817 DMI_EXACT_MATCH(DMI_BOARD_NAME
, "D525MW"),
821 { } /* terminating entry */
824 static int intel_dual_link_lvds_callback(const struct dmi_system_id
*id
)
826 DRM_INFO("Forcing lvds to dual link mode on %s\n", id
->ident
);
830 static const struct dmi_system_id intel_dual_link_lvds
[] = {
832 .callback
= intel_dual_link_lvds_callback
,
833 .ident
= "Apple MacBook Pro 15\" (2010)",
835 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
836 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro6,2"),
840 .callback
= intel_dual_link_lvds_callback
,
841 .ident
= "Apple MacBook Pro 15\" (2011)",
843 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
844 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro8,2"),
848 .callback
= intel_dual_link_lvds_callback
,
849 .ident
= "Apple MacBook Pro 15\" (2012)",
851 DMI_MATCH(DMI_SYS_VENDOR
, "Apple Inc."),
852 DMI_MATCH(DMI_PRODUCT_NAME
, "MacBookPro9,1"),
855 { } /* terminating entry */
858 struct intel_encoder
*intel_get_lvds_encoder(struct drm_device
*dev
)
860 struct intel_encoder
*intel_encoder
;
862 for_each_intel_encoder(dev
, intel_encoder
)
863 if (intel_encoder
->type
== INTEL_OUTPUT_LVDS
)
864 return intel_encoder
;
869 bool intel_is_dual_link_lvds(struct drm_device
*dev
)
871 struct intel_encoder
*encoder
= intel_get_lvds_encoder(dev
);
873 return encoder
&& to_lvds_encoder(&encoder
->base
)->is_dual_link
;
876 static bool compute_is_dual_link_lvds(struct intel_lvds_encoder
*lvds_encoder
)
878 struct drm_device
*dev
= lvds_encoder
->base
.base
.dev
;
880 struct drm_i915_private
*dev_priv
= to_i915(dev
);
882 /* use the module option value if specified */
883 if (i915_modparams
.lvds_channel_mode
> 0)
884 return i915_modparams
.lvds_channel_mode
== 2;
886 /* single channel LVDS is limited to 112 MHz */
887 if (lvds_encoder
->attached_connector
->base
.panel
.fixed_mode
->clock
891 if (dmi_check_system(intel_dual_link_lvds
))
894 /* BIOS should set the proper LVDS register value at boot, but
895 * in reality, it doesn't set the value when the lid is closed;
896 * we need to check "the value to be set" in VBT when LVDS
897 * register is uninitialized.
899 val
= I915_READ(lvds_encoder
->reg
);
900 if (!(val
& ~(LVDS_PIPE_MASK
| LVDS_DETECTED
)))
901 val
= dev_priv
->vbt
.bios_lvds_val
;
903 return (val
& LVDS_CLKB_POWER_MASK
) == LVDS_CLKB_POWER_UP
;
906 static bool intel_lvds_supported(struct drm_i915_private
*dev_priv
)
908 /* With the introduction of the PCH we gained a dedicated
909 * LVDS presence pin, use it. */
910 if (HAS_PCH_IBX(dev_priv
) || HAS_PCH_CPT(dev_priv
))
913 /* Otherwise LVDS was only attached to mobile products,
914 * except for the inglorious 830gm */
915 if (INTEL_GEN(dev_priv
) <= 4 &&
916 IS_MOBILE(dev_priv
) && !IS_I830(dev_priv
))
923 * intel_lvds_init - setup LVDS connectors on this device
926 * Create the connector, register the LVDS DDC bus, and try to figure out what
927 * modes we can display on the LVDS panel (if present).
929 void intel_lvds_init(struct drm_i915_private
*dev_priv
)
931 struct drm_device
*dev
= &dev_priv
->drm
;
932 struct intel_lvds_encoder
*lvds_encoder
;
933 struct intel_encoder
*intel_encoder
;
934 struct intel_lvds_connector
*lvds_connector
;
935 struct intel_connector
*intel_connector
;
936 struct drm_connector
*connector
;
937 struct drm_encoder
*encoder
;
938 struct drm_display_mode
*scan
; /* *modes, *bios_mode; */
939 struct drm_display_mode
*fixed_mode
= NULL
;
940 struct drm_display_mode
*downclock_mode
= NULL
;
947 if (!intel_lvds_supported(dev_priv
))
950 /* Skip init on machines we know falsely report LVDS */
951 if (dmi_check_system(intel_no_lvds
))
954 if (HAS_PCH_SPLIT(dev_priv
))
959 lvds
= I915_READ(lvds_reg
);
961 if (HAS_PCH_SPLIT(dev_priv
)) {
962 if ((lvds
& LVDS_DETECTED
) == 0)
964 if (dev_priv
->vbt
.edp
.support
) {
965 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
970 pin
= GMBUS_PIN_PANEL
;
971 if (!intel_bios_is_lvds_present(dev_priv
, &pin
)) {
972 if ((lvds
& LVDS_PORT_EN
) == 0) {
973 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
976 DRM_DEBUG_KMS("LVDS is not present in VBT, but enabled anyway\n");
979 lvds_encoder
= kzalloc(sizeof(*lvds_encoder
), GFP_KERNEL
);
983 lvds_connector
= kzalloc(sizeof(*lvds_connector
), GFP_KERNEL
);
984 if (!lvds_connector
) {
989 if (intel_connector_init(&lvds_connector
->base
) < 0) {
990 kfree(lvds_connector
);
995 lvds_encoder
->attached_connector
= lvds_connector
;
997 intel_encoder
= &lvds_encoder
->base
;
998 encoder
= &intel_encoder
->base
;
999 intel_connector
= &lvds_connector
->base
;
1000 connector
= &intel_connector
->base
;
1001 drm_connector_init(dev
, &intel_connector
->base
, &intel_lvds_connector_funcs
,
1002 DRM_MODE_CONNECTOR_LVDS
);
1004 drm_encoder_init(dev
, &intel_encoder
->base
, &intel_lvds_enc_funcs
,
1005 DRM_MODE_ENCODER_LVDS
, "LVDS");
1007 intel_encoder
->enable
= intel_enable_lvds
;
1008 intel_encoder
->pre_enable
= intel_pre_enable_lvds
;
1009 intel_encoder
->compute_config
= intel_lvds_compute_config
;
1010 if (HAS_PCH_SPLIT(dev_priv
)) {
1011 intel_encoder
->disable
= pch_disable_lvds
;
1012 intel_encoder
->post_disable
= pch_post_disable_lvds
;
1014 intel_encoder
->disable
= gmch_disable_lvds
;
1016 intel_encoder
->get_hw_state
= intel_lvds_get_hw_state
;
1017 intel_encoder
->get_config
= intel_lvds_get_config
;
1018 intel_connector
->get_hw_state
= intel_connector_get_hw_state
;
1020 intel_connector_attach_encoder(intel_connector
, intel_encoder
);
1022 intel_encoder
->type
= INTEL_OUTPUT_LVDS
;
1023 intel_encoder
->power_domain
= POWER_DOMAIN_PORT_OTHER
;
1024 intel_encoder
->port
= PORT_NONE
;
1025 intel_encoder
->cloneable
= 0;
1026 if (HAS_PCH_SPLIT(dev_priv
))
1027 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1) | (1 << 2);
1028 else if (IS_GEN4(dev_priv
))
1029 intel_encoder
->crtc_mask
= (1 << 0) | (1 << 1);
1031 intel_encoder
->crtc_mask
= (1 << 1);
1033 drm_connector_helper_add(connector
, &intel_lvds_connector_helper_funcs
);
1034 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
1035 connector
->interlace_allowed
= false;
1036 connector
->doublescan_allowed
= false;
1038 lvds_encoder
->reg
= lvds_reg
;
1040 /* create the scaling mode property */
1041 allowed_scalers
= BIT(DRM_MODE_SCALE_ASPECT
);
1042 allowed_scalers
|= BIT(DRM_MODE_SCALE_FULLSCREEN
);
1043 allowed_scalers
|= BIT(DRM_MODE_SCALE_CENTER
);
1044 drm_connector_attach_scaling_mode_property(connector
, allowed_scalers
);
1045 connector
->state
->scaling_mode
= DRM_MODE_SCALE_ASPECT
;
1047 intel_lvds_pps_get_hw_state(dev_priv
, &lvds_encoder
->init_pps
);
1048 lvds_encoder
->init_lvds_val
= lvds
;
1052 * 1) check for EDID on DDC
1053 * 2) check for VBT data
1054 * 3) check to see if LVDS is already on
1055 * if none of the above, no panel
1056 * 4) make sure lid is open
1057 * if closed, act like it's not there for now
1061 * Attempt to get the fixed panel mode from DDC. Assume that the
1062 * preferred mode is the right one.
1064 mutex_lock(&dev
->mode_config
.mutex
);
1065 if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC
)
1066 edid
= drm_get_edid_switcheroo(connector
,
1067 intel_gmbus_get_adapter(dev_priv
, pin
));
1069 edid
= drm_get_edid(connector
,
1070 intel_gmbus_get_adapter(dev_priv
, pin
));
1072 if (drm_add_edid_modes(connector
, edid
)) {
1073 drm_mode_connector_update_edid_property(connector
,
1077 edid
= ERR_PTR(-EINVAL
);
1080 edid
= ERR_PTR(-ENOENT
);
1082 lvds_connector
->base
.edid
= edid
;
1084 list_for_each_entry(scan
, &connector
->probed_modes
, head
) {
1085 if (scan
->type
& DRM_MODE_TYPE_PREFERRED
) {
1086 DRM_DEBUG_KMS("using preferred mode from EDID: ");
1087 drm_mode_debug_printmodeline(scan
);
1089 fixed_mode
= drm_mode_duplicate(dev
, scan
);
1095 /* Failed to get EDID, what about VBT? */
1096 if (dev_priv
->vbt
.lfp_lvds_vbt_mode
) {
1097 DRM_DEBUG_KMS("using mode from VBT: ");
1098 drm_mode_debug_printmodeline(dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1100 fixed_mode
= drm_mode_duplicate(dev
, dev_priv
->vbt
.lfp_lvds_vbt_mode
);
1102 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1103 connector
->display_info
.width_mm
= fixed_mode
->width_mm
;
1104 connector
->display_info
.height_mm
= fixed_mode
->height_mm
;
1110 * If we didn't get EDID, try checking if the panel is already turned
1111 * on. If so, assume that whatever is currently programmed is the
1114 fixed_mode
= intel_encoder_current_mode(intel_encoder
);
1116 DRM_DEBUG_KMS("using current (BIOS) mode: ");
1117 drm_mode_debug_printmodeline(fixed_mode
);
1118 fixed_mode
->type
|= DRM_MODE_TYPE_PREFERRED
;
1121 /* If we still don't have a mode after all that, give up. */
1126 mutex_unlock(&dev
->mode_config
.mutex
);
1128 intel_panel_init(&intel_connector
->panel
, fixed_mode
, NULL
,
1130 intel_panel_setup_backlight(connector
, INVALID_PIPE
);
1132 lvds_encoder
->is_dual_link
= compute_is_dual_link_lvds(lvds_encoder
);
1133 DRM_DEBUG_KMS("detected %s-link lvds configuration\n",
1134 lvds_encoder
->is_dual_link
? "dual" : "single");
1136 lvds_encoder
->a3_power
= lvds
& LVDS_A3_POWER_MASK
;
1138 lvds_connector
->lid_notifier
.notifier_call
= intel_lid_notify
;
1139 if (acpi_lid_notifier_register(&lvds_connector
->lid_notifier
)) {
1140 DRM_DEBUG_KMS("lid notifier registration failed\n");
1141 lvds_connector
->lid_notifier
.notifier_call
= NULL
;
1147 mutex_unlock(&dev
->mode_config
.mutex
);
1149 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1150 drm_connector_cleanup(connector
);
1151 drm_encoder_cleanup(encoder
);
1152 kfree(lvds_encoder
);
1153 kfree(lvds_connector
);