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[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include <drm/drmP.h>
33 #include <drm/drm_crtc.h>
34 #include <drm/drm_edid.h>
35 #include "intel_drv.h"
36 #include <drm/i915_drm.h>
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
53
54
55 static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63 };
64
65 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67 struct intel_sdvo {
68 struct intel_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 uint32_t sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /*
97 * Hotplug activation bits for this device
98 */
99 uint16_t hotplug_active;
100
101 /**
102 * This is used to select the color range of RBG outputs in HDMI mode.
103 * It is only valid when using TMDS encoding and 8 bit per color mode.
104 */
105 uint32_t color_range;
106
107 /**
108 * This is set if we're going to treat the device as TV-out.
109 *
110 * While we have these nice friendly flags for output types that ought
111 * to decide this for us, the S-Video output on our HDMI+S-Video card
112 * shows up as RGB1 (VGA).
113 */
114 bool is_tv;
115
116 /* On different gens SDVOB is at different places. */
117 bool is_sdvob;
118
119 /* This is for current tv format name */
120 int tv_format_index;
121
122 /**
123 * This is set if we treat the device as HDMI, instead of DVI.
124 */
125 bool is_hdmi;
126 bool has_hdmi_monitor;
127 bool has_hdmi_audio;
128
129 /**
130 * This is set if we detect output of sdvo device as LVDS and
131 * have a valid fixed mode to use with the panel.
132 */
133 bool is_lvds;
134
135 /**
136 * This is sdvo fixed pannel mode pointer
137 */
138 struct drm_display_mode *sdvo_lvds_fixed_mode;
139
140 /* DDC bus used by this SDVO encoder */
141 uint8_t ddc_bus;
142
143 /*
144 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
145 */
146 uint8_t dtd_sdvo_flags;
147 };
148
149 struct intel_sdvo_connector {
150 struct intel_connector base;
151
152 /* Mark the type of connector */
153 uint16_t output_flag;
154
155 enum hdmi_force_audio force_audio;
156
157 /* This contains all current supported TV format */
158 u8 tv_format_supported[TV_FORMAT_NUM];
159 int format_supported_num;
160 struct drm_property *tv_format;
161
162 /* add the property for the SDVO-TV */
163 struct drm_property *left;
164 struct drm_property *right;
165 struct drm_property *top;
166 struct drm_property *bottom;
167 struct drm_property *hpos;
168 struct drm_property *vpos;
169 struct drm_property *contrast;
170 struct drm_property *saturation;
171 struct drm_property *hue;
172 struct drm_property *sharpness;
173 struct drm_property *flicker_filter;
174 struct drm_property *flicker_filter_adaptive;
175 struct drm_property *flicker_filter_2d;
176 struct drm_property *tv_chroma_filter;
177 struct drm_property *tv_luma_filter;
178 struct drm_property *dot_crawl;
179
180 /* add the property for the SDVO-TV/LVDS */
181 struct drm_property *brightness;
182
183 /* Add variable to record current setting for the above property */
184 u32 left_margin, right_margin, top_margin, bottom_margin;
185
186 /* this is to get the range of margin.*/
187 u32 max_hscan, max_vscan;
188 u32 max_hpos, cur_hpos;
189 u32 max_vpos, cur_vpos;
190 u32 cur_brightness, max_brightness;
191 u32 cur_contrast, max_contrast;
192 u32 cur_saturation, max_saturation;
193 u32 cur_hue, max_hue;
194 u32 cur_sharpness, max_sharpness;
195 u32 cur_flicker_filter, max_flicker_filter;
196 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
197 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
198 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
199 u32 cur_tv_luma_filter, max_tv_luma_filter;
200 u32 cur_dot_crawl, max_dot_crawl;
201 };
202
203 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
204 {
205 return container_of(encoder, struct intel_sdvo, base.base);
206 }
207
208 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
209 {
210 return container_of(intel_attached_encoder(connector),
211 struct intel_sdvo, base);
212 }
213
214 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
215 {
216 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
217 }
218
219 static bool
220 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
221 static bool
222 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
223 struct intel_sdvo_connector *intel_sdvo_connector,
224 int type);
225 static bool
226 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
227 struct intel_sdvo_connector *intel_sdvo_connector);
228
229 /**
230 * Writes the SDVOB or SDVOC with the given value, but always writes both
231 * SDVOB and SDVOC to work around apparent hardware issues (according to
232 * comments in the BIOS).
233 */
234 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
235 {
236 struct drm_device *dev = intel_sdvo->base.base.dev;
237 struct drm_i915_private *dev_priv = dev->dev_private;
238 u32 bval = val, cval = val;
239 int i;
240
241 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
242 I915_WRITE(intel_sdvo->sdvo_reg, val);
243 I915_READ(intel_sdvo->sdvo_reg);
244 return;
245 }
246
247 if (intel_sdvo->sdvo_reg == SDVOB) {
248 cval = I915_READ(SDVOC);
249 } else {
250 bval = I915_READ(SDVOB);
251 }
252 /*
253 * Write the registers twice for luck. Sometimes,
254 * writing them only once doesn't appear to 'stick'.
255 * The BIOS does this too. Yay, magic
256 */
257 for (i = 0; i < 2; i++)
258 {
259 I915_WRITE(SDVOB, bval);
260 I915_READ(SDVOB);
261 I915_WRITE(SDVOC, cval);
262 I915_READ(SDVOC);
263 }
264 }
265
266 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 {
268 struct i2c_msg msgs[] = {
269 {
270 .addr = intel_sdvo->slave_addr,
271 .flags = 0,
272 .len = 1,
273 .buf = &addr,
274 },
275 {
276 .addr = intel_sdvo->slave_addr,
277 .flags = I2C_M_RD,
278 .len = 1,
279 .buf = ch,
280 }
281 };
282 int ret;
283
284 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
285 return true;
286
287 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
288 return false;
289 }
290
291 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
292 /** Mapping of command numbers to names, for debug output */
293 static const struct _sdvo_cmd_name {
294 u8 cmd;
295 const char *name;
296 } sdvo_cmd_names[] = {
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340
341 /* Add the op code for SDVO enhancements */
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
386
387 /* HDMI op code */
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
407 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
408 };
409
410 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
411
412 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
413 const void *args, int args_len)
414 {
415 int i;
416
417 DRM_DEBUG_KMS("%s: W: %02X ",
418 SDVO_NAME(intel_sdvo), cmd);
419 for (i = 0; i < args_len; i++)
420 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
421 for (; i < 8; i++)
422 DRM_LOG_KMS(" ");
423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
424 if (cmd == sdvo_cmd_names[i].cmd) {
425 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
426 break;
427 }
428 }
429 if (i == ARRAY_SIZE(sdvo_cmd_names))
430 DRM_LOG_KMS("(%02X)", cmd);
431 DRM_LOG_KMS("\n");
432 }
433
434 static const char *cmd_status_names[] = {
435 "Power on",
436 "Success",
437 "Not supported",
438 "Invalid arg",
439 "Pending",
440 "Target not specified",
441 "Scaling not supported"
442 };
443
444 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
445 const void *args, int args_len)
446 {
447 u8 *buf, status;
448 struct i2c_msg *msgs;
449 int i, ret = true;
450
451 /* Would be simpler to allocate both in one go ? */
452 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
453 if (!buf)
454 return false;
455
456 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
457 if (!msgs) {
458 kfree(buf);
459 return false;
460 }
461
462 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
463
464 for (i = 0; i < args_len; i++) {
465 msgs[i].addr = intel_sdvo->slave_addr;
466 msgs[i].flags = 0;
467 msgs[i].len = 2;
468 msgs[i].buf = buf + 2 *i;
469 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
470 buf[2*i + 1] = ((u8*)args)[i];
471 }
472 msgs[i].addr = intel_sdvo->slave_addr;
473 msgs[i].flags = 0;
474 msgs[i].len = 2;
475 msgs[i].buf = buf + 2*i;
476 buf[2*i + 0] = SDVO_I2C_OPCODE;
477 buf[2*i + 1] = cmd;
478
479 /* the following two are to read the response */
480 status = SDVO_I2C_CMD_STATUS;
481 msgs[i+1].addr = intel_sdvo->slave_addr;
482 msgs[i+1].flags = 0;
483 msgs[i+1].len = 1;
484 msgs[i+1].buf = &status;
485
486 msgs[i+2].addr = intel_sdvo->slave_addr;
487 msgs[i+2].flags = I2C_M_RD;
488 msgs[i+2].len = 1;
489 msgs[i+2].buf = &status;
490
491 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
492 if (ret < 0) {
493 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
494 ret = false;
495 goto out;
496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
500 ret = false;
501 }
502
503 out:
504 kfree(msgs);
505 kfree(buf);
506 return ret;
507 }
508
509 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
510 void *response, int response_len)
511 {
512 u8 retry = 5;
513 u8 status;
514 int i;
515
516 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
517
518 /*
519 * The documentation states that all commands will be
520 * processed within 15µs, and that we need only poll
521 * the status byte a maximum of 3 times in order for the
522 * command to be complete.
523 *
524 * Check 5 times in case the hardware failed to read the docs.
525 */
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_CMD_STATUS,
528 &status))
529 goto log_fail;
530
531 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
532 udelay(15);
533 if (!intel_sdvo_read_byte(intel_sdvo,
534 SDVO_I2C_CMD_STATUS,
535 &status))
536 goto log_fail;
537 }
538
539 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
540 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
541 else
542 DRM_LOG_KMS("(??? %d)", status);
543
544 if (status != SDVO_CMD_STATUS_SUCCESS)
545 goto log_fail;
546
547 /* Read the command response */
548 for (i = 0; i < response_len; i++) {
549 if (!intel_sdvo_read_byte(intel_sdvo,
550 SDVO_I2C_RETURN_0 + i,
551 &((u8 *)response)[i]))
552 goto log_fail;
553 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
554 }
555 DRM_LOG_KMS("\n");
556 return true;
557
558 log_fail:
559 DRM_LOG_KMS("... failed\n");
560 return false;
561 }
562
563 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
564 {
565 if (mode->clock >= 100000)
566 return 1;
567 else if (mode->clock >= 50000)
568 return 2;
569 else
570 return 4;
571 }
572
573 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
574 u8 ddc_bus)
575 {
576 /* This must be the immediately preceding write before the i2c xfer */
577 return intel_sdvo_write_cmd(intel_sdvo,
578 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
579 &ddc_bus, 1);
580 }
581
582 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
583 {
584 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
585 return false;
586
587 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
588 }
589
590 static bool
591 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
592 {
593 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
594 return false;
595
596 return intel_sdvo_read_response(intel_sdvo, value, len);
597 }
598
599 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
600 {
601 struct intel_sdvo_set_target_input_args targets = {0};
602 return intel_sdvo_set_value(intel_sdvo,
603 SDVO_CMD_SET_TARGET_INPUT,
604 &targets, sizeof(targets));
605 }
606
607 /**
608 * Return whether each input is trained.
609 *
610 * This function is making an assumption about the layout of the response,
611 * which should be checked against the docs.
612 */
613 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
614 {
615 struct intel_sdvo_get_trained_inputs_response response;
616
617 BUILD_BUG_ON(sizeof(response) != 1);
618 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
619 &response, sizeof(response)))
620 return false;
621
622 *input_1 = response.input0_trained;
623 *input_2 = response.input1_trained;
624 return true;
625 }
626
627 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
628 u16 outputs)
629 {
630 return intel_sdvo_set_value(intel_sdvo,
631 SDVO_CMD_SET_ACTIVE_OUTPUTS,
632 &outputs, sizeof(outputs));
633 }
634
635 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
636 u16 *outputs)
637 {
638 return intel_sdvo_get_value(intel_sdvo,
639 SDVO_CMD_GET_ACTIVE_OUTPUTS,
640 outputs, sizeof(*outputs));
641 }
642
643 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
644 int mode)
645 {
646 u8 state = SDVO_ENCODER_STATE_ON;
647
648 switch (mode) {
649 case DRM_MODE_DPMS_ON:
650 state = SDVO_ENCODER_STATE_ON;
651 break;
652 case DRM_MODE_DPMS_STANDBY:
653 state = SDVO_ENCODER_STATE_STANDBY;
654 break;
655 case DRM_MODE_DPMS_SUSPEND:
656 state = SDVO_ENCODER_STATE_SUSPEND;
657 break;
658 case DRM_MODE_DPMS_OFF:
659 state = SDVO_ENCODER_STATE_OFF;
660 break;
661 }
662
663 return intel_sdvo_set_value(intel_sdvo,
664 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
665 }
666
667 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
668 int *clock_min,
669 int *clock_max)
670 {
671 struct intel_sdvo_pixel_clock_range clocks;
672
673 BUILD_BUG_ON(sizeof(clocks) != 4);
674 if (!intel_sdvo_get_value(intel_sdvo,
675 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
676 &clocks, sizeof(clocks)))
677 return false;
678
679 /* Convert the values from units of 10 kHz to kHz. */
680 *clock_min = clocks.min * 10;
681 *clock_max = clocks.max * 10;
682 return true;
683 }
684
685 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
686 u16 outputs)
687 {
688 return intel_sdvo_set_value(intel_sdvo,
689 SDVO_CMD_SET_TARGET_OUTPUT,
690 &outputs, sizeof(outputs));
691 }
692
693 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
694 struct intel_sdvo_dtd *dtd)
695 {
696 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
697 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
698 }
699
700 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
701 struct intel_sdvo_dtd *dtd)
702 {
703 return intel_sdvo_set_timing(intel_sdvo,
704 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
705 }
706
707 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
708 struct intel_sdvo_dtd *dtd)
709 {
710 return intel_sdvo_set_timing(intel_sdvo,
711 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
712 }
713
714 static bool
715 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
716 uint16_t clock,
717 uint16_t width,
718 uint16_t height)
719 {
720 struct intel_sdvo_preferred_input_timing_args args;
721
722 memset(&args, 0, sizeof(args));
723 args.clock = clock;
724 args.width = width;
725 args.height = height;
726 args.interlace = 0;
727
728 if (intel_sdvo->is_lvds &&
729 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
730 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
731 args.scaled = 1;
732
733 return intel_sdvo_set_value(intel_sdvo,
734 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
735 &args, sizeof(args));
736 }
737
738 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
739 struct intel_sdvo_dtd *dtd)
740 {
741 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
742 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
743 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
744 &dtd->part1, sizeof(dtd->part1)) &&
745 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
746 &dtd->part2, sizeof(dtd->part2));
747 }
748
749 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
750 {
751 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
752 }
753
754 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
755 const struct drm_display_mode *mode)
756 {
757 uint16_t width, height;
758 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
759 uint16_t h_sync_offset, v_sync_offset;
760 int mode_clock;
761
762 width = mode->hdisplay;
763 height = mode->vdisplay;
764
765 /* do some mode translations */
766 h_blank_len = mode->htotal - mode->hdisplay;
767 h_sync_len = mode->hsync_end - mode->hsync_start;
768
769 v_blank_len = mode->vtotal - mode->vdisplay;
770 v_sync_len = mode->vsync_end - mode->vsync_start;
771
772 h_sync_offset = mode->hsync_start - mode->hdisplay;
773 v_sync_offset = mode->vsync_start - mode->vdisplay;
774
775 mode_clock = mode->clock;
776 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
777 mode_clock /= 10;
778 dtd->part1.clock = mode_clock;
779
780 dtd->part1.h_active = width & 0xff;
781 dtd->part1.h_blank = h_blank_len & 0xff;
782 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
783 ((h_blank_len >> 8) & 0xf);
784 dtd->part1.v_active = height & 0xff;
785 dtd->part1.v_blank = v_blank_len & 0xff;
786 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
787 ((v_blank_len >> 8) & 0xf);
788
789 dtd->part2.h_sync_off = h_sync_offset & 0xff;
790 dtd->part2.h_sync_width = h_sync_len & 0xff;
791 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
792 (v_sync_len & 0xf);
793 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
794 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
795 ((v_sync_len & 0x30) >> 4);
796
797 dtd->part2.dtd_flags = 0x18;
798 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
799 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
800 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
801 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
802 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
803 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
804
805 dtd->part2.sdvo_flags = 0;
806 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
807 dtd->part2.reserved = 0;
808 }
809
810 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
811 const struct intel_sdvo_dtd *dtd)
812 {
813 mode->hdisplay = dtd->part1.h_active;
814 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
815 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
816 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
817 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
818 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
819 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
820 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
821
822 mode->vdisplay = dtd->part1.v_active;
823 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
824 mode->vsync_start = mode->vdisplay;
825 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
826 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
827 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
828 mode->vsync_end = mode->vsync_start +
829 (dtd->part2.v_sync_off_width & 0xf);
830 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
831 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
832 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
833
834 mode->clock = dtd->part1.clock * 10;
835
836 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
837 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
838 mode->flags |= DRM_MODE_FLAG_INTERLACE;
839 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
840 mode->flags |= DRM_MODE_FLAG_PHSYNC;
841 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
842 mode->flags |= DRM_MODE_FLAG_PVSYNC;
843 }
844
845 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
846 {
847 struct intel_sdvo_encode encode;
848
849 BUILD_BUG_ON(sizeof(encode) != 2);
850 return intel_sdvo_get_value(intel_sdvo,
851 SDVO_CMD_GET_SUPP_ENCODE,
852 &encode, sizeof(encode));
853 }
854
855 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
856 uint8_t mode)
857 {
858 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
859 }
860
861 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
862 uint8_t mode)
863 {
864 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
865 }
866
867 #if 0
868 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
869 {
870 int i, j;
871 uint8_t set_buf_index[2];
872 uint8_t av_split;
873 uint8_t buf_size;
874 uint8_t buf[48];
875 uint8_t *pos;
876
877 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
878
879 for (i = 0; i <= av_split; i++) {
880 set_buf_index[0] = i; set_buf_index[1] = 0;
881 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
882 set_buf_index, 2);
883 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
884 intel_sdvo_read_response(encoder, &buf_size, 1);
885
886 pos = buf;
887 for (j = 0; j <= buf_size; j += 8) {
888 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
889 NULL, 0);
890 intel_sdvo_read_response(encoder, pos, 8);
891 pos += 8;
892 }
893 }
894 }
895 #endif
896
897 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
898 {
899 struct dip_infoframe avi_if = {
900 .type = DIP_TYPE_AVI,
901 .ver = DIP_VERSION_AVI,
902 .len = DIP_LEN_AVI,
903 };
904 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
905 uint8_t set_buf_index[2] = { 1, 0 };
906 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
907 uint64_t *data = (uint64_t *)sdvo_data;
908 unsigned i;
909
910 intel_dip_infoframe_csum(&avi_if);
911
912 /* sdvo spec says that the ecc is handled by the hw, and it looks like
913 * we must not send the ecc field, either. */
914 memcpy(sdvo_data, &avi_if, 3);
915 sdvo_data[3] = avi_if.checksum;
916 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
917
918 if (!intel_sdvo_set_value(intel_sdvo,
919 SDVO_CMD_SET_HBUF_INDEX,
920 set_buf_index, 2))
921 return false;
922
923 for (i = 0; i < sizeof(sdvo_data); i += 8) {
924 if (!intel_sdvo_set_value(intel_sdvo,
925 SDVO_CMD_SET_HBUF_DATA,
926 data, 8))
927 return false;
928 data++;
929 }
930
931 return intel_sdvo_set_value(intel_sdvo,
932 SDVO_CMD_SET_HBUF_TXRATE,
933 &tx_rate, 1);
934 }
935
936 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
937 {
938 struct intel_sdvo_tv_format format;
939 uint32_t format_map;
940
941 format_map = 1 << intel_sdvo->tv_format_index;
942 memset(&format, 0, sizeof(format));
943 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
944
945 BUILD_BUG_ON(sizeof(format) != 6);
946 return intel_sdvo_set_value(intel_sdvo,
947 SDVO_CMD_SET_TV_FORMAT,
948 &format, sizeof(format));
949 }
950
951 static bool
952 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
953 const struct drm_display_mode *mode)
954 {
955 struct intel_sdvo_dtd output_dtd;
956
957 if (!intel_sdvo_set_target_output(intel_sdvo,
958 intel_sdvo->attached_output))
959 return false;
960
961 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
962 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
963 return false;
964
965 return true;
966 }
967
968 /* Asks the sdvo controller for the preferred input mode given the output mode.
969 * Unfortunately we have to set up the full output mode to do that. */
970 static bool
971 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
972 const struct drm_display_mode *mode,
973 struct drm_display_mode *adjusted_mode)
974 {
975 struct intel_sdvo_dtd input_dtd;
976
977 /* Reset the input timing to the screen. Assume always input 0. */
978 if (!intel_sdvo_set_target_input(intel_sdvo))
979 return false;
980
981 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
982 mode->clock / 10,
983 mode->hdisplay,
984 mode->vdisplay))
985 return false;
986
987 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
988 &input_dtd))
989 return false;
990
991 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
992 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
993
994 return true;
995 }
996
997 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
998 const struct drm_display_mode *mode,
999 struct drm_display_mode *adjusted_mode)
1000 {
1001 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1002 int multiplier;
1003
1004 /* We need to construct preferred input timings based on our
1005 * output timings. To do that, we have to set the output
1006 * timings, even though this isn't really the right place in
1007 * the sequence to do it. Oh well.
1008 */
1009 if (intel_sdvo->is_tv) {
1010 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1011 return false;
1012
1013 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1014 mode,
1015 adjusted_mode);
1016 } else if (intel_sdvo->is_lvds) {
1017 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1018 intel_sdvo->sdvo_lvds_fixed_mode))
1019 return false;
1020
1021 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1022 mode,
1023 adjusted_mode);
1024 }
1025
1026 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1027 * SDVO device will factor out the multiplier during mode_set.
1028 */
1029 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1030 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1031
1032 return true;
1033 }
1034
1035 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1036 struct drm_display_mode *mode,
1037 struct drm_display_mode *adjusted_mode)
1038 {
1039 struct drm_device *dev = encoder->dev;
1040 struct drm_i915_private *dev_priv = dev->dev_private;
1041 struct drm_crtc *crtc = encoder->crtc;
1042 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1043 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1044 u32 sdvox;
1045 struct intel_sdvo_in_out_map in_out;
1046 struct intel_sdvo_dtd input_dtd, output_dtd;
1047 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1048 int rate;
1049
1050 if (!mode)
1051 return;
1052
1053 /* First, set the input mapping for the first input to our controlled
1054 * output. This is only correct if we're a single-input device, in
1055 * which case the first input is the output from the appropriate SDVO
1056 * channel on the motherboard. In a two-input device, the first input
1057 * will be SDVOB and the second SDVOC.
1058 */
1059 in_out.in0 = intel_sdvo->attached_output;
1060 in_out.in1 = 0;
1061
1062 intel_sdvo_set_value(intel_sdvo,
1063 SDVO_CMD_SET_IN_OUT_MAP,
1064 &in_out, sizeof(in_out));
1065
1066 /* Set the output timings to the screen */
1067 if (!intel_sdvo_set_target_output(intel_sdvo,
1068 intel_sdvo->attached_output))
1069 return;
1070
1071 /* lvds has a special fixed output timing. */
1072 if (intel_sdvo->is_lvds)
1073 intel_sdvo_get_dtd_from_mode(&output_dtd,
1074 intel_sdvo->sdvo_lvds_fixed_mode);
1075 else
1076 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1077 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1078 DRM_INFO("Setting output timings on %s failed\n",
1079 SDVO_NAME(intel_sdvo));
1080
1081 /* Set the input timing to the screen. Assume always input 0. */
1082 if (!intel_sdvo_set_target_input(intel_sdvo))
1083 return;
1084
1085 if (intel_sdvo->has_hdmi_monitor) {
1086 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1087 intel_sdvo_set_colorimetry(intel_sdvo,
1088 SDVO_COLORIMETRY_RGB256);
1089 intel_sdvo_set_avi_infoframe(intel_sdvo);
1090 } else
1091 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1092
1093 if (intel_sdvo->is_tv &&
1094 !intel_sdvo_set_tv_format(intel_sdvo))
1095 return;
1096
1097 /* We have tried to get input timing in mode_fixup, and filled into
1098 * adjusted_mode.
1099 */
1100 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1101 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1102 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1103 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1104 DRM_INFO("Setting input timings on %s failed\n",
1105 SDVO_NAME(intel_sdvo));
1106
1107 switch (pixel_multiplier) {
1108 default:
1109 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1110 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1111 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1112 }
1113 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1114 return;
1115
1116 /* Set the SDVO control regs. */
1117 if (INTEL_INFO(dev)->gen >= 4) {
1118 /* The real mode polarity is set by the SDVO commands, using
1119 * struct intel_sdvo_dtd. */
1120 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1121 if (intel_sdvo->is_hdmi)
1122 sdvox |= intel_sdvo->color_range;
1123 if (INTEL_INFO(dev)->gen < 5)
1124 sdvox |= SDVO_BORDER_ENABLE;
1125 } else {
1126 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1127 switch (intel_sdvo->sdvo_reg) {
1128 case SDVOB:
1129 sdvox &= SDVOB_PRESERVE_MASK;
1130 break;
1131 case SDVOC:
1132 sdvox &= SDVOC_PRESERVE_MASK;
1133 break;
1134 }
1135 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1136 }
1137
1138 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1139 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1140 else
1141 sdvox |= TRANSCODER(intel_crtc->pipe);
1142
1143 if (intel_sdvo->has_hdmi_audio)
1144 sdvox |= SDVO_AUDIO_ENABLE;
1145
1146 if (INTEL_INFO(dev)->gen >= 4) {
1147 /* done in crtc_mode_set as the dpll_md reg must be written early */
1148 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1149 /* done in crtc_mode_set as it lives inside the dpll register */
1150 } else {
1151 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1152 }
1153
1154 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1155 INTEL_INFO(dev)->gen < 5)
1156 sdvox |= SDVO_STALL_SELECT;
1157 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1158 }
1159
1160 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1161 {
1162 struct intel_sdvo_connector *intel_sdvo_connector =
1163 to_intel_sdvo_connector(&connector->base);
1164 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1165 u16 active_outputs;
1166
1167 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1168
1169 if (active_outputs & intel_sdvo_connector->output_flag)
1170 return true;
1171 else
1172 return false;
1173 }
1174
1175 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1176 enum pipe *pipe)
1177 {
1178 struct drm_device *dev = encoder->base.dev;
1179 struct drm_i915_private *dev_priv = dev->dev_private;
1180 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1181 u32 tmp;
1182
1183 tmp = I915_READ(intel_sdvo->sdvo_reg);
1184
1185 if (!(tmp & SDVO_ENABLE))
1186 return false;
1187
1188 if (HAS_PCH_CPT(dev))
1189 *pipe = PORT_TO_PIPE_CPT(tmp);
1190 else
1191 *pipe = PORT_TO_PIPE(tmp);
1192
1193 return true;
1194 }
1195
1196 static void intel_disable_sdvo(struct intel_encoder *encoder)
1197 {
1198 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
1199 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1200 u32 temp;
1201
1202 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1203 if (0)
1204 intel_sdvo_set_encoder_power_state(intel_sdvo,
1205 DRM_MODE_DPMS_OFF);
1206
1207 temp = I915_READ(intel_sdvo->sdvo_reg);
1208 if ((temp & SDVO_ENABLE) != 0) {
1209 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1210 }
1211 }
1212
1213 static void intel_enable_sdvo(struct intel_encoder *encoder)
1214 {
1215 struct drm_device *dev = encoder->base.dev;
1216 struct drm_i915_private *dev_priv = dev->dev_private;
1217 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1218 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1219 u32 temp;
1220 bool input1, input2;
1221 int i;
1222 u8 status;
1223
1224 temp = I915_READ(intel_sdvo->sdvo_reg);
1225 if ((temp & SDVO_ENABLE) == 0)
1226 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1227 for (i = 0; i < 2; i++)
1228 intel_wait_for_vblank(dev, intel_crtc->pipe);
1229
1230 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1231 /* Warn if the device reported failure to sync.
1232 * A lot of SDVO devices fail to notify of sync, but it's
1233 * a given it the status is a success, we succeeded.
1234 */
1235 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1236 DRM_DEBUG_KMS("First %s output reported failure to "
1237 "sync\n", SDVO_NAME(intel_sdvo));
1238 }
1239
1240 if (0)
1241 intel_sdvo_set_encoder_power_state(intel_sdvo,
1242 DRM_MODE_DPMS_ON);
1243 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1244 }
1245
1246 static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
1247 {
1248 struct drm_crtc *crtc;
1249 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1250
1251 /* dvo supports only 2 dpms states. */
1252 if (mode != DRM_MODE_DPMS_ON)
1253 mode = DRM_MODE_DPMS_OFF;
1254
1255 if (mode == connector->dpms)
1256 return;
1257
1258 connector->dpms = mode;
1259
1260 /* Only need to change hw state when actually enabled */
1261 crtc = intel_sdvo->base.base.crtc;
1262 if (!crtc) {
1263 intel_sdvo->base.connectors_active = false;
1264 return;
1265 }
1266
1267 if (mode != DRM_MODE_DPMS_ON) {
1268 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1269 if (0)
1270 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1271
1272 intel_sdvo->base.connectors_active = false;
1273
1274 intel_crtc_update_dpms(crtc);
1275 } else {
1276 intel_sdvo->base.connectors_active = true;
1277
1278 intel_crtc_update_dpms(crtc);
1279
1280 if (0)
1281 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1282 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1283 }
1284
1285 intel_modeset_check_state(connector->dev);
1286 }
1287
1288 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1289 struct drm_display_mode *mode)
1290 {
1291 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1292
1293 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1294 return MODE_NO_DBLESCAN;
1295
1296 if (intel_sdvo->pixel_clock_min > mode->clock)
1297 return MODE_CLOCK_LOW;
1298
1299 if (intel_sdvo->pixel_clock_max < mode->clock)
1300 return MODE_CLOCK_HIGH;
1301
1302 if (intel_sdvo->is_lvds) {
1303 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1304 return MODE_PANEL;
1305
1306 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1307 return MODE_PANEL;
1308 }
1309
1310 return MODE_OK;
1311 }
1312
1313 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1314 {
1315 BUILD_BUG_ON(sizeof(*caps) != 8);
1316 if (!intel_sdvo_get_value(intel_sdvo,
1317 SDVO_CMD_GET_DEVICE_CAPS,
1318 caps, sizeof(*caps)))
1319 return false;
1320
1321 DRM_DEBUG_KMS("SDVO capabilities:\n"
1322 " vendor_id: %d\n"
1323 " device_id: %d\n"
1324 " device_rev_id: %d\n"
1325 " sdvo_version_major: %d\n"
1326 " sdvo_version_minor: %d\n"
1327 " sdvo_inputs_mask: %d\n"
1328 " smooth_scaling: %d\n"
1329 " sharp_scaling: %d\n"
1330 " up_scaling: %d\n"
1331 " down_scaling: %d\n"
1332 " stall_support: %d\n"
1333 " output_flags: %d\n",
1334 caps->vendor_id,
1335 caps->device_id,
1336 caps->device_rev_id,
1337 caps->sdvo_version_major,
1338 caps->sdvo_version_minor,
1339 caps->sdvo_inputs_mask,
1340 caps->smooth_scaling,
1341 caps->sharp_scaling,
1342 caps->up_scaling,
1343 caps->down_scaling,
1344 caps->stall_support,
1345 caps->output_flags);
1346
1347 return true;
1348 }
1349
1350 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1351 {
1352 struct drm_device *dev = intel_sdvo->base.base.dev;
1353 uint16_t hotplug;
1354
1355 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1356 * on the line. */
1357 if (IS_I945G(dev) || IS_I945GM(dev))
1358 return 0;
1359
1360 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1361 &hotplug, sizeof(hotplug)))
1362 return 0;
1363
1364 return hotplug;
1365 }
1366
1367 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1368 {
1369 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1370
1371 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1372 &intel_sdvo->hotplug_active, 2);
1373 }
1374
1375 static bool
1376 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1377 {
1378 /* Is there more than one type of output? */
1379 return hweight16(intel_sdvo->caps.output_flags) > 1;
1380 }
1381
1382 static struct edid *
1383 intel_sdvo_get_edid(struct drm_connector *connector)
1384 {
1385 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1386 return drm_get_edid(connector, &sdvo->ddc);
1387 }
1388
1389 /* Mac mini hack -- use the same DDC as the analog connector */
1390 static struct edid *
1391 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1392 {
1393 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1394
1395 return drm_get_edid(connector,
1396 intel_gmbus_get_adapter(dev_priv,
1397 dev_priv->crt_ddc_pin));
1398 }
1399
1400 static enum drm_connector_status
1401 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1402 {
1403 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1404 enum drm_connector_status status;
1405 struct edid *edid;
1406
1407 edid = intel_sdvo_get_edid(connector);
1408
1409 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1410 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1411
1412 /*
1413 * Don't use the 1 as the argument of DDC bus switch to get
1414 * the EDID. It is used for SDVO SPD ROM.
1415 */
1416 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1417 intel_sdvo->ddc_bus = ddc;
1418 edid = intel_sdvo_get_edid(connector);
1419 if (edid)
1420 break;
1421 }
1422 /*
1423 * If we found the EDID on the other bus,
1424 * assume that is the correct DDC bus.
1425 */
1426 if (edid == NULL)
1427 intel_sdvo->ddc_bus = saved_ddc;
1428 }
1429
1430 /*
1431 * When there is no edid and no monitor is connected with VGA
1432 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1433 */
1434 if (edid == NULL)
1435 edid = intel_sdvo_get_analog_edid(connector);
1436
1437 status = connector_status_unknown;
1438 if (edid != NULL) {
1439 /* DDC bus is shared, match EDID to connector type */
1440 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1441 status = connector_status_connected;
1442 if (intel_sdvo->is_hdmi) {
1443 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1444 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1445 }
1446 } else
1447 status = connector_status_disconnected;
1448 kfree(edid);
1449 }
1450
1451 if (status == connector_status_connected) {
1452 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1453 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1454 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1455 }
1456
1457 return status;
1458 }
1459
1460 static bool
1461 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1462 struct edid *edid)
1463 {
1464 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1465 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1466
1467 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1468 connector_is_digital, monitor_is_digital);
1469 return connector_is_digital == monitor_is_digital;
1470 }
1471
1472 static enum drm_connector_status
1473 intel_sdvo_detect(struct drm_connector *connector, bool force)
1474 {
1475 uint16_t response;
1476 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1477 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1478 enum drm_connector_status ret;
1479
1480 if (!intel_sdvo_write_cmd(intel_sdvo,
1481 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1482 return connector_status_unknown;
1483
1484 /* add 30ms delay when the output type might be TV */
1485 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1486 msleep(30);
1487
1488 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1489 return connector_status_unknown;
1490
1491 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1492 response & 0xff, response >> 8,
1493 intel_sdvo_connector->output_flag);
1494
1495 if (response == 0)
1496 return connector_status_disconnected;
1497
1498 intel_sdvo->attached_output = response;
1499
1500 intel_sdvo->has_hdmi_monitor = false;
1501 intel_sdvo->has_hdmi_audio = false;
1502
1503 if ((intel_sdvo_connector->output_flag & response) == 0)
1504 ret = connector_status_disconnected;
1505 else if (IS_TMDS(intel_sdvo_connector))
1506 ret = intel_sdvo_tmds_sink_detect(connector);
1507 else {
1508 struct edid *edid;
1509
1510 /* if we have an edid check it matches the connection */
1511 edid = intel_sdvo_get_edid(connector);
1512 if (edid == NULL)
1513 edid = intel_sdvo_get_analog_edid(connector);
1514 if (edid != NULL) {
1515 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1516 edid))
1517 ret = connector_status_connected;
1518 else
1519 ret = connector_status_disconnected;
1520
1521 kfree(edid);
1522 } else
1523 ret = connector_status_connected;
1524 }
1525
1526 /* May update encoder flag for like clock for SDVO TV, etc.*/
1527 if (ret == connector_status_connected) {
1528 intel_sdvo->is_tv = false;
1529 intel_sdvo->is_lvds = false;
1530 intel_sdvo->base.needs_tv_clock = false;
1531
1532 if (response & SDVO_TV_MASK) {
1533 intel_sdvo->is_tv = true;
1534 intel_sdvo->base.needs_tv_clock = true;
1535 }
1536 if (response & SDVO_LVDS_MASK)
1537 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1538 }
1539
1540 return ret;
1541 }
1542
1543 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1544 {
1545 struct edid *edid;
1546
1547 /* set the bus switch and get the modes */
1548 edid = intel_sdvo_get_edid(connector);
1549
1550 /*
1551 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1552 * link between analog and digital outputs. So, if the regular SDVO
1553 * DDC fails, check to see if the analog output is disconnected, in
1554 * which case we'll look there for the digital DDC data.
1555 */
1556 if (edid == NULL)
1557 edid = intel_sdvo_get_analog_edid(connector);
1558
1559 if (edid != NULL) {
1560 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1561 edid)) {
1562 drm_mode_connector_update_edid_property(connector, edid);
1563 drm_add_edid_modes(connector, edid);
1564 }
1565
1566 kfree(edid);
1567 }
1568 }
1569
1570 /*
1571 * Set of SDVO TV modes.
1572 * Note! This is in reply order (see loop in get_tv_modes).
1573 * XXX: all 60Hz refresh?
1574 */
1575 static const struct drm_display_mode sdvo_tv_modes[] = {
1576 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1577 416, 0, 200, 201, 232, 233, 0,
1578 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1579 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1580 416, 0, 240, 241, 272, 273, 0,
1581 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1582 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1583 496, 0, 300, 301, 332, 333, 0,
1584 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1585 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1586 736, 0, 350, 351, 382, 383, 0,
1587 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1588 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1589 736, 0, 400, 401, 432, 433, 0,
1590 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1591 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1592 736, 0, 480, 481, 512, 513, 0,
1593 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1594 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1595 800, 0, 480, 481, 512, 513, 0,
1596 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1597 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1598 800, 0, 576, 577, 608, 609, 0,
1599 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1600 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1601 816, 0, 350, 351, 382, 383, 0,
1602 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1603 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1604 816, 0, 400, 401, 432, 433, 0,
1605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1606 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1607 816, 0, 480, 481, 512, 513, 0,
1608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1609 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1610 816, 0, 540, 541, 572, 573, 0,
1611 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1612 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1613 816, 0, 576, 577, 608, 609, 0,
1614 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1615 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1616 864, 0, 576, 577, 608, 609, 0,
1617 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1618 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1619 896, 0, 600, 601, 632, 633, 0,
1620 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1621 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1622 928, 0, 624, 625, 656, 657, 0,
1623 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1624 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1625 1016, 0, 766, 767, 798, 799, 0,
1626 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1627 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1628 1120, 0, 768, 769, 800, 801, 0,
1629 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1630 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1631 1376, 0, 1024, 1025, 1056, 1057, 0,
1632 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1633 };
1634
1635 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1636 {
1637 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1638 struct intel_sdvo_sdtv_resolution_request tv_res;
1639 uint32_t reply = 0, format_map = 0;
1640 int i;
1641
1642 /* Read the list of supported input resolutions for the selected TV
1643 * format.
1644 */
1645 format_map = 1 << intel_sdvo->tv_format_index;
1646 memcpy(&tv_res, &format_map,
1647 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1648
1649 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1650 return;
1651
1652 BUILD_BUG_ON(sizeof(tv_res) != 3);
1653 if (!intel_sdvo_write_cmd(intel_sdvo,
1654 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1655 &tv_res, sizeof(tv_res)))
1656 return;
1657 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1658 return;
1659
1660 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1661 if (reply & (1 << i)) {
1662 struct drm_display_mode *nmode;
1663 nmode = drm_mode_duplicate(connector->dev,
1664 &sdvo_tv_modes[i]);
1665 if (nmode)
1666 drm_mode_probed_add(connector, nmode);
1667 }
1668 }
1669
1670 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1671 {
1672 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1673 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1674 struct drm_display_mode *newmode;
1675
1676 /*
1677 * Attempt to get the mode list from DDC.
1678 * Assume that the preferred modes are
1679 * arranged in priority order.
1680 */
1681 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1682 if (list_empty(&connector->probed_modes) == false)
1683 goto end;
1684
1685 /* Fetch modes from VBT */
1686 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1687 newmode = drm_mode_duplicate(connector->dev,
1688 dev_priv->sdvo_lvds_vbt_mode);
1689 if (newmode != NULL) {
1690 /* Guarantee the mode is preferred */
1691 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1692 DRM_MODE_TYPE_DRIVER);
1693 drm_mode_probed_add(connector, newmode);
1694 }
1695 }
1696
1697 end:
1698 list_for_each_entry(newmode, &connector->probed_modes, head) {
1699 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1700 intel_sdvo->sdvo_lvds_fixed_mode =
1701 drm_mode_duplicate(connector->dev, newmode);
1702
1703 intel_sdvo->is_lvds = true;
1704 break;
1705 }
1706 }
1707
1708 }
1709
1710 static int intel_sdvo_get_modes(struct drm_connector *connector)
1711 {
1712 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1713
1714 if (IS_TV(intel_sdvo_connector))
1715 intel_sdvo_get_tv_modes(connector);
1716 else if (IS_LVDS(intel_sdvo_connector))
1717 intel_sdvo_get_lvds_modes(connector);
1718 else
1719 intel_sdvo_get_ddc_modes(connector);
1720
1721 return !list_empty(&connector->probed_modes);
1722 }
1723
1724 static void
1725 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1726 {
1727 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1728 struct drm_device *dev = connector->dev;
1729
1730 if (intel_sdvo_connector->left)
1731 drm_property_destroy(dev, intel_sdvo_connector->left);
1732 if (intel_sdvo_connector->right)
1733 drm_property_destroy(dev, intel_sdvo_connector->right);
1734 if (intel_sdvo_connector->top)
1735 drm_property_destroy(dev, intel_sdvo_connector->top);
1736 if (intel_sdvo_connector->bottom)
1737 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1738 if (intel_sdvo_connector->hpos)
1739 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1740 if (intel_sdvo_connector->vpos)
1741 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1742 if (intel_sdvo_connector->saturation)
1743 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1744 if (intel_sdvo_connector->contrast)
1745 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1746 if (intel_sdvo_connector->hue)
1747 drm_property_destroy(dev, intel_sdvo_connector->hue);
1748 if (intel_sdvo_connector->sharpness)
1749 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1750 if (intel_sdvo_connector->flicker_filter)
1751 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1752 if (intel_sdvo_connector->flicker_filter_2d)
1753 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1754 if (intel_sdvo_connector->flicker_filter_adaptive)
1755 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1756 if (intel_sdvo_connector->tv_luma_filter)
1757 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1758 if (intel_sdvo_connector->tv_chroma_filter)
1759 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1760 if (intel_sdvo_connector->dot_crawl)
1761 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1762 if (intel_sdvo_connector->brightness)
1763 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1764 }
1765
1766 static void intel_sdvo_destroy(struct drm_connector *connector)
1767 {
1768 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1769
1770 if (intel_sdvo_connector->tv_format)
1771 drm_property_destroy(connector->dev,
1772 intel_sdvo_connector->tv_format);
1773
1774 intel_sdvo_destroy_enhance_property(connector);
1775 drm_sysfs_connector_remove(connector);
1776 drm_connector_cleanup(connector);
1777 kfree(connector);
1778 }
1779
1780 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1781 {
1782 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1783 struct edid *edid;
1784 bool has_audio = false;
1785
1786 if (!intel_sdvo->is_hdmi)
1787 return false;
1788
1789 edid = intel_sdvo_get_edid(connector);
1790 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1791 has_audio = drm_detect_monitor_audio(edid);
1792 kfree(edid);
1793
1794 return has_audio;
1795 }
1796
1797 static int
1798 intel_sdvo_set_property(struct drm_connector *connector,
1799 struct drm_property *property,
1800 uint64_t val)
1801 {
1802 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1803 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1804 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1805 uint16_t temp_value;
1806 uint8_t cmd;
1807 int ret;
1808
1809 ret = drm_connector_property_set_value(connector, property, val);
1810 if (ret)
1811 return ret;
1812
1813 if (property == dev_priv->force_audio_property) {
1814 int i = val;
1815 bool has_audio;
1816
1817 if (i == intel_sdvo_connector->force_audio)
1818 return 0;
1819
1820 intel_sdvo_connector->force_audio = i;
1821
1822 if (i == HDMI_AUDIO_AUTO)
1823 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1824 else
1825 has_audio = (i == HDMI_AUDIO_ON);
1826
1827 if (has_audio == intel_sdvo->has_hdmi_audio)
1828 return 0;
1829
1830 intel_sdvo->has_hdmi_audio = has_audio;
1831 goto done;
1832 }
1833
1834 if (property == dev_priv->broadcast_rgb_property) {
1835 if (val == !!intel_sdvo->color_range)
1836 return 0;
1837
1838 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1839 goto done;
1840 }
1841
1842 #define CHECK_PROPERTY(name, NAME) \
1843 if (intel_sdvo_connector->name == property) { \
1844 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1845 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1846 cmd = SDVO_CMD_SET_##NAME; \
1847 intel_sdvo_connector->cur_##name = temp_value; \
1848 goto set_value; \
1849 }
1850
1851 if (property == intel_sdvo_connector->tv_format) {
1852 if (val >= TV_FORMAT_NUM)
1853 return -EINVAL;
1854
1855 if (intel_sdvo->tv_format_index ==
1856 intel_sdvo_connector->tv_format_supported[val])
1857 return 0;
1858
1859 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1860 goto done;
1861 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1862 temp_value = val;
1863 if (intel_sdvo_connector->left == property) {
1864 drm_connector_property_set_value(connector,
1865 intel_sdvo_connector->right, val);
1866 if (intel_sdvo_connector->left_margin == temp_value)
1867 return 0;
1868
1869 intel_sdvo_connector->left_margin = temp_value;
1870 intel_sdvo_connector->right_margin = temp_value;
1871 temp_value = intel_sdvo_connector->max_hscan -
1872 intel_sdvo_connector->left_margin;
1873 cmd = SDVO_CMD_SET_OVERSCAN_H;
1874 goto set_value;
1875 } else if (intel_sdvo_connector->right == property) {
1876 drm_connector_property_set_value(connector,
1877 intel_sdvo_connector->left, val);
1878 if (intel_sdvo_connector->right_margin == temp_value)
1879 return 0;
1880
1881 intel_sdvo_connector->left_margin = temp_value;
1882 intel_sdvo_connector->right_margin = temp_value;
1883 temp_value = intel_sdvo_connector->max_hscan -
1884 intel_sdvo_connector->left_margin;
1885 cmd = SDVO_CMD_SET_OVERSCAN_H;
1886 goto set_value;
1887 } else if (intel_sdvo_connector->top == property) {
1888 drm_connector_property_set_value(connector,
1889 intel_sdvo_connector->bottom, val);
1890 if (intel_sdvo_connector->top_margin == temp_value)
1891 return 0;
1892
1893 intel_sdvo_connector->top_margin = temp_value;
1894 intel_sdvo_connector->bottom_margin = temp_value;
1895 temp_value = intel_sdvo_connector->max_vscan -
1896 intel_sdvo_connector->top_margin;
1897 cmd = SDVO_CMD_SET_OVERSCAN_V;
1898 goto set_value;
1899 } else if (intel_sdvo_connector->bottom == property) {
1900 drm_connector_property_set_value(connector,
1901 intel_sdvo_connector->top, val);
1902 if (intel_sdvo_connector->bottom_margin == temp_value)
1903 return 0;
1904
1905 intel_sdvo_connector->top_margin = temp_value;
1906 intel_sdvo_connector->bottom_margin = temp_value;
1907 temp_value = intel_sdvo_connector->max_vscan -
1908 intel_sdvo_connector->top_margin;
1909 cmd = SDVO_CMD_SET_OVERSCAN_V;
1910 goto set_value;
1911 }
1912 CHECK_PROPERTY(hpos, HPOS)
1913 CHECK_PROPERTY(vpos, VPOS)
1914 CHECK_PROPERTY(saturation, SATURATION)
1915 CHECK_PROPERTY(contrast, CONTRAST)
1916 CHECK_PROPERTY(hue, HUE)
1917 CHECK_PROPERTY(brightness, BRIGHTNESS)
1918 CHECK_PROPERTY(sharpness, SHARPNESS)
1919 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1920 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1921 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1922 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1923 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1924 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1925 }
1926
1927 return -EINVAL; /* unknown property */
1928
1929 set_value:
1930 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1931 return -EIO;
1932
1933
1934 done:
1935 if (intel_sdvo->base.base.crtc) {
1936 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1937 intel_set_mode(crtc, &crtc->mode,
1938 crtc->x, crtc->y, crtc->fb);
1939 }
1940
1941 return 0;
1942 #undef CHECK_PROPERTY
1943 }
1944
1945 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1946 .mode_fixup = intel_sdvo_mode_fixup,
1947 .mode_set = intel_sdvo_mode_set,
1948 .disable = intel_encoder_noop,
1949 };
1950
1951 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1952 .dpms = intel_sdvo_dpms,
1953 .detect = intel_sdvo_detect,
1954 .fill_modes = drm_helper_probe_single_connector_modes,
1955 .set_property = intel_sdvo_set_property,
1956 .destroy = intel_sdvo_destroy,
1957 };
1958
1959 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1960 .get_modes = intel_sdvo_get_modes,
1961 .mode_valid = intel_sdvo_mode_valid,
1962 .best_encoder = intel_best_encoder,
1963 };
1964
1965 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1966 {
1967 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1968
1969 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1970 drm_mode_destroy(encoder->dev,
1971 intel_sdvo->sdvo_lvds_fixed_mode);
1972
1973 i2c_del_adapter(&intel_sdvo->ddc);
1974 intel_encoder_destroy(encoder);
1975 }
1976
1977 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1978 .destroy = intel_sdvo_enc_destroy,
1979 };
1980
1981 static void
1982 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1983 {
1984 uint16_t mask = 0;
1985 unsigned int num_bits;
1986
1987 /* Make a mask of outputs less than or equal to our own priority in the
1988 * list.
1989 */
1990 switch (sdvo->controlled_output) {
1991 case SDVO_OUTPUT_LVDS1:
1992 mask |= SDVO_OUTPUT_LVDS1;
1993 case SDVO_OUTPUT_LVDS0:
1994 mask |= SDVO_OUTPUT_LVDS0;
1995 case SDVO_OUTPUT_TMDS1:
1996 mask |= SDVO_OUTPUT_TMDS1;
1997 case SDVO_OUTPUT_TMDS0:
1998 mask |= SDVO_OUTPUT_TMDS0;
1999 case SDVO_OUTPUT_RGB1:
2000 mask |= SDVO_OUTPUT_RGB1;
2001 case SDVO_OUTPUT_RGB0:
2002 mask |= SDVO_OUTPUT_RGB0;
2003 break;
2004 }
2005
2006 /* Count bits to find what number we are in the priority list. */
2007 mask &= sdvo->caps.output_flags;
2008 num_bits = hweight16(mask);
2009 /* If more than 3 outputs, default to DDC bus 3 for now. */
2010 if (num_bits > 3)
2011 num_bits = 3;
2012
2013 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2014 sdvo->ddc_bus = 1 << num_bits;
2015 }
2016
2017 /**
2018 * Choose the appropriate DDC bus for control bus switch command for this
2019 * SDVO output based on the controlled output.
2020 *
2021 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2022 * outputs, then LVDS outputs.
2023 */
2024 static void
2025 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2026 struct intel_sdvo *sdvo, u32 reg)
2027 {
2028 struct sdvo_device_mapping *mapping;
2029
2030 if (sdvo->is_sdvob)
2031 mapping = &(dev_priv->sdvo_mappings[0]);
2032 else
2033 mapping = &(dev_priv->sdvo_mappings[1]);
2034
2035 if (mapping->initialized)
2036 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2037 else
2038 intel_sdvo_guess_ddc_bus(sdvo);
2039 }
2040
2041 static void
2042 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2043 struct intel_sdvo *sdvo, u32 reg)
2044 {
2045 struct sdvo_device_mapping *mapping;
2046 u8 pin;
2047
2048 if (sdvo->is_sdvob)
2049 mapping = &dev_priv->sdvo_mappings[0];
2050 else
2051 mapping = &dev_priv->sdvo_mappings[1];
2052
2053 pin = GMBUS_PORT_DPB;
2054 if (mapping->initialized)
2055 pin = mapping->i2c_pin;
2056
2057 if (intel_gmbus_is_port_valid(pin)) {
2058 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2059 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
2060 intel_gmbus_force_bit(sdvo->i2c, true);
2061 } else {
2062 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
2063 }
2064 }
2065
2066 static bool
2067 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2068 {
2069 return intel_sdvo_check_supp_encode(intel_sdvo);
2070 }
2071
2072 static u8
2073 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
2074 {
2075 struct drm_i915_private *dev_priv = dev->dev_private;
2076 struct sdvo_device_mapping *my_mapping, *other_mapping;
2077
2078 if (sdvo->is_sdvob) {
2079 my_mapping = &dev_priv->sdvo_mappings[0];
2080 other_mapping = &dev_priv->sdvo_mappings[1];
2081 } else {
2082 my_mapping = &dev_priv->sdvo_mappings[1];
2083 other_mapping = &dev_priv->sdvo_mappings[0];
2084 }
2085
2086 /* If the BIOS described our SDVO device, take advantage of it. */
2087 if (my_mapping->slave_addr)
2088 return my_mapping->slave_addr;
2089
2090 /* If the BIOS only described a different SDVO device, use the
2091 * address that it isn't using.
2092 */
2093 if (other_mapping->slave_addr) {
2094 if (other_mapping->slave_addr == 0x70)
2095 return 0x72;
2096 else
2097 return 0x70;
2098 }
2099
2100 /* No SDVO device info is found for another DVO port,
2101 * so use mapping assumption we had before BIOS parsing.
2102 */
2103 if (sdvo->is_sdvob)
2104 return 0x70;
2105 else
2106 return 0x72;
2107 }
2108
2109 static void
2110 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2111 struct intel_sdvo *encoder)
2112 {
2113 drm_connector_init(encoder->base.base.dev,
2114 &connector->base.base,
2115 &intel_sdvo_connector_funcs,
2116 connector->base.base.connector_type);
2117
2118 drm_connector_helper_add(&connector->base.base,
2119 &intel_sdvo_connector_helper_funcs);
2120
2121 connector->base.base.interlace_allowed = 1;
2122 connector->base.base.doublescan_allowed = 0;
2123 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2124 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2125
2126 intel_connector_attach_encoder(&connector->base, &encoder->base);
2127 drm_sysfs_connector_add(&connector->base.base);
2128 }
2129
2130 static void
2131 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2132 {
2133 struct drm_device *dev = connector->base.base.dev;
2134
2135 intel_attach_force_audio_property(&connector->base.base);
2136 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2137 intel_attach_broadcast_rgb_property(&connector->base.base);
2138 }
2139
2140 static bool
2141 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2142 {
2143 struct drm_encoder *encoder = &intel_sdvo->base.base;
2144 struct drm_connector *connector;
2145 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2146 struct intel_connector *intel_connector;
2147 struct intel_sdvo_connector *intel_sdvo_connector;
2148
2149 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2150 if (!intel_sdvo_connector)
2151 return false;
2152
2153 if (device == 0) {
2154 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2155 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2156 } else if (device == 1) {
2157 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2158 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2159 }
2160
2161 intel_connector = &intel_sdvo_connector->base;
2162 connector = &intel_connector->base;
2163 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2164 intel_sdvo_connector->output_flag) {
2165 connector->polled = DRM_CONNECTOR_POLL_HPD;
2166 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2167 /* Some SDVO devices have one-shot hotplug interrupts.
2168 * Ensure that they get re-enabled when an interrupt happens.
2169 */
2170 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2171 intel_sdvo_enable_hotplug(intel_encoder);
2172 } else {
2173 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2174 }
2175 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2176 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2177
2178 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2179 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2180 intel_sdvo->is_hdmi = true;
2181 }
2182 intel_sdvo->base.cloneable = true;
2183
2184 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2185 if (intel_sdvo->is_hdmi)
2186 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2187
2188 return true;
2189 }
2190
2191 static bool
2192 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2193 {
2194 struct drm_encoder *encoder = &intel_sdvo->base.base;
2195 struct drm_connector *connector;
2196 struct intel_connector *intel_connector;
2197 struct intel_sdvo_connector *intel_sdvo_connector;
2198
2199 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2200 if (!intel_sdvo_connector)
2201 return false;
2202
2203 intel_connector = &intel_sdvo_connector->base;
2204 connector = &intel_connector->base;
2205 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2206 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2207
2208 intel_sdvo->controlled_output |= type;
2209 intel_sdvo_connector->output_flag = type;
2210
2211 intel_sdvo->is_tv = true;
2212 intel_sdvo->base.needs_tv_clock = true;
2213 intel_sdvo->base.cloneable = false;
2214
2215 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2216
2217 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2218 goto err;
2219
2220 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2221 goto err;
2222
2223 return true;
2224
2225 err:
2226 intel_sdvo_destroy(connector);
2227 return false;
2228 }
2229
2230 static bool
2231 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2232 {
2233 struct drm_encoder *encoder = &intel_sdvo->base.base;
2234 struct drm_connector *connector;
2235 struct intel_connector *intel_connector;
2236 struct intel_sdvo_connector *intel_sdvo_connector;
2237
2238 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2239 if (!intel_sdvo_connector)
2240 return false;
2241
2242 intel_connector = &intel_sdvo_connector->base;
2243 connector = &intel_connector->base;
2244 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2245 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2246 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2247
2248 if (device == 0) {
2249 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2250 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2251 } else if (device == 1) {
2252 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2253 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2254 }
2255
2256 intel_sdvo->base.cloneable = true;
2257
2258 intel_sdvo_connector_init(intel_sdvo_connector,
2259 intel_sdvo);
2260 return true;
2261 }
2262
2263 static bool
2264 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2265 {
2266 struct drm_encoder *encoder = &intel_sdvo->base.base;
2267 struct drm_connector *connector;
2268 struct intel_connector *intel_connector;
2269 struct intel_sdvo_connector *intel_sdvo_connector;
2270
2271 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2272 if (!intel_sdvo_connector)
2273 return false;
2274
2275 intel_connector = &intel_sdvo_connector->base;
2276 connector = &intel_connector->base;
2277 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2278 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2279
2280 if (device == 0) {
2281 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2282 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2283 } else if (device == 1) {
2284 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2285 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2286 }
2287
2288 /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
2289 intel_sdvo->base.cloneable = false;
2290
2291 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2292 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2293 goto err;
2294
2295 return true;
2296
2297 err:
2298 intel_sdvo_destroy(connector);
2299 return false;
2300 }
2301
2302 static bool
2303 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2304 {
2305 intel_sdvo->is_tv = false;
2306 intel_sdvo->base.needs_tv_clock = false;
2307 intel_sdvo->is_lvds = false;
2308
2309 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2310
2311 if (flags & SDVO_OUTPUT_TMDS0)
2312 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2313 return false;
2314
2315 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2316 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2317 return false;
2318
2319 /* TV has no XXX1 function block */
2320 if (flags & SDVO_OUTPUT_SVID0)
2321 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2322 return false;
2323
2324 if (flags & SDVO_OUTPUT_CVBS0)
2325 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2326 return false;
2327
2328 if (flags & SDVO_OUTPUT_YPRPB0)
2329 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2330 return false;
2331
2332 if (flags & SDVO_OUTPUT_RGB0)
2333 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2334 return false;
2335
2336 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2337 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2338 return false;
2339
2340 if (flags & SDVO_OUTPUT_LVDS0)
2341 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2342 return false;
2343
2344 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2345 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2346 return false;
2347
2348 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2349 unsigned char bytes[2];
2350
2351 intel_sdvo->controlled_output = 0;
2352 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2353 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2354 SDVO_NAME(intel_sdvo),
2355 bytes[0], bytes[1]);
2356 return false;
2357 }
2358 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2359
2360 return true;
2361 }
2362
2363 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2364 struct intel_sdvo_connector *intel_sdvo_connector,
2365 int type)
2366 {
2367 struct drm_device *dev = intel_sdvo->base.base.dev;
2368 struct intel_sdvo_tv_format format;
2369 uint32_t format_map, i;
2370
2371 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2372 return false;
2373
2374 BUILD_BUG_ON(sizeof(format) != 6);
2375 if (!intel_sdvo_get_value(intel_sdvo,
2376 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2377 &format, sizeof(format)))
2378 return false;
2379
2380 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2381
2382 if (format_map == 0)
2383 return false;
2384
2385 intel_sdvo_connector->format_supported_num = 0;
2386 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2387 if (format_map & (1 << i))
2388 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2389
2390
2391 intel_sdvo_connector->tv_format =
2392 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2393 "mode", intel_sdvo_connector->format_supported_num);
2394 if (!intel_sdvo_connector->tv_format)
2395 return false;
2396
2397 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2398 drm_property_add_enum(
2399 intel_sdvo_connector->tv_format, i,
2400 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2401
2402 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2403 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2404 intel_sdvo_connector->tv_format, 0);
2405 return true;
2406
2407 }
2408
2409 #define ENHANCEMENT(name, NAME) do { \
2410 if (enhancements.name) { \
2411 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2412 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2413 return false; \
2414 intel_sdvo_connector->max_##name = data_value[0]; \
2415 intel_sdvo_connector->cur_##name = response; \
2416 intel_sdvo_connector->name = \
2417 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2418 if (!intel_sdvo_connector->name) return false; \
2419 drm_connector_attach_property(connector, \
2420 intel_sdvo_connector->name, \
2421 intel_sdvo_connector->cur_##name); \
2422 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2423 data_value[0], data_value[1], response); \
2424 } \
2425 } while (0)
2426
2427 static bool
2428 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2429 struct intel_sdvo_connector *intel_sdvo_connector,
2430 struct intel_sdvo_enhancements_reply enhancements)
2431 {
2432 struct drm_device *dev = intel_sdvo->base.base.dev;
2433 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2434 uint16_t response, data_value[2];
2435
2436 /* when horizontal overscan is supported, Add the left/right property */
2437 if (enhancements.overscan_h) {
2438 if (!intel_sdvo_get_value(intel_sdvo,
2439 SDVO_CMD_GET_MAX_OVERSCAN_H,
2440 &data_value, 4))
2441 return false;
2442
2443 if (!intel_sdvo_get_value(intel_sdvo,
2444 SDVO_CMD_GET_OVERSCAN_H,
2445 &response, 2))
2446 return false;
2447
2448 intel_sdvo_connector->max_hscan = data_value[0];
2449 intel_sdvo_connector->left_margin = data_value[0] - response;
2450 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2451 intel_sdvo_connector->left =
2452 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2453 if (!intel_sdvo_connector->left)
2454 return false;
2455
2456 drm_connector_attach_property(connector,
2457 intel_sdvo_connector->left,
2458 intel_sdvo_connector->left_margin);
2459
2460 intel_sdvo_connector->right =
2461 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2462 if (!intel_sdvo_connector->right)
2463 return false;
2464
2465 drm_connector_attach_property(connector,
2466 intel_sdvo_connector->right,
2467 intel_sdvo_connector->right_margin);
2468 DRM_DEBUG_KMS("h_overscan: max %d, "
2469 "default %d, current %d\n",
2470 data_value[0], data_value[1], response);
2471 }
2472
2473 if (enhancements.overscan_v) {
2474 if (!intel_sdvo_get_value(intel_sdvo,
2475 SDVO_CMD_GET_MAX_OVERSCAN_V,
2476 &data_value, 4))
2477 return false;
2478
2479 if (!intel_sdvo_get_value(intel_sdvo,
2480 SDVO_CMD_GET_OVERSCAN_V,
2481 &response, 2))
2482 return false;
2483
2484 intel_sdvo_connector->max_vscan = data_value[0];
2485 intel_sdvo_connector->top_margin = data_value[0] - response;
2486 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2487 intel_sdvo_connector->top =
2488 drm_property_create_range(dev, 0,
2489 "top_margin", 0, data_value[0]);
2490 if (!intel_sdvo_connector->top)
2491 return false;
2492
2493 drm_connector_attach_property(connector,
2494 intel_sdvo_connector->top,
2495 intel_sdvo_connector->top_margin);
2496
2497 intel_sdvo_connector->bottom =
2498 drm_property_create_range(dev, 0,
2499 "bottom_margin", 0, data_value[0]);
2500 if (!intel_sdvo_connector->bottom)
2501 return false;
2502
2503 drm_connector_attach_property(connector,
2504 intel_sdvo_connector->bottom,
2505 intel_sdvo_connector->bottom_margin);
2506 DRM_DEBUG_KMS("v_overscan: max %d, "
2507 "default %d, current %d\n",
2508 data_value[0], data_value[1], response);
2509 }
2510
2511 ENHANCEMENT(hpos, HPOS);
2512 ENHANCEMENT(vpos, VPOS);
2513 ENHANCEMENT(saturation, SATURATION);
2514 ENHANCEMENT(contrast, CONTRAST);
2515 ENHANCEMENT(hue, HUE);
2516 ENHANCEMENT(sharpness, SHARPNESS);
2517 ENHANCEMENT(brightness, BRIGHTNESS);
2518 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2519 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2520 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2521 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2522 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2523
2524 if (enhancements.dot_crawl) {
2525 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2526 return false;
2527
2528 intel_sdvo_connector->max_dot_crawl = 1;
2529 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2530 intel_sdvo_connector->dot_crawl =
2531 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2532 if (!intel_sdvo_connector->dot_crawl)
2533 return false;
2534
2535 drm_connector_attach_property(connector,
2536 intel_sdvo_connector->dot_crawl,
2537 intel_sdvo_connector->cur_dot_crawl);
2538 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2539 }
2540
2541 return true;
2542 }
2543
2544 static bool
2545 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2546 struct intel_sdvo_connector *intel_sdvo_connector,
2547 struct intel_sdvo_enhancements_reply enhancements)
2548 {
2549 struct drm_device *dev = intel_sdvo->base.base.dev;
2550 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2551 uint16_t response, data_value[2];
2552
2553 ENHANCEMENT(brightness, BRIGHTNESS);
2554
2555 return true;
2556 }
2557 #undef ENHANCEMENT
2558
2559 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2560 struct intel_sdvo_connector *intel_sdvo_connector)
2561 {
2562 union {
2563 struct intel_sdvo_enhancements_reply reply;
2564 uint16_t response;
2565 } enhancements;
2566
2567 BUILD_BUG_ON(sizeof(enhancements) != 2);
2568
2569 enhancements.response = 0;
2570 intel_sdvo_get_value(intel_sdvo,
2571 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2572 &enhancements, sizeof(enhancements));
2573 if (enhancements.response == 0) {
2574 DRM_DEBUG_KMS("No enhancement is supported\n");
2575 return true;
2576 }
2577
2578 if (IS_TV(intel_sdvo_connector))
2579 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2580 else if (IS_LVDS(intel_sdvo_connector))
2581 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2582 else
2583 return true;
2584 }
2585
2586 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2587 struct i2c_msg *msgs,
2588 int num)
2589 {
2590 struct intel_sdvo *sdvo = adapter->algo_data;
2591
2592 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2593 return -EIO;
2594
2595 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2596 }
2597
2598 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2599 {
2600 struct intel_sdvo *sdvo = adapter->algo_data;
2601 return sdvo->i2c->algo->functionality(sdvo->i2c);
2602 }
2603
2604 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2605 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2606 .functionality = intel_sdvo_ddc_proxy_func
2607 };
2608
2609 static bool
2610 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2611 struct drm_device *dev)
2612 {
2613 sdvo->ddc.owner = THIS_MODULE;
2614 sdvo->ddc.class = I2C_CLASS_DDC;
2615 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2616 sdvo->ddc.dev.parent = &dev->pdev->dev;
2617 sdvo->ddc.algo_data = sdvo;
2618 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2619
2620 return i2c_add_adapter(&sdvo->ddc) == 0;
2621 }
2622
2623 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2624 {
2625 struct drm_i915_private *dev_priv = dev->dev_private;
2626 struct intel_encoder *intel_encoder;
2627 struct intel_sdvo *intel_sdvo;
2628 u32 hotplug_mask;
2629 int i;
2630
2631 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2632 if (!intel_sdvo)
2633 return false;
2634
2635 intel_sdvo->sdvo_reg = sdvo_reg;
2636 intel_sdvo->is_sdvob = is_sdvob;
2637 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2638 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2639 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2640 kfree(intel_sdvo);
2641 return false;
2642 }
2643
2644 /* encoder type will be decided later */
2645 intel_encoder = &intel_sdvo->base;
2646 intel_encoder->type = INTEL_OUTPUT_SDVO;
2647 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2648
2649 /* Read the regs to test if we can talk to the device */
2650 for (i = 0; i < 0x40; i++) {
2651 u8 byte;
2652
2653 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2654 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2655 SDVO_NAME(intel_sdvo));
2656 goto err;
2657 }
2658 }
2659
2660 hotplug_mask = 0;
2661 if (IS_G4X(dev)) {
2662 hotplug_mask = intel_sdvo->is_sdvob ?
2663 SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
2664 } else if (IS_GEN4(dev)) {
2665 hotplug_mask = intel_sdvo->is_sdvob ?
2666 SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
2667 } else {
2668 hotplug_mask = intel_sdvo->is_sdvob ?
2669 SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
2670 }
2671
2672 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2673
2674 intel_encoder->disable = intel_disable_sdvo;
2675 intel_encoder->enable = intel_enable_sdvo;
2676 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
2677
2678 /* In default case sdvo lvds is false */
2679 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2680 goto err;
2681
2682 if (intel_sdvo_output_setup(intel_sdvo,
2683 intel_sdvo->caps.output_flags) != true) {
2684 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2685 SDVO_NAME(intel_sdvo));
2686 goto err;
2687 }
2688
2689 /* Only enable the hotplug irq if we need it, to work around noisy
2690 * hotplug lines.
2691 */
2692 if (intel_sdvo->hotplug_active)
2693 dev_priv->hotplug_supported_mask |= hotplug_mask;
2694
2695 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2696
2697 /* Set the input timing to the screen. Assume always input 0. */
2698 if (!intel_sdvo_set_target_input(intel_sdvo))
2699 goto err;
2700
2701 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2702 &intel_sdvo->pixel_clock_min,
2703 &intel_sdvo->pixel_clock_max))
2704 goto err;
2705
2706 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2707 "clock range %dMHz - %dMHz, "
2708 "input 1: %c, input 2: %c, "
2709 "output 1: %c, output 2: %c\n",
2710 SDVO_NAME(intel_sdvo),
2711 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2712 intel_sdvo->caps.device_rev_id,
2713 intel_sdvo->pixel_clock_min / 1000,
2714 intel_sdvo->pixel_clock_max / 1000,
2715 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2716 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2717 /* check currently supported outputs */
2718 intel_sdvo->caps.output_flags &
2719 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2720 intel_sdvo->caps.output_flags &
2721 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2722 return true;
2723
2724 err:
2725 drm_encoder_cleanup(&intel_encoder->base);
2726 i2c_del_adapter(&intel_sdvo->ddc);
2727 kfree(intel_sdvo);
2728
2729 return false;
2730 }
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