2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/delay.h>
33 #include "intel_drv.h"
37 #include "intel_sdvo_regs.h"
40 #define I915_SDVO "i915_sdvo"
41 static char *tv_format_names
[] = {
42 "NTSC_M" , "NTSC_J" , "NTSC_443",
43 "PAL_B" , "PAL_D" , "PAL_G" ,
44 "PAL_H" , "PAL_I" , "PAL_M" ,
45 "PAL_N" , "PAL_NC" , "PAL_60" ,
46 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
47 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
51 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
53 struct intel_sdvo_priv
{
56 /* Register for the SDVO device: SDVOB or SDVOC */
59 /* Active outputs controlled by this SDVO output */
60 uint16_t controlled_output
;
63 * Capabilities of the SDVO device returned by
64 * i830_sdvo_get_capabilities()
66 struct intel_sdvo_caps caps
;
68 /* Pixel clock limitations reported by the SDVO device, in kHz */
69 int pixel_clock_min
, pixel_clock_max
;
72 * For multiple function SDVO device,
73 * this is for current attached outputs.
75 uint16_t attached_output
;
78 * This is set if we're going to treat the device as TV-out.
80 * While we have these nice friendly flags for output types that ought
81 * to decide this for us, the S-Video output on our HDMI+S-Video card
82 * shows up as RGB1 (VGA).
86 /* This is for current tv format name */
89 /* This contains all current supported TV format */
90 char *tv_format_supported
[TV_FORMAT_NUM
];
91 int format_supported_num
;
92 struct drm_property
*tv_format_property
;
93 struct drm_property
*tv_format_name_property
[TV_FORMAT_NUM
];
96 * This is set if we treat the device as HDMI, instead of DVI.
101 * This is set if we detect output of sdvo device as LVDS.
106 * This is sdvo flags for input timing.
111 * This is sdvo fixed pannel mode pointer
113 struct drm_display_mode
*sdvo_lvds_fixed_mode
;
116 * Returned SDTV resolutions allowed for the current format, if the
117 * device reported it.
119 struct intel_sdvo_sdtv_resolution_reply sdtv_resolutions
;
122 * supported encoding mode, used to determine whether HDMI is
125 struct intel_sdvo_encode encode
;
127 /* DDC bus used by this SDVO output */
130 /* Mac mini hack -- use the same DDC as the analog connector */
131 struct i2c_adapter
*analog_ddc_bus
;
134 u16 save_active_outputs
;
135 struct intel_sdvo_dtd save_input_dtd_1
, save_input_dtd_2
;
136 struct intel_sdvo_dtd save_output_dtd
[16];
141 intel_sdvo_output_setup(struct intel_output
*intel_output
, uint16_t flags
);
144 * Writes the SDVOB or SDVOC with the given value, but always writes both
145 * SDVOB and SDVOC to work around apparent hardware issues (according to
146 * comments in the BIOS).
148 static void intel_sdvo_write_sdvox(struct intel_output
*intel_output
, u32 val
)
150 struct drm_device
*dev
= intel_output
->base
.dev
;
151 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
152 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
153 u32 bval
= val
, cval
= val
;
156 if (sdvo_priv
->output_device
== SDVOB
) {
157 cval
= I915_READ(SDVOC
);
159 bval
= I915_READ(SDVOB
);
162 * Write the registers twice for luck. Sometimes,
163 * writing them only once doesn't appear to 'stick'.
164 * The BIOS does this too. Yay, magic
166 for (i
= 0; i
< 2; i
++)
168 I915_WRITE(SDVOB
, bval
);
170 I915_WRITE(SDVOC
, cval
);
175 static bool intel_sdvo_read_byte(struct intel_output
*intel_output
, u8 addr
,
178 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
183 struct i2c_msg msgs
[] = {
185 .addr
= sdvo_priv
->slave_addr
>> 1,
191 .addr
= sdvo_priv
->slave_addr
>> 1,
201 if ((ret
= i2c_transfer(intel_output
->i2c_bus
, msgs
, 2)) == 2)
207 DRM_DEBUG("i2c transfer returned %d\n", ret
);
211 static bool intel_sdvo_write_byte(struct intel_output
*intel_output
, int addr
,
214 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
216 struct i2c_msg msgs
[] = {
218 .addr
= sdvo_priv
->slave_addr
>> 1,
228 if (i2c_transfer(intel_output
->i2c_bus
, msgs
, 1) == 1)
235 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
236 /** Mapping of command numbers to names, for debug output */
237 static const struct _sdvo_cmd_name
{
240 } sdvo_cmd_names
[] = {
241 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET
),
242 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS
),
243 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV
),
244 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS
),
245 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS
),
246 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS
),
247 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP
),
248 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP
),
249 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS
),
250 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT
),
251 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG
),
252 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG
),
253 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE
),
254 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT
),
255 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT
),
256 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1
),
257 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2
),
258 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
259 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2
),
260 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1
),
261 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
),
262 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2
),
263 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
),
264 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2
),
265 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
),
266 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
),
267 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
),
268 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
),
269 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE
),
270 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS
),
271 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT
),
272 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT
),
273 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS
),
274 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT
),
275 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT
),
276 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES
),
277 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE
),
278 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE
),
279 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE
),
280 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH
),
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT
),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS
),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE
),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE
),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE
),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI
),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI
),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP
),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY
),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY
),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER
),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT
),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT
),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX
),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX
),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO
),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT
),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT
),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE
),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE
),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA
),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA
),
307 #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC")
308 #define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv)
311 static void intel_sdvo_debug_write(struct intel_output
*intel_output
, u8 cmd
,
312 void *args
, int args_len
)
314 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
317 DRM_DEBUG_KMS(I915_SDVO
, "%s: W: %02X ",
318 SDVO_NAME(sdvo_priv
), cmd
);
319 for (i
= 0; i
< args_len
; i
++)
320 DRM_LOG_KMS("%02X ", ((u8
*)args
)[i
]);
323 for (i
= 0; i
< sizeof(sdvo_cmd_names
) / sizeof(sdvo_cmd_names
[0]); i
++) {
324 if (cmd
== sdvo_cmd_names
[i
].cmd
) {
325 DRM_LOG_KMS("(%s)", sdvo_cmd_names
[i
].name
);
329 if (i
== sizeof(sdvo_cmd_names
)/ sizeof(sdvo_cmd_names
[0]))
330 DRM_LOG_KMS("(%02X)", cmd
);
334 #define intel_sdvo_debug_write(o, c, a, l)
337 static void intel_sdvo_write_cmd(struct intel_output
*intel_output
, u8 cmd
,
338 void *args
, int args_len
)
342 intel_sdvo_debug_write(intel_output
, cmd
, args
, args_len
);
344 for (i
= 0; i
< args_len
; i
++) {
345 intel_sdvo_write_byte(intel_output
, SDVO_I2C_ARG_0
- i
,
349 intel_sdvo_write_byte(intel_output
, SDVO_I2C_OPCODE
, cmd
);
353 static const char *cmd_status_names
[] = {
359 "Target not specified",
360 "Scaling not supported"
363 static void intel_sdvo_debug_response(struct intel_output
*intel_output
,
364 void *response
, int response_len
,
367 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
370 DRM_DEBUG_KMS(I915_SDVO
, "%s: R: ", SDVO_NAME(sdvo_priv
));
371 for (i
= 0; i
< response_len
; i
++)
372 DRM_LOG_KMS("%02X ", ((u8
*)response
)[i
]);
375 if (status
<= SDVO_CMD_STATUS_SCALING_NOT_SUPP
)
376 DRM_LOG_KMS("(%s)", cmd_status_names
[status
]);
378 DRM_LOG_KMS("(??? %d)", status
);
382 #define intel_sdvo_debug_response(o, r, l, s)
385 static u8
intel_sdvo_read_response(struct intel_output
*intel_output
,
386 void *response
, int response_len
)
393 /* Read the command response */
394 for (i
= 0; i
< response_len
; i
++) {
395 intel_sdvo_read_byte(intel_output
,
396 SDVO_I2C_RETURN_0
+ i
,
397 &((u8
*)response
)[i
]);
400 /* read the return status */
401 intel_sdvo_read_byte(intel_output
, SDVO_I2C_CMD_STATUS
,
404 intel_sdvo_debug_response(intel_output
, response
, response_len
,
406 if (status
!= SDVO_CMD_STATUS_PENDING
)
415 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode
*mode
)
417 if (mode
->clock
>= 100000)
419 else if (mode
->clock
>= 50000)
426 * Don't check status code from this as it switches the bus back to the
427 * SDVO chips which defeats the purpose of doing a bus switch in the first
430 static void intel_sdvo_set_control_bus_switch(struct intel_output
*intel_output
,
433 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_CONTROL_BUS_SWITCH
, &target
, 1);
436 static bool intel_sdvo_set_target_input(struct intel_output
*intel_output
, bool target_0
, bool target_1
)
438 struct intel_sdvo_set_target_input_args targets
= {0};
441 if (target_0
&& target_1
)
442 return SDVO_CMD_STATUS_NOTSUPP
;
445 targets
.target_1
= 1;
447 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_TARGET_INPUT
, &targets
,
450 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
452 return (status
== SDVO_CMD_STATUS_SUCCESS
);
456 * Return whether each input is trained.
458 * This function is making an assumption about the layout of the response,
459 * which should be checked against the docs.
461 static bool intel_sdvo_get_trained_inputs(struct intel_output
*intel_output
, bool *input_1
, bool *input_2
)
463 struct intel_sdvo_get_trained_inputs_response response
;
466 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_TRAINED_INPUTS
, NULL
, 0);
467 status
= intel_sdvo_read_response(intel_output
, &response
, sizeof(response
));
468 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
471 *input_1
= response
.input0_trained
;
472 *input_2
= response
.input1_trained
;
476 static bool intel_sdvo_get_active_outputs(struct intel_output
*intel_output
,
481 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_OUTPUTS
, NULL
, 0);
482 status
= intel_sdvo_read_response(intel_output
, outputs
, sizeof(*outputs
));
484 return (status
== SDVO_CMD_STATUS_SUCCESS
);
487 static bool intel_sdvo_set_active_outputs(struct intel_output
*intel_output
,
492 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_OUTPUTS
, &outputs
,
494 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
495 return (status
== SDVO_CMD_STATUS_SUCCESS
);
498 static bool intel_sdvo_set_encoder_power_state(struct intel_output
*intel_output
,
501 u8 status
, state
= SDVO_ENCODER_STATE_ON
;
504 case DRM_MODE_DPMS_ON
:
505 state
= SDVO_ENCODER_STATE_ON
;
507 case DRM_MODE_DPMS_STANDBY
:
508 state
= SDVO_ENCODER_STATE_STANDBY
;
510 case DRM_MODE_DPMS_SUSPEND
:
511 state
= SDVO_ENCODER_STATE_SUSPEND
;
513 case DRM_MODE_DPMS_OFF
:
514 state
= SDVO_ENCODER_STATE_OFF
;
518 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ENCODER_POWER_STATE
, &state
,
520 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
522 return (status
== SDVO_CMD_STATUS_SUCCESS
);
525 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output
*intel_output
,
529 struct intel_sdvo_pixel_clock_range clocks
;
532 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE
,
535 status
= intel_sdvo_read_response(intel_output
, &clocks
, sizeof(clocks
));
537 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
540 /* Convert the values from units of 10 kHz to kHz. */
541 *clock_min
= clocks
.min
* 10;
542 *clock_max
= clocks
.max
* 10;
547 static bool intel_sdvo_set_target_output(struct intel_output
*intel_output
,
552 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_TARGET_OUTPUT
, &outputs
,
555 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
556 return (status
== SDVO_CMD_STATUS_SUCCESS
);
559 static bool intel_sdvo_get_timing(struct intel_output
*intel_output
, u8 cmd
,
560 struct intel_sdvo_dtd
*dtd
)
564 intel_sdvo_write_cmd(intel_output
, cmd
, NULL
, 0);
565 status
= intel_sdvo_read_response(intel_output
, &dtd
->part1
,
567 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
570 intel_sdvo_write_cmd(intel_output
, cmd
+ 1, NULL
, 0);
571 status
= intel_sdvo_read_response(intel_output
, &dtd
->part2
,
573 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
579 static bool intel_sdvo_get_input_timing(struct intel_output
*intel_output
,
580 struct intel_sdvo_dtd
*dtd
)
582 return intel_sdvo_get_timing(intel_output
,
583 SDVO_CMD_GET_INPUT_TIMINGS_PART1
, dtd
);
586 static bool intel_sdvo_get_output_timing(struct intel_output
*intel_output
,
587 struct intel_sdvo_dtd
*dtd
)
589 return intel_sdvo_get_timing(intel_output
,
590 SDVO_CMD_GET_OUTPUT_TIMINGS_PART1
, dtd
);
593 static bool intel_sdvo_set_timing(struct intel_output
*intel_output
, u8 cmd
,
594 struct intel_sdvo_dtd
*dtd
)
598 intel_sdvo_write_cmd(intel_output
, cmd
, &dtd
->part1
, sizeof(dtd
->part1
));
599 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
600 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
603 intel_sdvo_write_cmd(intel_output
, cmd
+ 1, &dtd
->part2
, sizeof(dtd
->part2
));
604 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
605 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
611 static bool intel_sdvo_set_input_timing(struct intel_output
*intel_output
,
612 struct intel_sdvo_dtd
*dtd
)
614 return intel_sdvo_set_timing(intel_output
,
615 SDVO_CMD_SET_INPUT_TIMINGS_PART1
, dtd
);
618 static bool intel_sdvo_set_output_timing(struct intel_output
*intel_output
,
619 struct intel_sdvo_dtd
*dtd
)
621 return intel_sdvo_set_timing(intel_output
,
622 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1
, dtd
);
626 intel_sdvo_create_preferred_input_timing(struct intel_output
*output
,
631 struct intel_sdvo_preferred_input_timing_args args
;
632 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
635 memset(&args
, 0, sizeof(args
));
638 args
.height
= height
;
641 if (sdvo_priv
->is_lvds
&&
642 (sdvo_priv
->sdvo_lvds_fixed_mode
->hdisplay
!= width
||
643 sdvo_priv
->sdvo_lvds_fixed_mode
->vdisplay
!= height
))
646 intel_sdvo_write_cmd(output
, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING
,
647 &args
, sizeof(args
));
648 status
= intel_sdvo_read_response(output
, NULL
, 0);
649 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
655 static bool intel_sdvo_get_preferred_input_timing(struct intel_output
*output
,
656 struct intel_sdvo_dtd
*dtd
)
660 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1
,
663 status
= intel_sdvo_read_response(output
, &dtd
->part1
,
665 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
668 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2
,
671 status
= intel_sdvo_read_response(output
, &dtd
->part2
,
673 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
679 static int intel_sdvo_get_clock_rate_mult(struct intel_output
*intel_output
)
683 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_CLOCK_RATE_MULT
, NULL
, 0);
684 status
= intel_sdvo_read_response(intel_output
, &response
, 1);
686 if (status
!= SDVO_CMD_STATUS_SUCCESS
) {
687 DRM_DEBUG("Couldn't get SDVO clock rate multiplier\n");
688 return SDVO_CLOCK_RATE_MULT_1X
;
690 DRM_DEBUG("Current clock rate multiplier: %d\n", response
);
696 static bool intel_sdvo_set_clock_rate_mult(struct intel_output
*intel_output
, u8 val
)
700 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_CLOCK_RATE_MULT
, &val
, 1);
701 status
= intel_sdvo_read_response(intel_output
, NULL
, 0);
702 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
708 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd
*dtd
,
709 struct drm_display_mode
*mode
)
711 uint16_t width
, height
;
712 uint16_t h_blank_len
, h_sync_len
, v_blank_len
, v_sync_len
;
713 uint16_t h_sync_offset
, v_sync_offset
;
715 width
= mode
->crtc_hdisplay
;
716 height
= mode
->crtc_vdisplay
;
718 /* do some mode translations */
719 h_blank_len
= mode
->crtc_hblank_end
- mode
->crtc_hblank_start
;
720 h_sync_len
= mode
->crtc_hsync_end
- mode
->crtc_hsync_start
;
722 v_blank_len
= mode
->crtc_vblank_end
- mode
->crtc_vblank_start
;
723 v_sync_len
= mode
->crtc_vsync_end
- mode
->crtc_vsync_start
;
725 h_sync_offset
= mode
->crtc_hsync_start
- mode
->crtc_hblank_start
;
726 v_sync_offset
= mode
->crtc_vsync_start
- mode
->crtc_vblank_start
;
728 dtd
->part1
.clock
= mode
->clock
/ 10;
729 dtd
->part1
.h_active
= width
& 0xff;
730 dtd
->part1
.h_blank
= h_blank_len
& 0xff;
731 dtd
->part1
.h_high
= (((width
>> 8) & 0xf) << 4) |
732 ((h_blank_len
>> 8) & 0xf);
733 dtd
->part1
.v_active
= height
& 0xff;
734 dtd
->part1
.v_blank
= v_blank_len
& 0xff;
735 dtd
->part1
.v_high
= (((height
>> 8) & 0xf) << 4) |
736 ((v_blank_len
>> 8) & 0xf);
738 dtd
->part2
.h_sync_off
= h_sync_offset
& 0xff;
739 dtd
->part2
.h_sync_width
= h_sync_len
& 0xff;
740 dtd
->part2
.v_sync_off_width
= (v_sync_offset
& 0xf) << 4 |
742 dtd
->part2
.sync_off_width_high
= ((h_sync_offset
& 0x300) >> 2) |
743 ((h_sync_len
& 0x300) >> 4) | ((v_sync_offset
& 0x30) >> 2) |
744 ((v_sync_len
& 0x30) >> 4);
746 dtd
->part2
.dtd_flags
= 0x18;
747 if (mode
->flags
& DRM_MODE_FLAG_PHSYNC
)
748 dtd
->part2
.dtd_flags
|= 0x2;
749 if (mode
->flags
& DRM_MODE_FLAG_PVSYNC
)
750 dtd
->part2
.dtd_flags
|= 0x4;
752 dtd
->part2
.sdvo_flags
= 0;
753 dtd
->part2
.v_sync_off_high
= v_sync_offset
& 0xc0;
754 dtd
->part2
.reserved
= 0;
757 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode
* mode
,
758 struct intel_sdvo_dtd
*dtd
)
760 mode
->hdisplay
= dtd
->part1
.h_active
;
761 mode
->hdisplay
+= ((dtd
->part1
.h_high
>> 4) & 0x0f) << 8;
762 mode
->hsync_start
= mode
->hdisplay
+ dtd
->part2
.h_sync_off
;
763 mode
->hsync_start
+= (dtd
->part2
.sync_off_width_high
& 0xc0) << 2;
764 mode
->hsync_end
= mode
->hsync_start
+ dtd
->part2
.h_sync_width
;
765 mode
->hsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x30) << 4;
766 mode
->htotal
= mode
->hdisplay
+ dtd
->part1
.h_blank
;
767 mode
->htotal
+= (dtd
->part1
.h_high
& 0xf) << 8;
769 mode
->vdisplay
= dtd
->part1
.v_active
;
770 mode
->vdisplay
+= ((dtd
->part1
.v_high
>> 4) & 0x0f) << 8;
771 mode
->vsync_start
= mode
->vdisplay
;
772 mode
->vsync_start
+= (dtd
->part2
.v_sync_off_width
>> 4) & 0xf;
773 mode
->vsync_start
+= (dtd
->part2
.sync_off_width_high
& 0x0c) << 2;
774 mode
->vsync_start
+= dtd
->part2
.v_sync_off_high
& 0xc0;
775 mode
->vsync_end
= mode
->vsync_start
+
776 (dtd
->part2
.v_sync_off_width
& 0xf);
777 mode
->vsync_end
+= (dtd
->part2
.sync_off_width_high
& 0x3) << 4;
778 mode
->vtotal
= mode
->vdisplay
+ dtd
->part1
.v_blank
;
779 mode
->vtotal
+= (dtd
->part1
.v_high
& 0xf) << 8;
781 mode
->clock
= dtd
->part1
.clock
* 10;
783 mode
->flags
&= ~(DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
);
784 if (dtd
->part2
.dtd_flags
& 0x2)
785 mode
->flags
|= DRM_MODE_FLAG_PHSYNC
;
786 if (dtd
->part2
.dtd_flags
& 0x4)
787 mode
->flags
|= DRM_MODE_FLAG_PVSYNC
;
790 static bool intel_sdvo_get_supp_encode(struct intel_output
*output
,
791 struct intel_sdvo_encode
*encode
)
795 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_SUPP_ENCODE
, NULL
, 0);
796 status
= intel_sdvo_read_response(output
, encode
, sizeof(*encode
));
797 if (status
!= SDVO_CMD_STATUS_SUCCESS
) { /* non-support means DVI */
798 memset(encode
, 0, sizeof(*encode
));
805 static bool intel_sdvo_set_encode(struct intel_output
*output
, uint8_t mode
)
809 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_ENCODE
, &mode
, 1);
810 status
= intel_sdvo_read_response(output
, NULL
, 0);
812 return (status
== SDVO_CMD_STATUS_SUCCESS
);
815 static bool intel_sdvo_set_colorimetry(struct intel_output
*output
,
820 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_COLORIMETRY
, &mode
, 1);
821 status
= intel_sdvo_read_response(output
, NULL
, 0);
823 return (status
== SDVO_CMD_STATUS_SUCCESS
);
827 static void intel_sdvo_dump_hdmi_buf(struct intel_output
*output
)
830 uint8_t set_buf_index
[2];
836 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_AV_SPLIT
, NULL
, 0);
837 intel_sdvo_read_response(output
, &av_split
, 1);
839 for (i
= 0; i
<= av_split
; i
++) {
840 set_buf_index
[0] = i
; set_buf_index
[1] = 0;
841 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_INDEX
,
843 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_INFO
, NULL
, 0);
844 intel_sdvo_read_response(output
, &buf_size
, 1);
847 for (j
= 0; j
<= buf_size
; j
+= 8) {
848 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_HBUF_DATA
,
850 intel_sdvo_read_response(output
, pos
, 8);
857 static void intel_sdvo_set_hdmi_buf(struct intel_output
*output
, int index
,
858 uint8_t *data
, int8_t size
, uint8_t tx_rate
)
860 uint8_t set_buf_index
[2];
862 set_buf_index
[0] = index
;
863 set_buf_index
[1] = 0;
865 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_INDEX
, set_buf_index
, 2);
867 for (; size
> 0; size
-= 8) {
868 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_DATA
, data
, 8);
872 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_HBUF_TXRATE
, &tx_rate
, 1);
875 static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data
, uint8_t size
)
880 for (i
= 0; i
< size
; i
++)
886 #define DIP_TYPE_AVI 0x82
887 #define DIP_VERSION_AVI 0x2
888 #define DIP_LEN_AVI 13
890 struct dip_infoframe
{
918 /* Packet Byte #6~13 */
919 uint16_t top_bar_end
;
920 uint16_t bottom_bar_start
;
921 uint16_t left_bar_end
;
922 uint16_t right_bar_start
;
926 uint8_t channel_count
:3;
928 uint8_t coding_type
:4;
930 uint8_t sample_size
:2; /* SS0, SS1 */
931 uint8_t sample_frequency
:3;
934 uint8_t coding_type_private
:5;
937 uint8_t channel_allocation
;
940 uint8_t level_shift
:4;
941 uint8_t downmix_inhibit
:1;
944 } __attribute__ ((packed
)) u
;
945 } __attribute__((packed
));
947 static void intel_sdvo_set_avi_infoframe(struct intel_output
*output
,
948 struct drm_display_mode
* mode
)
950 struct dip_infoframe avi_if
= {
951 .type
= DIP_TYPE_AVI
,
952 .version
= DIP_VERSION_AVI
,
956 avi_if
.checksum
= intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if
,
958 intel_sdvo_set_hdmi_buf(output
, 1, (uint8_t *)&avi_if
, 4 + avi_if
.len
,
962 static void intel_sdvo_set_tv_format(struct intel_output
*output
)
965 struct intel_sdvo_tv_format format
;
966 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
967 uint32_t format_map
, i
;
970 for (i
= 0; i
< TV_FORMAT_NUM
; i
++)
971 if (tv_format_names
[i
] == sdvo_priv
->tv_format_name
)
975 memset(&format
, 0, sizeof(format
));
976 memcpy(&format
, &format_map
, sizeof(format_map
) > sizeof(format
) ?
977 sizeof(format
) : sizeof(format_map
));
979 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_TV_FORMAT
, &format_map
,
982 status
= intel_sdvo_read_response(output
, NULL
, 0);
983 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
984 DRM_DEBUG("%s: Failed to set TV format\n",
985 SDVO_NAME(sdvo_priv
));
988 static bool intel_sdvo_mode_fixup(struct drm_encoder
*encoder
,
989 struct drm_display_mode
*mode
,
990 struct drm_display_mode
*adjusted_mode
)
992 struct intel_output
*output
= enc_to_intel_output(encoder
);
993 struct intel_sdvo_priv
*dev_priv
= output
->dev_priv
;
995 if (dev_priv
->is_tv
) {
996 struct intel_sdvo_dtd output_dtd
;
999 /* We need to construct preferred input timings based on our
1000 * output timings. To do that, we have to set the output
1001 * timings, even though this isn't really the right place in
1002 * the sequence to do it. Oh well.
1006 /* Set output timings */
1007 intel_sdvo_get_dtd_from_mode(&output_dtd
, mode
);
1008 intel_sdvo_set_target_output(output
,
1009 dev_priv
->controlled_output
);
1010 intel_sdvo_set_output_timing(output
, &output_dtd
);
1012 /* Set the input timing to the screen. Assume always input 0. */
1013 intel_sdvo_set_target_input(output
, true, false);
1016 success
= intel_sdvo_create_preferred_input_timing(output
,
1021 struct intel_sdvo_dtd input_dtd
;
1023 intel_sdvo_get_preferred_input_timing(output
,
1025 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1026 dev_priv
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1028 drm_mode_set_crtcinfo(adjusted_mode
, 0);
1030 mode
->clock
= adjusted_mode
->clock
;
1032 adjusted_mode
->clock
*=
1033 intel_sdvo_get_pixel_multiplier(mode
);
1037 } else if (dev_priv
->is_lvds
) {
1038 struct intel_sdvo_dtd output_dtd
;
1041 drm_mode_set_crtcinfo(dev_priv
->sdvo_lvds_fixed_mode
, 0);
1042 /* Set output timings */
1043 intel_sdvo_get_dtd_from_mode(&output_dtd
,
1044 dev_priv
->sdvo_lvds_fixed_mode
);
1046 intel_sdvo_set_target_output(output
,
1047 dev_priv
->controlled_output
);
1048 intel_sdvo_set_output_timing(output
, &output_dtd
);
1050 /* Set the input timing to the screen. Assume always input 0. */
1051 intel_sdvo_set_target_input(output
, true, false);
1054 success
= intel_sdvo_create_preferred_input_timing(
1061 struct intel_sdvo_dtd input_dtd
;
1063 intel_sdvo_get_preferred_input_timing(output
,
1065 intel_sdvo_get_mode_from_dtd(adjusted_mode
, &input_dtd
);
1066 dev_priv
->sdvo_flags
= input_dtd
.part2
.sdvo_flags
;
1068 drm_mode_set_crtcinfo(adjusted_mode
, 0);
1070 mode
->clock
= adjusted_mode
->clock
;
1072 adjusted_mode
->clock
*=
1073 intel_sdvo_get_pixel_multiplier(mode
);
1079 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1080 * SDVO device will be told of the multiplier during mode_set.
1082 adjusted_mode
->clock
*= intel_sdvo_get_pixel_multiplier(mode
);
1087 static void intel_sdvo_mode_set(struct drm_encoder
*encoder
,
1088 struct drm_display_mode
*mode
,
1089 struct drm_display_mode
*adjusted_mode
)
1091 struct drm_device
*dev
= encoder
->dev
;
1092 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1093 struct drm_crtc
*crtc
= encoder
->crtc
;
1094 struct intel_crtc
*intel_crtc
= to_intel_crtc(crtc
);
1095 struct intel_output
*output
= enc_to_intel_output(encoder
);
1096 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1098 int sdvo_pixel_multiply
;
1099 struct intel_sdvo_in_out_map in_out
;
1100 struct intel_sdvo_dtd input_dtd
;
1106 /* First, set the input mapping for the first input to our controlled
1107 * output. This is only correct if we're a single-input device, in
1108 * which case the first input is the output from the appropriate SDVO
1109 * channel on the motherboard. In a two-input device, the first input
1110 * will be SDVOB and the second SDVOC.
1112 in_out
.in0
= sdvo_priv
->controlled_output
;
1115 intel_sdvo_write_cmd(output
, SDVO_CMD_SET_IN_OUT_MAP
,
1116 &in_out
, sizeof(in_out
));
1117 status
= intel_sdvo_read_response(output
, NULL
, 0);
1119 if (sdvo_priv
->is_hdmi
) {
1120 intel_sdvo_set_avi_infoframe(output
, mode
);
1121 sdvox
|= SDVO_AUDIO_ENABLE
;
1124 /* We have tried to get input timing in mode_fixup, and filled into
1126 if (sdvo_priv
->is_tv
|| sdvo_priv
->is_lvds
) {
1127 intel_sdvo_get_dtd_from_mode(&input_dtd
, adjusted_mode
);
1128 input_dtd
.part2
.sdvo_flags
= sdvo_priv
->sdvo_flags
;
1130 intel_sdvo_get_dtd_from_mode(&input_dtd
, mode
);
1132 /* If it's a TV, we already set the output timing in mode_fixup.
1133 * Otherwise, the output timing is equal to the input timing.
1135 if (!sdvo_priv
->is_tv
&& !sdvo_priv
->is_lvds
) {
1136 /* Set the output timing to the screen */
1137 intel_sdvo_set_target_output(output
,
1138 sdvo_priv
->controlled_output
);
1139 intel_sdvo_set_output_timing(output
, &input_dtd
);
1142 /* Set the input timing to the screen. Assume always input 0. */
1143 intel_sdvo_set_target_input(output
, true, false);
1145 if (sdvo_priv
->is_tv
)
1146 intel_sdvo_set_tv_format(output
);
1148 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1149 * provide the device with a timing it can support, if it supports that
1150 * feature. However, presumably we would need to adjust the CRTC to
1151 * output the preferred timing, and we don't support that currently.
1154 success
= intel_sdvo_create_preferred_input_timing(output
, clock
,
1157 struct intel_sdvo_dtd
*input_dtd
;
1159 intel_sdvo_get_preferred_input_timing(output
, &input_dtd
);
1160 intel_sdvo_set_input_timing(output
, &input_dtd
);
1163 intel_sdvo_set_input_timing(output
, &input_dtd
);
1166 switch (intel_sdvo_get_pixel_multiplier(mode
)) {
1168 intel_sdvo_set_clock_rate_mult(output
,
1169 SDVO_CLOCK_RATE_MULT_1X
);
1172 intel_sdvo_set_clock_rate_mult(output
,
1173 SDVO_CLOCK_RATE_MULT_2X
);
1176 intel_sdvo_set_clock_rate_mult(output
,
1177 SDVO_CLOCK_RATE_MULT_4X
);
1181 /* Set the SDVO control regs. */
1182 if (IS_I965G(dev
)) {
1183 sdvox
|= SDVO_BORDER_ENABLE
|
1184 SDVO_VSYNC_ACTIVE_HIGH
|
1185 SDVO_HSYNC_ACTIVE_HIGH
;
1187 sdvox
|= I915_READ(sdvo_priv
->output_device
);
1188 switch (sdvo_priv
->output_device
) {
1190 sdvox
&= SDVOB_PRESERVE_MASK
;
1193 sdvox
&= SDVOC_PRESERVE_MASK
;
1196 sdvox
|= (9 << 19) | SDVO_BORDER_ENABLE
;
1198 if (intel_crtc
->pipe
== 1)
1199 sdvox
|= SDVO_PIPE_B_SELECT
;
1201 sdvo_pixel_multiply
= intel_sdvo_get_pixel_multiplier(mode
);
1202 if (IS_I965G(dev
)) {
1203 /* done in crtc_mode_set as the dpll_md reg must be written early */
1204 } else if (IS_I945G(dev
) || IS_I945GM(dev
) || IS_G33(dev
)) {
1205 /* done in crtc_mode_set as it lives inside the dpll register */
1207 sdvox
|= (sdvo_pixel_multiply
- 1) << SDVO_PORT_MULTIPLY_SHIFT
;
1210 if (sdvo_priv
->sdvo_flags
& SDVO_NEED_TO_STALL
)
1211 sdvox
|= SDVO_STALL_SELECT
;
1212 intel_sdvo_write_sdvox(output
, sdvox
);
1215 static void intel_sdvo_dpms(struct drm_encoder
*encoder
, int mode
)
1217 struct drm_device
*dev
= encoder
->dev
;
1218 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1219 struct intel_output
*intel_output
= enc_to_intel_output(encoder
);
1220 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1223 if (mode
!= DRM_MODE_DPMS_ON
) {
1224 intel_sdvo_set_active_outputs(intel_output
, 0);
1226 intel_sdvo_set_encoder_power_state(intel_output
, mode
);
1228 if (mode
== DRM_MODE_DPMS_OFF
) {
1229 temp
= I915_READ(sdvo_priv
->output_device
);
1230 if ((temp
& SDVO_ENABLE
) != 0) {
1231 intel_sdvo_write_sdvox(intel_output
, temp
& ~SDVO_ENABLE
);
1235 bool input1
, input2
;
1239 temp
= I915_READ(sdvo_priv
->output_device
);
1240 if ((temp
& SDVO_ENABLE
) == 0)
1241 intel_sdvo_write_sdvox(intel_output
, temp
| SDVO_ENABLE
);
1242 for (i
= 0; i
< 2; i
++)
1243 intel_wait_for_vblank(dev
);
1245 status
= intel_sdvo_get_trained_inputs(intel_output
, &input1
,
1249 /* Warn if the device reported failure to sync.
1250 * A lot of SDVO devices fail to notify of sync, but it's
1251 * a given it the status is a success, we succeeded.
1253 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
) {
1254 DRM_DEBUG("First %s output reported failure to sync\n",
1255 SDVO_NAME(sdvo_priv
));
1259 intel_sdvo_set_encoder_power_state(intel_output
, mode
);
1260 intel_sdvo_set_active_outputs(intel_output
, sdvo_priv
->controlled_output
);
1265 static void intel_sdvo_save(struct drm_connector
*connector
)
1267 struct drm_device
*dev
= connector
->dev
;
1268 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
1269 struct intel_output
*intel_output
= to_intel_output(connector
);
1270 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1273 sdvo_priv
->save_sdvo_mult
= intel_sdvo_get_clock_rate_mult(intel_output
);
1274 intel_sdvo_get_active_outputs(intel_output
, &sdvo_priv
->save_active_outputs
);
1276 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) {
1277 intel_sdvo_set_target_input(intel_output
, true, false);
1278 intel_sdvo_get_input_timing(intel_output
,
1279 &sdvo_priv
->save_input_dtd_1
);
1282 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) {
1283 intel_sdvo_set_target_input(intel_output
, false, true);
1284 intel_sdvo_get_input_timing(intel_output
,
1285 &sdvo_priv
->save_input_dtd_2
);
1288 for (o
= SDVO_OUTPUT_FIRST
; o
<= SDVO_OUTPUT_LAST
; o
++)
1290 u16 this_output
= (1 << o
);
1291 if (sdvo_priv
->caps
.output_flags
& this_output
)
1293 intel_sdvo_set_target_output(intel_output
, this_output
);
1294 intel_sdvo_get_output_timing(intel_output
,
1295 &sdvo_priv
->save_output_dtd
[o
]);
1298 if (sdvo_priv
->is_tv
) {
1299 /* XXX: Save TV format/enhancements. */
1302 sdvo_priv
->save_SDVOX
= I915_READ(sdvo_priv
->output_device
);
1305 static void intel_sdvo_restore(struct drm_connector
*connector
)
1307 struct drm_device
*dev
= connector
->dev
;
1308 struct intel_output
*intel_output
= to_intel_output(connector
);
1309 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1312 bool input1
, input2
;
1315 intel_sdvo_set_active_outputs(intel_output
, 0);
1317 for (o
= SDVO_OUTPUT_FIRST
; o
<= SDVO_OUTPUT_LAST
; o
++)
1319 u16 this_output
= (1 << o
);
1320 if (sdvo_priv
->caps
.output_flags
& this_output
) {
1321 intel_sdvo_set_target_output(intel_output
, this_output
);
1322 intel_sdvo_set_output_timing(intel_output
, &sdvo_priv
->save_output_dtd
[o
]);
1326 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) {
1327 intel_sdvo_set_target_input(intel_output
, true, false);
1328 intel_sdvo_set_input_timing(intel_output
, &sdvo_priv
->save_input_dtd_1
);
1331 if (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) {
1332 intel_sdvo_set_target_input(intel_output
, false, true);
1333 intel_sdvo_set_input_timing(intel_output
, &sdvo_priv
->save_input_dtd_2
);
1336 intel_sdvo_set_clock_rate_mult(intel_output
, sdvo_priv
->save_sdvo_mult
);
1338 if (sdvo_priv
->is_tv
) {
1339 /* XXX: Restore TV format/enhancements. */
1342 intel_sdvo_write_sdvox(intel_output
, sdvo_priv
->save_SDVOX
);
1344 if (sdvo_priv
->save_SDVOX
& SDVO_ENABLE
)
1346 for (i
= 0; i
< 2; i
++)
1347 intel_wait_for_vblank(dev
);
1348 status
= intel_sdvo_get_trained_inputs(intel_output
, &input1
, &input2
);
1349 if (status
== SDVO_CMD_STATUS_SUCCESS
&& !input1
)
1350 DRM_DEBUG("First %s output reported failure to sync\n",
1351 SDVO_NAME(sdvo_priv
));
1354 intel_sdvo_set_active_outputs(intel_output
, sdvo_priv
->save_active_outputs
);
1357 static int intel_sdvo_mode_valid(struct drm_connector
*connector
,
1358 struct drm_display_mode
*mode
)
1360 struct intel_output
*intel_output
= to_intel_output(connector
);
1361 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1363 if (mode
->flags
& DRM_MODE_FLAG_DBLSCAN
)
1364 return MODE_NO_DBLESCAN
;
1366 if (sdvo_priv
->pixel_clock_min
> mode
->clock
)
1367 return MODE_CLOCK_LOW
;
1369 if (sdvo_priv
->pixel_clock_max
< mode
->clock
)
1370 return MODE_CLOCK_HIGH
;
1372 if (sdvo_priv
->is_lvds
== true) {
1373 if (sdvo_priv
->sdvo_lvds_fixed_mode
== NULL
)
1376 if (mode
->hdisplay
> sdvo_priv
->sdvo_lvds_fixed_mode
->hdisplay
)
1379 if (mode
->vdisplay
> sdvo_priv
->sdvo_lvds_fixed_mode
->vdisplay
)
1386 static bool intel_sdvo_get_capabilities(struct intel_output
*intel_output
, struct intel_sdvo_caps
*caps
)
1390 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_DEVICE_CAPS
, NULL
, 0);
1391 status
= intel_sdvo_read_response(intel_output
, caps
, sizeof(*caps
));
1392 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1398 struct drm_connector
* intel_sdvo_find(struct drm_device
*dev
, int sdvoB
)
1400 struct drm_connector
*connector
= NULL
;
1401 struct intel_output
*iout
= NULL
;
1402 struct intel_sdvo_priv
*sdvo
;
1404 /* find the sdvo connector */
1405 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1406 iout
= to_intel_output(connector
);
1408 if (iout
->type
!= INTEL_OUTPUT_SDVO
)
1411 sdvo
= iout
->dev_priv
;
1413 if (sdvo
->output_device
== SDVOB
&& sdvoB
)
1416 if (sdvo
->output_device
== SDVOC
&& !sdvoB
)
1424 int intel_sdvo_supports_hotplug(struct drm_connector
*connector
)
1428 struct intel_output
*intel_output
;
1434 intel_output
= to_intel_output(connector
);
1436 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1437 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1439 if (response
[0] !=0)
1445 void intel_sdvo_set_hotplug(struct drm_connector
*connector
, int on
)
1449 struct intel_output
*intel_output
= to_intel_output(connector
);
1451 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1452 intel_sdvo_read_response(intel_output
, &response
, 2);
1455 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_HOT_PLUG_SUPPORT
, NULL
, 0);
1456 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1458 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1462 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_SET_ACTIVE_HOT_PLUG
, &response
, 2);
1465 intel_sdvo_write_cmd(intel_output
, SDVO_CMD_GET_ACTIVE_HOT_PLUG
, NULL
, 0);
1466 intel_sdvo_read_response(intel_output
, &response
, 2);
1470 intel_sdvo_multifunc_encoder(struct intel_output
*intel_output
)
1472 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1475 if (sdvo_priv
->caps
.output_flags
&
1476 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
))
1478 if (sdvo_priv
->caps
.output_flags
&
1479 (SDVO_OUTPUT_RGB0
| SDVO_OUTPUT_RGB1
))
1481 if (sdvo_priv
->caps
.output_flags
&
1482 (SDVO_OUTPUT_SVID0
| SDVO_OUTPUT_SVID1
))
1484 if (sdvo_priv
->caps
.output_flags
&
1485 (SDVO_OUTPUT_CVBS0
| SDVO_OUTPUT_CVBS1
))
1487 if (sdvo_priv
->caps
.output_flags
&
1488 (SDVO_OUTPUT_YPRPB0
| SDVO_OUTPUT_YPRPB1
))
1491 if (sdvo_priv
->caps
.output_flags
&
1492 (SDVO_OUTPUT_SCART0
| SDVO_OUTPUT_SCART1
))
1495 if (sdvo_priv
->caps
.output_flags
&
1496 (SDVO_OUTPUT_LVDS0
| SDVO_OUTPUT_LVDS1
))
1502 static struct drm_connector
*
1503 intel_find_analog_connector(struct drm_device
*dev
)
1505 struct drm_connector
*connector
;
1506 struct intel_output
*intel_output
;
1508 list_for_each_entry(connector
, &dev
->mode_config
.connector_list
, head
) {
1509 intel_output
= to_intel_output(connector
);
1510 if (intel_output
->type
== INTEL_OUTPUT_ANALOG
)
1517 intel_analog_is_connected(struct drm_device
*dev
)
1519 struct drm_connector
*analog_connector
;
1520 analog_connector
= intel_find_analog_connector(dev
);
1522 if (!analog_connector
)
1525 if (analog_connector
->funcs
->detect(analog_connector
) ==
1526 connector_status_disconnected
)
1532 enum drm_connector_status
1533 intel_sdvo_hdmi_sink_detect(struct drm_connector
*connector
, u16 response
)
1535 struct intel_output
*intel_output
= to_intel_output(connector
);
1536 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1537 enum drm_connector_status status
= connector_status_connected
;
1538 struct edid
*edid
= NULL
;
1540 edid
= drm_get_edid(&intel_output
->base
,
1541 intel_output
->ddc_bus
);
1543 /* when there is no edid and no monitor is connected with VGA
1544 * port, try to use the CRT ddc to read the EDID for DVI-connector
1547 sdvo_priv
->analog_ddc_bus
&&
1548 !intel_analog_is_connected(intel_output
->base
.dev
))
1549 edid
= drm_get_edid(&intel_output
->base
,
1550 sdvo_priv
->analog_ddc_bus
);
1552 /* Don't report the output as connected if it's a DVI-I
1553 * connector with a non-digital EDID coming out.
1555 if (response
& (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
)) {
1556 if (edid
->input
& DRM_EDID_INPUT_DIGITAL
)
1557 sdvo_priv
->is_hdmi
=
1558 drm_detect_hdmi_monitor(edid
);
1560 status
= connector_status_disconnected
;
1564 intel_output
->base
.display_info
.raw_edid
= NULL
;
1566 } else if (response
& (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
))
1567 status
= connector_status_disconnected
;
1572 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector
*connector
)
1576 struct intel_output
*intel_output
= to_intel_output(connector
);
1577 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1579 intel_sdvo_write_cmd(intel_output
,
1580 SDVO_CMD_GET_ATTACHED_DISPLAYS
, NULL
, 0);
1581 status
= intel_sdvo_read_response(intel_output
, &response
, 2);
1583 DRM_DEBUG("SDVO response %d %d\n", response
& 0xff, response
>> 8);
1585 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1586 return connector_status_unknown
;
1589 return connector_status_disconnected
;
1591 if (intel_sdvo_multifunc_encoder(intel_output
) &&
1592 sdvo_priv
->attached_output
!= response
) {
1593 if (sdvo_priv
->controlled_output
!= response
&&
1594 intel_sdvo_output_setup(intel_output
, response
) != true)
1595 return connector_status_unknown
;
1596 sdvo_priv
->attached_output
= response
;
1598 return intel_sdvo_hdmi_sink_detect(connector
, response
);
1601 static void intel_sdvo_get_ddc_modes(struct drm_connector
*connector
)
1603 struct intel_output
*intel_output
= to_intel_output(connector
);
1604 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1607 /* set the bus switch and get the modes */
1608 num_modes
= intel_ddc_get_modes(intel_output
);
1611 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1612 * link between analog and digital outputs. So, if the regular SDVO
1613 * DDC fails, check to see if the analog output is disconnected, in
1614 * which case we'll look there for the digital DDC data.
1616 if (num_modes
== 0 &&
1617 sdvo_priv
->analog_ddc_bus
&&
1618 !intel_analog_is_connected(intel_output
->base
.dev
)) {
1619 struct i2c_adapter
*digital_ddc_bus
;
1621 /* Switch to the analog ddc bus and try that
1623 digital_ddc_bus
= intel_output
->ddc_bus
;
1624 intel_output
->ddc_bus
= sdvo_priv
->analog_ddc_bus
;
1626 (void) intel_ddc_get_modes(intel_output
);
1628 intel_output
->ddc_bus
= digital_ddc_bus
;
1633 * Set of SDVO TV modes.
1634 * Note! This is in reply order (see loop in get_tv_modes).
1635 * XXX: all 60Hz refresh?
1637 struct drm_display_mode sdvo_tv_modes
[] = {
1638 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER
, 5815, 320, 321, 384,
1639 416, 0, 200, 201, 232, 233, 0,
1640 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1641 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER
, 6814, 320, 321, 384,
1642 416, 0, 240, 241, 272, 273, 0,
1643 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1644 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER
, 9910, 400, 401, 464,
1645 496, 0, 300, 301, 332, 333, 0,
1646 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1647 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER
, 16913, 640, 641, 704,
1648 736, 0, 350, 351, 382, 383, 0,
1649 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1650 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER
, 19121, 640, 641, 704,
1651 736, 0, 400, 401, 432, 433, 0,
1652 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1653 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER
, 22654, 640, 641, 704,
1654 736, 0, 480, 481, 512, 513, 0,
1655 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1656 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER
, 24624, 704, 705, 768,
1657 800, 0, 480, 481, 512, 513, 0,
1658 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1659 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER
, 29232, 704, 705, 768,
1660 800, 0, 576, 577, 608, 609, 0,
1661 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1662 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER
, 18751, 720, 721, 784,
1663 816, 0, 350, 351, 382, 383, 0,
1664 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1665 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER
, 21199, 720, 721, 784,
1666 816, 0, 400, 401, 432, 433, 0,
1667 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1668 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER
, 25116, 720, 721, 784,
1669 816, 0, 480, 481, 512, 513, 0,
1670 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1671 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER
, 28054, 720, 721, 784,
1672 816, 0, 540, 541, 572, 573, 0,
1673 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1674 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER
, 29816, 720, 721, 784,
1675 816, 0, 576, 577, 608, 609, 0,
1676 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1677 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER
, 31570, 768, 769, 832,
1678 864, 0, 576, 577, 608, 609, 0,
1679 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1680 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER
, 34030, 800, 801, 864,
1681 896, 0, 600, 601, 632, 633, 0,
1682 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1683 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER
, 36581, 832, 833, 896,
1684 928, 0, 624, 625, 656, 657, 0,
1685 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1686 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER
, 48707, 920, 921, 984,
1687 1016, 0, 766, 767, 798, 799, 0,
1688 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1689 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER
, 53827, 1024, 1025, 1088,
1690 1120, 0, 768, 769, 800, 801, 0,
1691 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1692 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER
, 87265, 1280, 1281, 1344,
1693 1376, 0, 1024, 1025, 1056, 1057, 0,
1694 DRM_MODE_FLAG_PHSYNC
| DRM_MODE_FLAG_PVSYNC
) },
1697 static void intel_sdvo_get_tv_modes(struct drm_connector
*connector
)
1699 struct intel_output
*output
= to_intel_output(connector
);
1700 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1701 struct intel_sdvo_sdtv_resolution_request tv_res
;
1702 uint32_t reply
= 0, format_map
= 0;
1707 /* Read the list of supported input resolutions for the selected TV
1710 for (i
= 0; i
< TV_FORMAT_NUM
; i
++)
1711 if (tv_format_names
[i
] == sdvo_priv
->tv_format_name
)
1714 format_map
= (1 << i
);
1715 memcpy(&tv_res
, &format_map
,
1716 sizeof(struct intel_sdvo_sdtv_resolution_request
) >
1717 sizeof(format_map
) ? sizeof(format_map
) :
1718 sizeof(struct intel_sdvo_sdtv_resolution_request
));
1720 intel_sdvo_set_target_output(output
, sdvo_priv
->controlled_output
);
1722 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT
,
1723 &tv_res
, sizeof(tv_res
));
1724 status
= intel_sdvo_read_response(output
, &reply
, 3);
1725 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1728 for (i
= 0; i
< ARRAY_SIZE(sdvo_tv_modes
); i
++)
1729 if (reply
& (1 << i
)) {
1730 struct drm_display_mode
*nmode
;
1731 nmode
= drm_mode_duplicate(connector
->dev
,
1734 drm_mode_probed_add(connector
, nmode
);
1739 static void intel_sdvo_get_lvds_modes(struct drm_connector
*connector
)
1741 struct intel_output
*intel_output
= to_intel_output(connector
);
1742 struct drm_i915_private
*dev_priv
= connector
->dev
->dev_private
;
1743 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1744 struct drm_display_mode
*newmode
;
1747 * Attempt to get the mode list from DDC.
1748 * Assume that the preferred modes are
1749 * arranged in priority order.
1751 intel_ddc_get_modes(intel_output
);
1752 if (list_empty(&connector
->probed_modes
) == false)
1755 /* Fetch modes from VBT */
1756 if (dev_priv
->sdvo_lvds_vbt_mode
!= NULL
) {
1757 newmode
= drm_mode_duplicate(connector
->dev
,
1758 dev_priv
->sdvo_lvds_vbt_mode
);
1759 if (newmode
!= NULL
) {
1760 /* Guarantee the mode is preferred */
1761 newmode
->type
= (DRM_MODE_TYPE_PREFERRED
|
1762 DRM_MODE_TYPE_DRIVER
);
1763 drm_mode_probed_add(connector
, newmode
);
1768 list_for_each_entry(newmode
, &connector
->probed_modes
, head
) {
1769 if (newmode
->type
& DRM_MODE_TYPE_PREFERRED
) {
1770 sdvo_priv
->sdvo_lvds_fixed_mode
=
1771 drm_mode_duplicate(connector
->dev
, newmode
);
1778 static int intel_sdvo_get_modes(struct drm_connector
*connector
)
1780 struct intel_output
*output
= to_intel_output(connector
);
1781 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1783 if (sdvo_priv
->is_tv
)
1784 intel_sdvo_get_tv_modes(connector
);
1785 else if (sdvo_priv
->is_lvds
== true)
1786 intel_sdvo_get_lvds_modes(connector
);
1788 intel_sdvo_get_ddc_modes(connector
);
1790 if (list_empty(&connector
->probed_modes
))
1795 static void intel_sdvo_destroy(struct drm_connector
*connector
)
1797 struct intel_output
*intel_output
= to_intel_output(connector
);
1798 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1800 if (intel_output
->i2c_bus
)
1801 intel_i2c_destroy(intel_output
->i2c_bus
);
1802 if (intel_output
->ddc_bus
)
1803 intel_i2c_destroy(intel_output
->ddc_bus
);
1804 if (sdvo_priv
->analog_ddc_bus
)
1805 intel_i2c_destroy(sdvo_priv
->analog_ddc_bus
);
1807 if (sdvo_priv
->sdvo_lvds_fixed_mode
!= NULL
)
1808 drm_mode_destroy(connector
->dev
,
1809 sdvo_priv
->sdvo_lvds_fixed_mode
);
1811 if (sdvo_priv
->tv_format_property
)
1812 drm_property_destroy(connector
->dev
,
1813 sdvo_priv
->tv_format_property
);
1815 drm_sysfs_connector_remove(connector
);
1816 drm_connector_cleanup(connector
);
1818 kfree(intel_output
);
1822 intel_sdvo_set_property(struct drm_connector
*connector
,
1823 struct drm_property
*property
,
1826 struct intel_output
*intel_output
= to_intel_output(connector
);
1827 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
1828 struct drm_encoder
*encoder
= &intel_output
->enc
;
1829 struct drm_crtc
*crtc
= encoder
->crtc
;
1831 bool changed
= false;
1833 ret
= drm_connector_property_set_value(connector
, property
, val
);
1837 if (property
== sdvo_priv
->tv_format_property
) {
1838 if (val
>= TV_FORMAT_NUM
) {
1842 if (sdvo_priv
->tv_format_name
==
1843 sdvo_priv
->tv_format_supported
[val
])
1846 sdvo_priv
->tv_format_name
= sdvo_priv
->tv_format_supported
[val
];
1853 if (changed
&& crtc
)
1854 drm_crtc_helper_set_mode(crtc
, &crtc
->mode
, crtc
->x
,
1860 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs
= {
1861 .dpms
= intel_sdvo_dpms
,
1862 .mode_fixup
= intel_sdvo_mode_fixup
,
1863 .prepare
= intel_encoder_prepare
,
1864 .mode_set
= intel_sdvo_mode_set
,
1865 .commit
= intel_encoder_commit
,
1868 static const struct drm_connector_funcs intel_sdvo_connector_funcs
= {
1869 .dpms
= drm_helper_connector_dpms
,
1870 .save
= intel_sdvo_save
,
1871 .restore
= intel_sdvo_restore
,
1872 .detect
= intel_sdvo_detect
,
1873 .fill_modes
= drm_helper_probe_single_connector_modes
,
1874 .set_property
= intel_sdvo_set_property
,
1875 .destroy
= intel_sdvo_destroy
,
1878 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs
= {
1879 .get_modes
= intel_sdvo_get_modes
,
1880 .mode_valid
= intel_sdvo_mode_valid
,
1881 .best_encoder
= intel_best_encoder
,
1884 static void intel_sdvo_enc_destroy(struct drm_encoder
*encoder
)
1886 drm_encoder_cleanup(encoder
);
1889 static const struct drm_encoder_funcs intel_sdvo_enc_funcs
= {
1890 .destroy
= intel_sdvo_enc_destroy
,
1895 * Choose the appropriate DDC bus for control bus switch command for this
1896 * SDVO output based on the controlled output.
1898 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1899 * outputs, then LVDS outputs.
1902 intel_sdvo_select_ddc_bus(struct intel_sdvo_priv
*dev_priv
)
1905 unsigned int num_bits
;
1907 /* Make a mask of outputs less than or equal to our own priority in the
1910 switch (dev_priv
->controlled_output
) {
1911 case SDVO_OUTPUT_LVDS1
:
1912 mask
|= SDVO_OUTPUT_LVDS1
;
1913 case SDVO_OUTPUT_LVDS0
:
1914 mask
|= SDVO_OUTPUT_LVDS0
;
1915 case SDVO_OUTPUT_TMDS1
:
1916 mask
|= SDVO_OUTPUT_TMDS1
;
1917 case SDVO_OUTPUT_TMDS0
:
1918 mask
|= SDVO_OUTPUT_TMDS0
;
1919 case SDVO_OUTPUT_RGB1
:
1920 mask
|= SDVO_OUTPUT_RGB1
;
1921 case SDVO_OUTPUT_RGB0
:
1922 mask
|= SDVO_OUTPUT_RGB0
;
1926 /* Count bits to find what number we are in the priority list. */
1927 mask
&= dev_priv
->caps
.output_flags
;
1928 num_bits
= hweight16(mask
);
1930 /* if more than 3 outputs, default to DDC bus 3 for now */
1934 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1935 dev_priv
->ddc_bus
= 1 << num_bits
;
1939 intel_sdvo_get_digital_encoding_mode(struct intel_output
*output
)
1941 struct intel_sdvo_priv
*sdvo_priv
= output
->dev_priv
;
1944 intel_sdvo_set_target_output(output
, sdvo_priv
->controlled_output
);
1946 intel_sdvo_write_cmd(output
, SDVO_CMD_GET_ENCODE
, NULL
, 0);
1947 status
= intel_sdvo_read_response(output
, &sdvo_priv
->is_hdmi
, 1);
1948 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
1953 static struct intel_output
*
1954 intel_sdvo_chan_to_intel_output(struct intel_i2c_chan
*chan
)
1956 struct drm_device
*dev
= chan
->drm_dev
;
1957 struct drm_connector
*connector
;
1958 struct intel_output
*intel_output
= NULL
;
1960 list_for_each_entry(connector
,
1961 &dev
->mode_config
.connector_list
, head
) {
1962 if (to_intel_output(connector
)->ddc_bus
== &chan
->adapter
) {
1963 intel_output
= to_intel_output(connector
);
1967 return intel_output
;
1970 static int intel_sdvo_master_xfer(struct i2c_adapter
*i2c_adap
,
1971 struct i2c_msg msgs
[], int num
)
1973 struct intel_output
*intel_output
;
1974 struct intel_sdvo_priv
*sdvo_priv
;
1975 struct i2c_algo_bit_data
*algo_data
;
1976 const struct i2c_algorithm
*algo
;
1978 algo_data
= (struct i2c_algo_bit_data
*)i2c_adap
->algo_data
;
1980 intel_sdvo_chan_to_intel_output(
1981 (struct intel_i2c_chan
*)(algo_data
->data
));
1982 if (intel_output
== NULL
)
1985 sdvo_priv
= intel_output
->dev_priv
;
1986 algo
= intel_output
->i2c_bus
->algo
;
1988 intel_sdvo_set_control_bus_switch(intel_output
, sdvo_priv
->ddc_bus
);
1989 return algo
->master_xfer(i2c_adap
, msgs
, num
);
1992 static struct i2c_algorithm intel_sdvo_i2c_bit_algo
= {
1993 .master_xfer
= intel_sdvo_master_xfer
,
1997 intel_sdvo_get_slave_addr(struct drm_device
*dev
, int output_device
)
1999 struct drm_i915_private
*dev_priv
= dev
->dev_private
;
2000 struct sdvo_device_mapping
*my_mapping
, *other_mapping
;
2002 if (output_device
== SDVOB
) {
2003 my_mapping
= &dev_priv
->sdvo_mappings
[0];
2004 other_mapping
= &dev_priv
->sdvo_mappings
[1];
2006 my_mapping
= &dev_priv
->sdvo_mappings
[1];
2007 other_mapping
= &dev_priv
->sdvo_mappings
[0];
2010 /* If the BIOS described our SDVO device, take advantage of it. */
2011 if (my_mapping
->slave_addr
)
2012 return my_mapping
->slave_addr
;
2014 /* If the BIOS only described a different SDVO device, use the
2015 * address that it isn't using.
2017 if (other_mapping
->slave_addr
) {
2018 if (other_mapping
->slave_addr
== 0x70)
2024 /* No SDVO device info is found for another DVO port,
2025 * so use mapping assumption we had before BIOS parsing.
2027 if (output_device
== SDVOB
)
2034 intel_sdvo_output_setup(struct intel_output
*intel_output
, uint16_t flags
)
2036 struct drm_connector
*connector
= &intel_output
->base
;
2037 struct drm_encoder
*encoder
= &intel_output
->enc
;
2038 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
2039 bool ret
= true, registered
= false;
2041 sdvo_priv
->is_tv
= false;
2042 intel_output
->needs_tv_clock
= false;
2043 sdvo_priv
->is_lvds
= false;
2045 if (device_is_registered(&connector
->kdev
)) {
2046 drm_sysfs_connector_remove(connector
);
2051 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_TMDS1
)) {
2052 if (sdvo_priv
->caps
.output_flags
& SDVO_OUTPUT_TMDS0
)
2053 sdvo_priv
->controlled_output
= SDVO_OUTPUT_TMDS0
;
2055 sdvo_priv
->controlled_output
= SDVO_OUTPUT_TMDS1
;
2057 encoder
->encoder_type
= DRM_MODE_ENCODER_TMDS
;
2058 connector
->connector_type
= DRM_MODE_CONNECTOR_DVID
;
2060 if (intel_sdvo_get_supp_encode(intel_output
,
2061 &sdvo_priv
->encode
) &&
2062 intel_sdvo_get_digital_encoding_mode(intel_output
) &&
2063 sdvo_priv
->is_hdmi
) {
2064 /* enable hdmi encoding mode if supported */
2065 intel_sdvo_set_encode(intel_output
, SDVO_ENCODE_HDMI
);
2066 intel_sdvo_set_colorimetry(intel_output
,
2067 SDVO_COLORIMETRY_RGB256
);
2068 connector
->connector_type
= DRM_MODE_CONNECTOR_HDMIA
;
2069 intel_output
->clone_mask
=
2070 (1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2071 (1 << INTEL_ANALOG_CLONE_BIT
);
2073 } else if (flags
& SDVO_OUTPUT_SVID0
) {
2075 sdvo_priv
->controlled_output
= SDVO_OUTPUT_SVID0
;
2076 encoder
->encoder_type
= DRM_MODE_ENCODER_TVDAC
;
2077 connector
->connector_type
= DRM_MODE_CONNECTOR_SVIDEO
;
2078 sdvo_priv
->is_tv
= true;
2079 intel_output
->needs_tv_clock
= true;
2080 intel_output
->clone_mask
= 1 << INTEL_SDVO_TV_CLONE_BIT
;
2081 } else if (flags
& SDVO_OUTPUT_RGB0
) {
2083 sdvo_priv
->controlled_output
= SDVO_OUTPUT_RGB0
;
2084 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2085 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2086 intel_output
->clone_mask
= (1 << INTEL_SDVO_NON_TV_CLONE_BIT
) |
2087 (1 << INTEL_ANALOG_CLONE_BIT
);
2088 } else if (flags
& SDVO_OUTPUT_RGB1
) {
2090 sdvo_priv
->controlled_output
= SDVO_OUTPUT_RGB1
;
2091 encoder
->encoder_type
= DRM_MODE_ENCODER_DAC
;
2092 connector
->connector_type
= DRM_MODE_CONNECTOR_VGA
;
2093 } else if (flags
& SDVO_OUTPUT_LVDS0
) {
2095 sdvo_priv
->controlled_output
= SDVO_OUTPUT_LVDS0
;
2096 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2097 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2098 sdvo_priv
->is_lvds
= true;
2099 intel_output
->clone_mask
= (1 << INTEL_ANALOG_CLONE_BIT
) |
2100 (1 << INTEL_SDVO_LVDS_CLONE_BIT
);
2101 } else if (flags
& SDVO_OUTPUT_LVDS1
) {
2103 sdvo_priv
->controlled_output
= SDVO_OUTPUT_LVDS1
;
2104 encoder
->encoder_type
= DRM_MODE_ENCODER_LVDS
;
2105 connector
->connector_type
= DRM_MODE_CONNECTOR_LVDS
;
2106 sdvo_priv
->is_lvds
= true;
2107 intel_output
->clone_mask
= (1 << INTEL_ANALOG_CLONE_BIT
) |
2108 (1 << INTEL_SDVO_LVDS_CLONE_BIT
);
2111 unsigned char bytes
[2];
2113 sdvo_priv
->controlled_output
= 0;
2114 memcpy(bytes
, &sdvo_priv
->caps
.output_flags
, 2);
2115 DRM_DEBUG_KMS(I915_SDVO
,
2116 "%s: Unknown SDVO output type (0x%02x%02x)\n",
2117 SDVO_NAME(sdvo_priv
),
2118 bytes
[0], bytes
[1]);
2121 intel_output
->crtc_mask
= (1 << 0) | (1 << 1);
2123 if (ret
&& registered
)
2124 ret
= drm_sysfs_connector_add(connector
) == 0 ? true : false;
2131 static void intel_sdvo_tv_create_property(struct drm_connector
*connector
)
2133 struct intel_output
*intel_output
= to_intel_output(connector
);
2134 struct intel_sdvo_priv
*sdvo_priv
= intel_output
->dev_priv
;
2135 struct intel_sdvo_tv_format format
;
2136 uint32_t format_map
, i
;
2139 intel_sdvo_set_target_output(intel_output
,
2140 sdvo_priv
->controlled_output
);
2142 intel_sdvo_write_cmd(intel_output
,
2143 SDVO_CMD_GET_SUPPORTED_TV_FORMATS
, NULL
, 0);
2144 status
= intel_sdvo_read_response(intel_output
,
2145 &format
, sizeof(format
));
2146 if (status
!= SDVO_CMD_STATUS_SUCCESS
)
2149 memcpy(&format_map
, &format
, sizeof(format
) > sizeof(format_map
) ?
2150 sizeof(format_map
) : sizeof(format
));
2152 if (format_map
== 0)
2155 sdvo_priv
->format_supported_num
= 0;
2156 for (i
= 0 ; i
< TV_FORMAT_NUM
; i
++)
2157 if (format_map
& (1 << i
)) {
2158 sdvo_priv
->tv_format_supported
2159 [sdvo_priv
->format_supported_num
++] =
2164 sdvo_priv
->tv_format_property
=
2165 drm_property_create(
2166 connector
->dev
, DRM_MODE_PROP_ENUM
,
2167 "mode", sdvo_priv
->format_supported_num
);
2169 for (i
= 0; i
< sdvo_priv
->format_supported_num
; i
++)
2170 drm_property_add_enum(
2171 sdvo_priv
->tv_format_property
, i
,
2172 i
, sdvo_priv
->tv_format_supported
[i
]);
2174 sdvo_priv
->tv_format_name
= sdvo_priv
->tv_format_supported
[0];
2175 drm_connector_attach_property(
2176 connector
, sdvo_priv
->tv_format_property
, 0);
2180 bool intel_sdvo_init(struct drm_device
*dev
, int output_device
)
2182 struct drm_connector
*connector
;
2183 struct intel_output
*intel_output
;
2184 struct intel_sdvo_priv
*sdvo_priv
;
2189 intel_output
= kcalloc(sizeof(struct intel_output
)+sizeof(struct intel_sdvo_priv
), 1, GFP_KERNEL
);
2190 if (!intel_output
) {
2194 sdvo_priv
= (struct intel_sdvo_priv
*)(intel_output
+ 1);
2195 sdvo_priv
->output_device
= output_device
;
2197 intel_output
->dev_priv
= sdvo_priv
;
2198 intel_output
->type
= INTEL_OUTPUT_SDVO
;
2200 /* setup the DDC bus. */
2201 if (output_device
== SDVOB
)
2202 intel_output
->i2c_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOCTRL_E for SDVOB");
2204 intel_output
->i2c_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOCTRL_E for SDVOC");
2206 if (!intel_output
->i2c_bus
)
2207 goto err_inteloutput
;
2209 sdvo_priv
->slave_addr
= intel_sdvo_get_slave_addr(dev
, output_device
);
2211 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2212 intel_sdvo_i2c_bit_algo
.functionality
= intel_output
->i2c_bus
->algo
->functionality
;
2214 /* Read the regs to test if we can talk to the device */
2215 for (i
= 0; i
< 0x40; i
++) {
2216 if (!intel_sdvo_read_byte(intel_output
, i
, &ch
[i
])) {
2217 DRM_DEBUG_KMS(I915_SDVO
,
2218 "No SDVO device found on SDVO%c\n",
2219 output_device
== SDVOB
? 'B' : 'C');
2224 /* setup the DDC bus. */
2225 if (output_device
== SDVOB
) {
2226 intel_output
->ddc_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOB DDC BUS");
2227 sdvo_priv
->analog_ddc_bus
= intel_i2c_create(dev
, GPIOA
,
2228 "SDVOB/VGA DDC BUS");
2230 intel_output
->ddc_bus
= intel_i2c_create(dev
, GPIOE
, "SDVOC DDC BUS");
2231 sdvo_priv
->analog_ddc_bus
= intel_i2c_create(dev
, GPIOA
,
2232 "SDVOC/VGA DDC BUS");
2235 if (intel_output
->ddc_bus
== NULL
)
2238 /* Wrap with our custom algo which switches to DDC mode */
2239 intel_output
->ddc_bus
->algo
= &intel_sdvo_i2c_bit_algo
;
2241 /* In defaut case sdvo lvds is false */
2242 intel_sdvo_get_capabilities(intel_output
, &sdvo_priv
->caps
);
2244 if (intel_sdvo_output_setup(intel_output
,
2245 sdvo_priv
->caps
.output_flags
) != true) {
2246 DRM_DEBUG("SDVO output failed to setup on SDVO%c\n",
2247 output_device
== SDVOB
? 'B' : 'C');
2252 connector
= &intel_output
->base
;
2253 drm_connector_init(dev
, connector
, &intel_sdvo_connector_funcs
,
2254 connector
->connector_type
);
2256 drm_connector_helper_add(connector
, &intel_sdvo_connector_helper_funcs
);
2257 connector
->interlace_allowed
= 0;
2258 connector
->doublescan_allowed
= 0;
2259 connector
->display_info
.subpixel_order
= SubPixelHorizontalRGB
;
2261 drm_encoder_init(dev
, &intel_output
->enc
,
2262 &intel_sdvo_enc_funcs
, intel_output
->enc
.encoder_type
);
2264 drm_encoder_helper_add(&intel_output
->enc
, &intel_sdvo_helper_funcs
);
2266 drm_mode_connector_attach_encoder(&intel_output
->base
, &intel_output
->enc
);
2267 if (sdvo_priv
->is_tv
)
2268 intel_sdvo_tv_create_property(connector
);
2269 drm_sysfs_connector_add(connector
);
2271 intel_sdvo_select_ddc_bus(sdvo_priv
);
2273 /* Set the input timing to the screen. Assume always input 0. */
2274 intel_sdvo_set_target_input(intel_output
, true, false);
2276 intel_sdvo_get_input_pixel_clock_range(intel_output
,
2277 &sdvo_priv
->pixel_clock_min
,
2278 &sdvo_priv
->pixel_clock_max
);
2281 DRM_DEBUG_KMS(I915_SDVO
, "%s device VID/DID: %02X:%02X.%02X, "
2282 "clock range %dMHz - %dMHz, "
2283 "input 1: %c, input 2: %c, "
2284 "output 1: %c, output 2: %c\n",
2285 SDVO_NAME(sdvo_priv
),
2286 sdvo_priv
->caps
.vendor_id
, sdvo_priv
->caps
.device_id
,
2287 sdvo_priv
->caps
.device_rev_id
,
2288 sdvo_priv
->pixel_clock_min
/ 1000,
2289 sdvo_priv
->pixel_clock_max
/ 1000,
2290 (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x1) ? 'Y' : 'N',
2291 (sdvo_priv
->caps
.sdvo_inputs_mask
& 0x2) ? 'Y' : 'N',
2292 /* check currently supported outputs */
2293 sdvo_priv
->caps
.output_flags
&
2294 (SDVO_OUTPUT_TMDS0
| SDVO_OUTPUT_RGB0
) ? 'Y' : 'N',
2295 sdvo_priv
->caps
.output_flags
&
2296 (SDVO_OUTPUT_TMDS1
| SDVO_OUTPUT_RGB1
) ? 'Y' : 'N');
2301 if (sdvo_priv
->analog_ddc_bus
!= NULL
)
2302 intel_i2c_destroy(sdvo_priv
->analog_ddc_bus
);
2303 if (intel_output
->ddc_bus
!= NULL
)
2304 intel_i2c_destroy(intel_output
->ddc_bus
);
2305 if (intel_output
->i2c_bus
!= NULL
)
2306 intel_i2c_destroy(intel_output
->i2c_bus
);
2308 kfree(intel_output
);