]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/gpu/drm/i915/intel_sdvo.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge tag 'stmp-dev' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[mirror_ubuntu-zesty-kernel.git] / drivers / gpu / drm / i915 / intel_sdvo.c
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
32 #include "drmP.h"
33 #include "drm.h"
34 #include "drm_crtc.h"
35 #include "drm_edid.h"
36 #include "intel_drv.h"
37 #include "i915_drm.h"
38 #include "i915_drv.h"
39 #include "intel_sdvo_regs.h"
40
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
45
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
54
55
56 static const char *tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 "SECAM_60"
64 };
65
66 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
67
68 struct intel_sdvo {
69 struct intel_encoder base;
70
71 struct i2c_adapter *i2c;
72 u8 slave_addr;
73
74 struct i2c_adapter ddc;
75
76 /* Register for the SDVO device: SDVOB or SDVOC */
77 uint32_t sdvo_reg;
78
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
81
82 /*
83 * Capabilities of the SDVO device returned by
84 * i830_sdvo_get_capabilities()
85 */
86 struct intel_sdvo_caps caps;
87
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
90
91 /*
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
94 */
95 uint16_t attached_output;
96
97 /*
98 * Hotplug activation bits for this device
99 */
100 uint8_t hotplug_active[2];
101
102 /**
103 * This is used to select the color range of RBG outputs in HDMI mode.
104 * It is only valid when using TMDS encoding and 8 bit per color mode.
105 */
106 uint32_t color_range;
107
108 /**
109 * This is set if we're going to treat the device as TV-out.
110 *
111 * While we have these nice friendly flags for output types that ought
112 * to decide this for us, the S-Video output on our HDMI+S-Video card
113 * shows up as RGB1 (VGA).
114 */
115 bool is_tv;
116
117 /* On different gens SDVOB is at different places. */
118 bool is_sdvob;
119
120 /* This is for current tv format name */
121 int tv_format_index;
122
123 /**
124 * This is set if we treat the device as HDMI, instead of DVI.
125 */
126 bool is_hdmi;
127 bool has_hdmi_monitor;
128 bool has_hdmi_audio;
129
130 /**
131 * This is set if we detect output of sdvo device as LVDS and
132 * have a valid fixed mode to use with the panel.
133 */
134 bool is_lvds;
135
136 /**
137 * This is sdvo fixed pannel mode pointer
138 */
139 struct drm_display_mode *sdvo_lvds_fixed_mode;
140
141 /* DDC bus used by this SDVO encoder */
142 uint8_t ddc_bus;
143
144 /* Input timings for adjusted_mode */
145 struct intel_sdvo_dtd input_dtd;
146 };
147
148 struct intel_sdvo_connector {
149 struct intel_connector base;
150
151 /* Mark the type of connector */
152 uint16_t output_flag;
153
154 enum hdmi_force_audio force_audio;
155
156 /* This contains all current supported TV format */
157 u8 tv_format_supported[TV_FORMAT_NUM];
158 int format_supported_num;
159 struct drm_property *tv_format;
160
161 /* add the property for the SDVO-TV */
162 struct drm_property *left;
163 struct drm_property *right;
164 struct drm_property *top;
165 struct drm_property *bottom;
166 struct drm_property *hpos;
167 struct drm_property *vpos;
168 struct drm_property *contrast;
169 struct drm_property *saturation;
170 struct drm_property *hue;
171 struct drm_property *sharpness;
172 struct drm_property *flicker_filter;
173 struct drm_property *flicker_filter_adaptive;
174 struct drm_property *flicker_filter_2d;
175 struct drm_property *tv_chroma_filter;
176 struct drm_property *tv_luma_filter;
177 struct drm_property *dot_crawl;
178
179 /* add the property for the SDVO-TV/LVDS */
180 struct drm_property *brightness;
181
182 /* Add variable to record current setting for the above property */
183 u32 left_margin, right_margin, top_margin, bottom_margin;
184
185 /* this is to get the range of margin.*/
186 u32 max_hscan, max_vscan;
187 u32 max_hpos, cur_hpos;
188 u32 max_vpos, cur_vpos;
189 u32 cur_brightness, max_brightness;
190 u32 cur_contrast, max_contrast;
191 u32 cur_saturation, max_saturation;
192 u32 cur_hue, max_hue;
193 u32 cur_sharpness, max_sharpness;
194 u32 cur_flicker_filter, max_flicker_filter;
195 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
196 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
197 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
198 u32 cur_tv_luma_filter, max_tv_luma_filter;
199 u32 cur_dot_crawl, max_dot_crawl;
200 };
201
202 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
203 {
204 return container_of(encoder, struct intel_sdvo, base.base);
205 }
206
207 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
208 {
209 return container_of(intel_attached_encoder(connector),
210 struct intel_sdvo, base);
211 }
212
213 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
214 {
215 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
216 }
217
218 static bool
219 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
220 static bool
221 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
222 struct intel_sdvo_connector *intel_sdvo_connector,
223 int type);
224 static bool
225 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
226 struct intel_sdvo_connector *intel_sdvo_connector);
227
228 /**
229 * Writes the SDVOB or SDVOC with the given value, but always writes both
230 * SDVOB and SDVOC to work around apparent hardware issues (according to
231 * comments in the BIOS).
232 */
233 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
234 {
235 struct drm_device *dev = intel_sdvo->base.base.dev;
236 struct drm_i915_private *dev_priv = dev->dev_private;
237 u32 bval = val, cval = val;
238 int i;
239
240 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
241 I915_WRITE(intel_sdvo->sdvo_reg, val);
242 I915_READ(intel_sdvo->sdvo_reg);
243 return;
244 }
245
246 if (intel_sdvo->sdvo_reg == SDVOB) {
247 cval = I915_READ(SDVOC);
248 } else {
249 bval = I915_READ(SDVOB);
250 }
251 /*
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
255 */
256 for (i = 0; i < 2; i++)
257 {
258 I915_WRITE(SDVOB, bval);
259 I915_READ(SDVOB);
260 I915_WRITE(SDVOC, cval);
261 I915_READ(SDVOC);
262 }
263 }
264
265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
266 {
267 struct i2c_msg msgs[] = {
268 {
269 .addr = intel_sdvo->slave_addr,
270 .flags = 0,
271 .len = 1,
272 .buf = &addr,
273 },
274 {
275 .addr = intel_sdvo->slave_addr,
276 .flags = I2C_M_RD,
277 .len = 1,
278 .buf = ch,
279 }
280 };
281 int ret;
282
283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
284 return true;
285
286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
287 return false;
288 }
289
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
293 u8 cmd;
294 const char *name;
295 } sdvo_cmd_names[] = {
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
339
340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
385
386 /* HDMI op code */
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
407 };
408
409 #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
410
411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
412 const void *args, int args_len)
413 {
414 int i;
415
416 DRM_DEBUG_KMS("%s: W: %02X ",
417 SDVO_NAME(intel_sdvo), cmd);
418 for (i = 0; i < args_len; i++)
419 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
420 for (; i < 8; i++)
421 DRM_LOG_KMS(" ");
422 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
423 if (cmd == sdvo_cmd_names[i].cmd) {
424 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
425 break;
426 }
427 }
428 if (i == ARRAY_SIZE(sdvo_cmd_names))
429 DRM_LOG_KMS("(%02X)", cmd);
430 DRM_LOG_KMS("\n");
431 }
432
433 static const char *cmd_status_names[] = {
434 "Power on",
435 "Success",
436 "Not supported",
437 "Invalid arg",
438 "Pending",
439 "Target not specified",
440 "Scaling not supported"
441 };
442
443 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
444 const void *args, int args_len)
445 {
446 u8 *buf, status;
447 struct i2c_msg *msgs;
448 int i, ret = true;
449
450 buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
451 if (!buf)
452 return false;
453
454 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
455 if (!msgs)
456 return false;
457
458 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
459
460 for (i = 0; i < args_len; i++) {
461 msgs[i].addr = intel_sdvo->slave_addr;
462 msgs[i].flags = 0;
463 msgs[i].len = 2;
464 msgs[i].buf = buf + 2 *i;
465 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
466 buf[2*i + 1] = ((u8*)args)[i];
467 }
468 msgs[i].addr = intel_sdvo->slave_addr;
469 msgs[i].flags = 0;
470 msgs[i].len = 2;
471 msgs[i].buf = buf + 2*i;
472 buf[2*i + 0] = SDVO_I2C_OPCODE;
473 buf[2*i + 1] = cmd;
474
475 /* the following two are to read the response */
476 status = SDVO_I2C_CMD_STATUS;
477 msgs[i+1].addr = intel_sdvo->slave_addr;
478 msgs[i+1].flags = 0;
479 msgs[i+1].len = 1;
480 msgs[i+1].buf = &status;
481
482 msgs[i+2].addr = intel_sdvo->slave_addr;
483 msgs[i+2].flags = I2C_M_RD;
484 msgs[i+2].len = 1;
485 msgs[i+2].buf = &status;
486
487 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
488 if (ret < 0) {
489 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
490 ret = false;
491 goto out;
492 }
493 if (ret != i+3) {
494 /* failure in I2C transfer */
495 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
496 ret = false;
497 }
498
499 out:
500 kfree(msgs);
501 kfree(buf);
502 return ret;
503 }
504
505 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
506 void *response, int response_len)
507 {
508 u8 retry = 5;
509 u8 status;
510 int i;
511
512 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
513
514 /*
515 * The documentation states that all commands will be
516 * processed within 15µs, and that we need only poll
517 * the status byte a maximum of 3 times in order for the
518 * command to be complete.
519 *
520 * Check 5 times in case the hardware failed to read the docs.
521 */
522 if (!intel_sdvo_read_byte(intel_sdvo,
523 SDVO_I2C_CMD_STATUS,
524 &status))
525 goto log_fail;
526
527 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
528 udelay(15);
529 if (!intel_sdvo_read_byte(intel_sdvo,
530 SDVO_I2C_CMD_STATUS,
531 &status))
532 goto log_fail;
533 }
534
535 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
536 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
537 else
538 DRM_LOG_KMS("(??? %d)", status);
539
540 if (status != SDVO_CMD_STATUS_SUCCESS)
541 goto log_fail;
542
543 /* Read the command response */
544 for (i = 0; i < response_len; i++) {
545 if (!intel_sdvo_read_byte(intel_sdvo,
546 SDVO_I2C_RETURN_0 + i,
547 &((u8 *)response)[i]))
548 goto log_fail;
549 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
550 }
551 DRM_LOG_KMS("\n");
552 return true;
553
554 log_fail:
555 DRM_LOG_KMS("... failed\n");
556 return false;
557 }
558
559 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
560 {
561 if (mode->clock >= 100000)
562 return 1;
563 else if (mode->clock >= 50000)
564 return 2;
565 else
566 return 4;
567 }
568
569 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
570 u8 ddc_bus)
571 {
572 /* This must be the immediately preceding write before the i2c xfer */
573 return intel_sdvo_write_cmd(intel_sdvo,
574 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
575 &ddc_bus, 1);
576 }
577
578 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
579 {
580 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
581 return false;
582
583 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
584 }
585
586 static bool
587 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
588 {
589 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
590 return false;
591
592 return intel_sdvo_read_response(intel_sdvo, value, len);
593 }
594
595 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
596 {
597 struct intel_sdvo_set_target_input_args targets = {0};
598 return intel_sdvo_set_value(intel_sdvo,
599 SDVO_CMD_SET_TARGET_INPUT,
600 &targets, sizeof(targets));
601 }
602
603 /**
604 * Return whether each input is trained.
605 *
606 * This function is making an assumption about the layout of the response,
607 * which should be checked against the docs.
608 */
609 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
610 {
611 struct intel_sdvo_get_trained_inputs_response response;
612
613 BUILD_BUG_ON(sizeof(response) != 1);
614 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
615 &response, sizeof(response)))
616 return false;
617
618 *input_1 = response.input0_trained;
619 *input_2 = response.input1_trained;
620 return true;
621 }
622
623 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
624 u16 outputs)
625 {
626 return intel_sdvo_set_value(intel_sdvo,
627 SDVO_CMD_SET_ACTIVE_OUTPUTS,
628 &outputs, sizeof(outputs));
629 }
630
631 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
632 int mode)
633 {
634 u8 state = SDVO_ENCODER_STATE_ON;
635
636 switch (mode) {
637 case DRM_MODE_DPMS_ON:
638 state = SDVO_ENCODER_STATE_ON;
639 break;
640 case DRM_MODE_DPMS_STANDBY:
641 state = SDVO_ENCODER_STATE_STANDBY;
642 break;
643 case DRM_MODE_DPMS_SUSPEND:
644 state = SDVO_ENCODER_STATE_SUSPEND;
645 break;
646 case DRM_MODE_DPMS_OFF:
647 state = SDVO_ENCODER_STATE_OFF;
648 break;
649 }
650
651 return intel_sdvo_set_value(intel_sdvo,
652 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
653 }
654
655 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
656 int *clock_min,
657 int *clock_max)
658 {
659 struct intel_sdvo_pixel_clock_range clocks;
660
661 BUILD_BUG_ON(sizeof(clocks) != 4);
662 if (!intel_sdvo_get_value(intel_sdvo,
663 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
664 &clocks, sizeof(clocks)))
665 return false;
666
667 /* Convert the values from units of 10 kHz to kHz. */
668 *clock_min = clocks.min * 10;
669 *clock_max = clocks.max * 10;
670 return true;
671 }
672
673 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
674 u16 outputs)
675 {
676 return intel_sdvo_set_value(intel_sdvo,
677 SDVO_CMD_SET_TARGET_OUTPUT,
678 &outputs, sizeof(outputs));
679 }
680
681 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
682 struct intel_sdvo_dtd *dtd)
683 {
684 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
685 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
686 }
687
688 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
689 struct intel_sdvo_dtd *dtd)
690 {
691 return intel_sdvo_set_timing(intel_sdvo,
692 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
693 }
694
695 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
696 struct intel_sdvo_dtd *dtd)
697 {
698 return intel_sdvo_set_timing(intel_sdvo,
699 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
700 }
701
702 static bool
703 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
704 uint16_t clock,
705 uint16_t width,
706 uint16_t height)
707 {
708 struct intel_sdvo_preferred_input_timing_args args;
709
710 memset(&args, 0, sizeof(args));
711 args.clock = clock;
712 args.width = width;
713 args.height = height;
714 args.interlace = 0;
715
716 if (intel_sdvo->is_lvds &&
717 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
718 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
719 args.scaled = 1;
720
721 return intel_sdvo_set_value(intel_sdvo,
722 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
723 &args, sizeof(args));
724 }
725
726 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
727 struct intel_sdvo_dtd *dtd)
728 {
729 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
730 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
731 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
732 &dtd->part1, sizeof(dtd->part1)) &&
733 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
734 &dtd->part2, sizeof(dtd->part2));
735 }
736
737 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
738 {
739 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
740 }
741
742 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
743 const struct drm_display_mode *mode)
744 {
745 uint16_t width, height;
746 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
747 uint16_t h_sync_offset, v_sync_offset;
748 int mode_clock;
749
750 width = mode->hdisplay;
751 height = mode->vdisplay;
752
753 /* do some mode translations */
754 h_blank_len = mode->htotal - mode->hdisplay;
755 h_sync_len = mode->hsync_end - mode->hsync_start;
756
757 v_blank_len = mode->vtotal - mode->vdisplay;
758 v_sync_len = mode->vsync_end - mode->vsync_start;
759
760 h_sync_offset = mode->hsync_start - mode->hdisplay;
761 v_sync_offset = mode->vsync_start - mode->vdisplay;
762
763 mode_clock = mode->clock;
764 mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
765 mode_clock /= 10;
766 dtd->part1.clock = mode_clock;
767
768 dtd->part1.h_active = width & 0xff;
769 dtd->part1.h_blank = h_blank_len & 0xff;
770 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
771 ((h_blank_len >> 8) & 0xf);
772 dtd->part1.v_active = height & 0xff;
773 dtd->part1.v_blank = v_blank_len & 0xff;
774 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
775 ((v_blank_len >> 8) & 0xf);
776
777 dtd->part2.h_sync_off = h_sync_offset & 0xff;
778 dtd->part2.h_sync_width = h_sync_len & 0xff;
779 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
780 (v_sync_len & 0xf);
781 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
782 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
783 ((v_sync_len & 0x30) >> 4);
784
785 dtd->part2.dtd_flags = 0x18;
786 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
787 dtd->part2.dtd_flags |= 0x2;
788 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
789 dtd->part2.dtd_flags |= 0x4;
790
791 dtd->part2.sdvo_flags = 0;
792 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
793 dtd->part2.reserved = 0;
794 }
795
796 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
797 const struct intel_sdvo_dtd *dtd)
798 {
799 mode->hdisplay = dtd->part1.h_active;
800 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
801 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
802 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
803 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
804 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
805 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
806 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
807
808 mode->vdisplay = dtd->part1.v_active;
809 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
810 mode->vsync_start = mode->vdisplay;
811 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
812 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
813 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
814 mode->vsync_end = mode->vsync_start +
815 (dtd->part2.v_sync_off_width & 0xf);
816 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
817 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
818 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
819
820 mode->clock = dtd->part1.clock * 10;
821
822 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
823 if (dtd->part2.dtd_flags & 0x2)
824 mode->flags |= DRM_MODE_FLAG_PHSYNC;
825 if (dtd->part2.dtd_flags & 0x4)
826 mode->flags |= DRM_MODE_FLAG_PVSYNC;
827 }
828
829 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
830 {
831 struct intel_sdvo_encode encode;
832
833 BUILD_BUG_ON(sizeof(encode) != 2);
834 return intel_sdvo_get_value(intel_sdvo,
835 SDVO_CMD_GET_SUPP_ENCODE,
836 &encode, sizeof(encode));
837 }
838
839 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
840 uint8_t mode)
841 {
842 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
843 }
844
845 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
846 uint8_t mode)
847 {
848 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
849 }
850
851 #if 0
852 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
853 {
854 int i, j;
855 uint8_t set_buf_index[2];
856 uint8_t av_split;
857 uint8_t buf_size;
858 uint8_t buf[48];
859 uint8_t *pos;
860
861 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
862
863 for (i = 0; i <= av_split; i++) {
864 set_buf_index[0] = i; set_buf_index[1] = 0;
865 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
866 set_buf_index, 2);
867 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
868 intel_sdvo_read_response(encoder, &buf_size, 1);
869
870 pos = buf;
871 for (j = 0; j <= buf_size; j += 8) {
872 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
873 NULL, 0);
874 intel_sdvo_read_response(encoder, pos, 8);
875 pos += 8;
876 }
877 }
878 }
879 #endif
880
881 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
882 {
883 struct dip_infoframe avi_if = {
884 .type = DIP_TYPE_AVI,
885 .ver = DIP_VERSION_AVI,
886 .len = DIP_LEN_AVI,
887 };
888 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
889 uint8_t set_buf_index[2] = { 1, 0 };
890 uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
891 uint64_t *data = (uint64_t *)sdvo_data;
892 unsigned i;
893
894 intel_dip_infoframe_csum(&avi_if);
895
896 /* sdvo spec says that the ecc is handled by the hw, and it looks like
897 * we must not send the ecc field, either. */
898 memcpy(sdvo_data, &avi_if, 3);
899 sdvo_data[3] = avi_if.checksum;
900 memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
901
902 if (!intel_sdvo_set_value(intel_sdvo,
903 SDVO_CMD_SET_HBUF_INDEX,
904 set_buf_index, 2))
905 return false;
906
907 for (i = 0; i < sizeof(sdvo_data); i += 8) {
908 if (!intel_sdvo_set_value(intel_sdvo,
909 SDVO_CMD_SET_HBUF_DATA,
910 data, 8))
911 return false;
912 data++;
913 }
914
915 return intel_sdvo_set_value(intel_sdvo,
916 SDVO_CMD_SET_HBUF_TXRATE,
917 &tx_rate, 1);
918 }
919
920 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
921 {
922 struct intel_sdvo_tv_format format;
923 uint32_t format_map;
924
925 format_map = 1 << intel_sdvo->tv_format_index;
926 memset(&format, 0, sizeof(format));
927 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
928
929 BUILD_BUG_ON(sizeof(format) != 6);
930 return intel_sdvo_set_value(intel_sdvo,
931 SDVO_CMD_SET_TV_FORMAT,
932 &format, sizeof(format));
933 }
934
935 static bool
936 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
937 struct drm_display_mode *mode)
938 {
939 struct intel_sdvo_dtd output_dtd;
940
941 if (!intel_sdvo_set_target_output(intel_sdvo,
942 intel_sdvo->attached_output))
943 return false;
944
945 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
946 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
947 return false;
948
949 return true;
950 }
951
952 static bool
953 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
954 struct drm_display_mode *mode,
955 struct drm_display_mode *adjusted_mode)
956 {
957 /* Reset the input timing to the screen. Assume always input 0. */
958 if (!intel_sdvo_set_target_input(intel_sdvo))
959 return false;
960
961 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
962 mode->clock / 10,
963 mode->hdisplay,
964 mode->vdisplay))
965 return false;
966
967 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
968 &intel_sdvo->input_dtd))
969 return false;
970
971 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
972
973 return true;
974 }
975
976 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
977 struct drm_display_mode *mode,
978 struct drm_display_mode *adjusted_mode)
979 {
980 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
981 int multiplier;
982
983 /* We need to construct preferred input timings based on our
984 * output timings. To do that, we have to set the output
985 * timings, even though this isn't really the right place in
986 * the sequence to do it. Oh well.
987 */
988 if (intel_sdvo->is_tv) {
989 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
990 return false;
991
992 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
993 mode,
994 adjusted_mode);
995 } else if (intel_sdvo->is_lvds) {
996 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
997 intel_sdvo->sdvo_lvds_fixed_mode))
998 return false;
999
1000 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
1001 mode,
1002 adjusted_mode);
1003 }
1004
1005 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1006 * SDVO device will factor out the multiplier during mode_set.
1007 */
1008 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
1009 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
1010
1011 return true;
1012 }
1013
1014 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1015 struct drm_display_mode *mode,
1016 struct drm_display_mode *adjusted_mode)
1017 {
1018 struct drm_device *dev = encoder->dev;
1019 struct drm_i915_private *dev_priv = dev->dev_private;
1020 struct drm_crtc *crtc = encoder->crtc;
1021 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1022 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1023 u32 sdvox;
1024 struct intel_sdvo_in_out_map in_out;
1025 struct intel_sdvo_dtd input_dtd, output_dtd;
1026 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
1027 int rate;
1028
1029 if (!mode)
1030 return;
1031
1032 /* First, set the input mapping for the first input to our controlled
1033 * output. This is only correct if we're a single-input device, in
1034 * which case the first input is the output from the appropriate SDVO
1035 * channel on the motherboard. In a two-input device, the first input
1036 * will be SDVOB and the second SDVOC.
1037 */
1038 in_out.in0 = intel_sdvo->attached_output;
1039 in_out.in1 = 0;
1040
1041 intel_sdvo_set_value(intel_sdvo,
1042 SDVO_CMD_SET_IN_OUT_MAP,
1043 &in_out, sizeof(in_out));
1044
1045 /* Set the output timings to the screen */
1046 if (!intel_sdvo_set_target_output(intel_sdvo,
1047 intel_sdvo->attached_output))
1048 return;
1049
1050 /* lvds has a special fixed output timing. */
1051 if (intel_sdvo->is_lvds)
1052 intel_sdvo_get_dtd_from_mode(&output_dtd,
1053 intel_sdvo->sdvo_lvds_fixed_mode);
1054 else
1055 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1056 (void) intel_sdvo_set_output_timing(intel_sdvo, &output_dtd);
1057
1058 /* Set the input timing to the screen. Assume always input 0. */
1059 if (!intel_sdvo_set_target_input(intel_sdvo))
1060 return;
1061
1062 if (intel_sdvo->has_hdmi_monitor) {
1063 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1064 intel_sdvo_set_colorimetry(intel_sdvo,
1065 SDVO_COLORIMETRY_RGB256);
1066 intel_sdvo_set_avi_infoframe(intel_sdvo);
1067 } else
1068 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1069
1070 if (intel_sdvo->is_tv &&
1071 !intel_sdvo_set_tv_format(intel_sdvo))
1072 return;
1073
1074 /* We have tried to get input timing in mode_fixup, and filled into
1075 * adjusted_mode.
1076 */
1077 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1078 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1079
1080 switch (pixel_multiplier) {
1081 default:
1082 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1083 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1084 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1085 }
1086 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1087 return;
1088
1089 /* Set the SDVO control regs. */
1090 if (INTEL_INFO(dev)->gen >= 4) {
1091 /* The real mode polarity is set by the SDVO commands, using
1092 * struct intel_sdvo_dtd. */
1093 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1094 if (intel_sdvo->is_hdmi)
1095 sdvox |= intel_sdvo->color_range;
1096 if (INTEL_INFO(dev)->gen < 5)
1097 sdvox |= SDVO_BORDER_ENABLE;
1098 } else {
1099 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1100 switch (intel_sdvo->sdvo_reg) {
1101 case SDVOB:
1102 sdvox &= SDVOB_PRESERVE_MASK;
1103 break;
1104 case SDVOC:
1105 sdvox &= SDVOC_PRESERVE_MASK;
1106 break;
1107 }
1108 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1109 }
1110
1111 if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
1112 sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
1113 else
1114 sdvox |= TRANSCODER(intel_crtc->pipe);
1115
1116 if (intel_sdvo->has_hdmi_audio)
1117 sdvox |= SDVO_AUDIO_ENABLE;
1118
1119 if (INTEL_INFO(dev)->gen >= 4) {
1120 /* done in crtc_mode_set as the dpll_md reg must be written early */
1121 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1122 /* done in crtc_mode_set as it lives inside the dpll register */
1123 } else {
1124 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1125 }
1126
1127 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1128 INTEL_INFO(dev)->gen < 5)
1129 sdvox |= SDVO_STALL_SELECT;
1130 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1131 }
1132
1133 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1134 {
1135 struct drm_device *dev = encoder->dev;
1136 struct drm_i915_private *dev_priv = dev->dev_private;
1137 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1138 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1139 u32 temp;
1140
1141 if (mode != DRM_MODE_DPMS_ON) {
1142 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1143 if (0)
1144 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1145
1146 if (mode == DRM_MODE_DPMS_OFF) {
1147 temp = I915_READ(intel_sdvo->sdvo_reg);
1148 if ((temp & SDVO_ENABLE) != 0) {
1149 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1150 }
1151 }
1152 } else {
1153 bool input1, input2;
1154 int i;
1155 u8 status;
1156
1157 temp = I915_READ(intel_sdvo->sdvo_reg);
1158 if ((temp & SDVO_ENABLE) == 0)
1159 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1160 for (i = 0; i < 2; i++)
1161 intel_wait_for_vblank(dev, intel_crtc->pipe);
1162
1163 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1164 /* Warn if the device reported failure to sync.
1165 * A lot of SDVO devices fail to notify of sync, but it's
1166 * a given it the status is a success, we succeeded.
1167 */
1168 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1169 DRM_DEBUG_KMS("First %s output reported failure to "
1170 "sync\n", SDVO_NAME(intel_sdvo));
1171 }
1172
1173 if (0)
1174 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1175 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1176 }
1177 return;
1178 }
1179
1180 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1181 struct drm_display_mode *mode)
1182 {
1183 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1184
1185 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1186 return MODE_NO_DBLESCAN;
1187
1188 if (intel_sdvo->pixel_clock_min > mode->clock)
1189 return MODE_CLOCK_LOW;
1190
1191 if (intel_sdvo->pixel_clock_max < mode->clock)
1192 return MODE_CLOCK_HIGH;
1193
1194 if (intel_sdvo->is_lvds) {
1195 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1196 return MODE_PANEL;
1197
1198 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1199 return MODE_PANEL;
1200 }
1201
1202 return MODE_OK;
1203 }
1204
1205 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1206 {
1207 BUILD_BUG_ON(sizeof(*caps) != 8);
1208 if (!intel_sdvo_get_value(intel_sdvo,
1209 SDVO_CMD_GET_DEVICE_CAPS,
1210 caps, sizeof(*caps)))
1211 return false;
1212
1213 DRM_DEBUG_KMS("SDVO capabilities:\n"
1214 " vendor_id: %d\n"
1215 " device_id: %d\n"
1216 " device_rev_id: %d\n"
1217 " sdvo_version_major: %d\n"
1218 " sdvo_version_minor: %d\n"
1219 " sdvo_inputs_mask: %d\n"
1220 " smooth_scaling: %d\n"
1221 " sharp_scaling: %d\n"
1222 " up_scaling: %d\n"
1223 " down_scaling: %d\n"
1224 " stall_support: %d\n"
1225 " output_flags: %d\n",
1226 caps->vendor_id,
1227 caps->device_id,
1228 caps->device_rev_id,
1229 caps->sdvo_version_major,
1230 caps->sdvo_version_minor,
1231 caps->sdvo_inputs_mask,
1232 caps->smooth_scaling,
1233 caps->sharp_scaling,
1234 caps->up_scaling,
1235 caps->down_scaling,
1236 caps->stall_support,
1237 caps->output_flags);
1238
1239 return true;
1240 }
1241
1242 static int intel_sdvo_supports_hotplug(struct intel_sdvo *intel_sdvo)
1243 {
1244 struct drm_device *dev = intel_sdvo->base.base.dev;
1245 u8 response[2];
1246
1247 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1248 * on the line. */
1249 if (IS_I945G(dev) || IS_I945GM(dev))
1250 return false;
1251
1252 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1253 &response, 2) && response[0];
1254 }
1255
1256 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1257 {
1258 struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
1259
1260 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &intel_sdvo->hotplug_active, 2);
1261 }
1262
1263 static bool
1264 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1265 {
1266 /* Is there more than one type of output? */
1267 return hweight16(intel_sdvo->caps.output_flags) > 1;
1268 }
1269
1270 static struct edid *
1271 intel_sdvo_get_edid(struct drm_connector *connector)
1272 {
1273 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1274 return drm_get_edid(connector, &sdvo->ddc);
1275 }
1276
1277 /* Mac mini hack -- use the same DDC as the analog connector */
1278 static struct edid *
1279 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1280 {
1281 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1282
1283 return drm_get_edid(connector,
1284 intel_gmbus_get_adapter(dev_priv,
1285 dev_priv->crt_ddc_pin));
1286 }
1287
1288 static enum drm_connector_status
1289 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1290 {
1291 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1292 enum drm_connector_status status;
1293 struct edid *edid;
1294
1295 edid = intel_sdvo_get_edid(connector);
1296
1297 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1298 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1299
1300 /*
1301 * Don't use the 1 as the argument of DDC bus switch to get
1302 * the EDID. It is used for SDVO SPD ROM.
1303 */
1304 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1305 intel_sdvo->ddc_bus = ddc;
1306 edid = intel_sdvo_get_edid(connector);
1307 if (edid)
1308 break;
1309 }
1310 /*
1311 * If we found the EDID on the other bus,
1312 * assume that is the correct DDC bus.
1313 */
1314 if (edid == NULL)
1315 intel_sdvo->ddc_bus = saved_ddc;
1316 }
1317
1318 /*
1319 * When there is no edid and no monitor is connected with VGA
1320 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1321 */
1322 if (edid == NULL)
1323 edid = intel_sdvo_get_analog_edid(connector);
1324
1325 status = connector_status_unknown;
1326 if (edid != NULL) {
1327 /* DDC bus is shared, match EDID to connector type */
1328 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1329 status = connector_status_connected;
1330 if (intel_sdvo->is_hdmi) {
1331 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1332 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1333 }
1334 } else
1335 status = connector_status_disconnected;
1336 connector->display_info.raw_edid = NULL;
1337 kfree(edid);
1338 }
1339
1340 if (status == connector_status_connected) {
1341 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1342 if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
1343 intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
1344 }
1345
1346 return status;
1347 }
1348
1349 static bool
1350 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1351 struct edid *edid)
1352 {
1353 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1354 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1355
1356 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1357 connector_is_digital, monitor_is_digital);
1358 return connector_is_digital == monitor_is_digital;
1359 }
1360
1361 static enum drm_connector_status
1362 intel_sdvo_detect(struct drm_connector *connector, bool force)
1363 {
1364 uint16_t response;
1365 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1366 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1367 enum drm_connector_status ret;
1368
1369 if (!intel_sdvo_write_cmd(intel_sdvo,
1370 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1371 return connector_status_unknown;
1372
1373 /* add 30ms delay when the output type might be TV */
1374 if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
1375 mdelay(30);
1376
1377 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1378 return connector_status_unknown;
1379
1380 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1381 response & 0xff, response >> 8,
1382 intel_sdvo_connector->output_flag);
1383
1384 if (response == 0)
1385 return connector_status_disconnected;
1386
1387 intel_sdvo->attached_output = response;
1388
1389 intel_sdvo->has_hdmi_monitor = false;
1390 intel_sdvo->has_hdmi_audio = false;
1391
1392 if ((intel_sdvo_connector->output_flag & response) == 0)
1393 ret = connector_status_disconnected;
1394 else if (IS_TMDS(intel_sdvo_connector))
1395 ret = intel_sdvo_tmds_sink_detect(connector);
1396 else {
1397 struct edid *edid;
1398
1399 /* if we have an edid check it matches the connection */
1400 edid = intel_sdvo_get_edid(connector);
1401 if (edid == NULL)
1402 edid = intel_sdvo_get_analog_edid(connector);
1403 if (edid != NULL) {
1404 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1405 edid))
1406 ret = connector_status_connected;
1407 else
1408 ret = connector_status_disconnected;
1409
1410 connector->display_info.raw_edid = NULL;
1411 kfree(edid);
1412 } else
1413 ret = connector_status_connected;
1414 }
1415
1416 /* May update encoder flag for like clock for SDVO TV, etc.*/
1417 if (ret == connector_status_connected) {
1418 intel_sdvo->is_tv = false;
1419 intel_sdvo->is_lvds = false;
1420 intel_sdvo->base.needs_tv_clock = false;
1421
1422 if (response & SDVO_TV_MASK) {
1423 intel_sdvo->is_tv = true;
1424 intel_sdvo->base.needs_tv_clock = true;
1425 }
1426 if (response & SDVO_LVDS_MASK)
1427 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1428 }
1429
1430 return ret;
1431 }
1432
1433 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1434 {
1435 struct edid *edid;
1436
1437 /* set the bus switch and get the modes */
1438 edid = intel_sdvo_get_edid(connector);
1439
1440 /*
1441 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1442 * link between analog and digital outputs. So, if the regular SDVO
1443 * DDC fails, check to see if the analog output is disconnected, in
1444 * which case we'll look there for the digital DDC data.
1445 */
1446 if (edid == NULL)
1447 edid = intel_sdvo_get_analog_edid(connector);
1448
1449 if (edid != NULL) {
1450 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1451 edid)) {
1452 drm_mode_connector_update_edid_property(connector, edid);
1453 drm_add_edid_modes(connector, edid);
1454 }
1455
1456 connector->display_info.raw_edid = NULL;
1457 kfree(edid);
1458 }
1459 }
1460
1461 /*
1462 * Set of SDVO TV modes.
1463 * Note! This is in reply order (see loop in get_tv_modes).
1464 * XXX: all 60Hz refresh?
1465 */
1466 static const struct drm_display_mode sdvo_tv_modes[] = {
1467 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1468 416, 0, 200, 201, 232, 233, 0,
1469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1471 416, 0, 240, 241, 272, 273, 0,
1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1474 496, 0, 300, 301, 332, 333, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1477 736, 0, 350, 351, 382, 383, 0,
1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1480 736, 0, 400, 401, 432, 433, 0,
1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1483 736, 0, 480, 481, 512, 513, 0,
1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1486 800, 0, 480, 481, 512, 513, 0,
1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1489 800, 0, 576, 577, 608, 609, 0,
1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1492 816, 0, 350, 351, 382, 383, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1495 816, 0, 400, 401, 432, 433, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1498 816, 0, 480, 481, 512, 513, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1501 816, 0, 540, 541, 572, 573, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1504 816, 0, 576, 577, 608, 609, 0,
1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1507 864, 0, 576, 577, 608, 609, 0,
1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1510 896, 0, 600, 601, 632, 633, 0,
1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1513 928, 0, 624, 625, 656, 657, 0,
1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1516 1016, 0, 766, 767, 798, 799, 0,
1517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1519 1120, 0, 768, 769, 800, 801, 0,
1520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1522 1376, 0, 1024, 1025, 1056, 1057, 0,
1523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524 };
1525
1526 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1527 {
1528 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1529 struct intel_sdvo_sdtv_resolution_request tv_res;
1530 uint32_t reply = 0, format_map = 0;
1531 int i;
1532
1533 /* Read the list of supported input resolutions for the selected TV
1534 * format.
1535 */
1536 format_map = 1 << intel_sdvo->tv_format_index;
1537 memcpy(&tv_res, &format_map,
1538 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1539
1540 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1541 return;
1542
1543 BUILD_BUG_ON(sizeof(tv_res) != 3);
1544 if (!intel_sdvo_write_cmd(intel_sdvo,
1545 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1546 &tv_res, sizeof(tv_res)))
1547 return;
1548 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1549 return;
1550
1551 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1552 if (reply & (1 << i)) {
1553 struct drm_display_mode *nmode;
1554 nmode = drm_mode_duplicate(connector->dev,
1555 &sdvo_tv_modes[i]);
1556 if (nmode)
1557 drm_mode_probed_add(connector, nmode);
1558 }
1559 }
1560
1561 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1562 {
1563 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1564 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1565 struct drm_display_mode *newmode;
1566
1567 /*
1568 * Attempt to get the mode list from DDC.
1569 * Assume that the preferred modes are
1570 * arranged in priority order.
1571 */
1572 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1573 if (list_empty(&connector->probed_modes) == false)
1574 goto end;
1575
1576 /* Fetch modes from VBT */
1577 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1578 newmode = drm_mode_duplicate(connector->dev,
1579 dev_priv->sdvo_lvds_vbt_mode);
1580 if (newmode != NULL) {
1581 /* Guarantee the mode is preferred */
1582 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1583 DRM_MODE_TYPE_DRIVER);
1584 drm_mode_probed_add(connector, newmode);
1585 }
1586 }
1587
1588 end:
1589 list_for_each_entry(newmode, &connector->probed_modes, head) {
1590 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1591 intel_sdvo->sdvo_lvds_fixed_mode =
1592 drm_mode_duplicate(connector->dev, newmode);
1593
1594 intel_sdvo->is_lvds = true;
1595 break;
1596 }
1597 }
1598
1599 }
1600
1601 static int intel_sdvo_get_modes(struct drm_connector *connector)
1602 {
1603 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1604
1605 if (IS_TV(intel_sdvo_connector))
1606 intel_sdvo_get_tv_modes(connector);
1607 else if (IS_LVDS(intel_sdvo_connector))
1608 intel_sdvo_get_lvds_modes(connector);
1609 else
1610 intel_sdvo_get_ddc_modes(connector);
1611
1612 return !list_empty(&connector->probed_modes);
1613 }
1614
1615 static void
1616 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1617 {
1618 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1619 struct drm_device *dev = connector->dev;
1620
1621 if (intel_sdvo_connector->left)
1622 drm_property_destroy(dev, intel_sdvo_connector->left);
1623 if (intel_sdvo_connector->right)
1624 drm_property_destroy(dev, intel_sdvo_connector->right);
1625 if (intel_sdvo_connector->top)
1626 drm_property_destroy(dev, intel_sdvo_connector->top);
1627 if (intel_sdvo_connector->bottom)
1628 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1629 if (intel_sdvo_connector->hpos)
1630 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1631 if (intel_sdvo_connector->vpos)
1632 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1633 if (intel_sdvo_connector->saturation)
1634 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1635 if (intel_sdvo_connector->contrast)
1636 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1637 if (intel_sdvo_connector->hue)
1638 drm_property_destroy(dev, intel_sdvo_connector->hue);
1639 if (intel_sdvo_connector->sharpness)
1640 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1641 if (intel_sdvo_connector->flicker_filter)
1642 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1643 if (intel_sdvo_connector->flicker_filter_2d)
1644 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1645 if (intel_sdvo_connector->flicker_filter_adaptive)
1646 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1647 if (intel_sdvo_connector->tv_luma_filter)
1648 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1649 if (intel_sdvo_connector->tv_chroma_filter)
1650 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1651 if (intel_sdvo_connector->dot_crawl)
1652 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1653 if (intel_sdvo_connector->brightness)
1654 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1655 }
1656
1657 static void intel_sdvo_destroy(struct drm_connector *connector)
1658 {
1659 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1660
1661 if (intel_sdvo_connector->tv_format)
1662 drm_property_destroy(connector->dev,
1663 intel_sdvo_connector->tv_format);
1664
1665 intel_sdvo_destroy_enhance_property(connector);
1666 drm_sysfs_connector_remove(connector);
1667 drm_connector_cleanup(connector);
1668 kfree(connector);
1669 }
1670
1671 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1672 {
1673 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1674 struct edid *edid;
1675 bool has_audio = false;
1676
1677 if (!intel_sdvo->is_hdmi)
1678 return false;
1679
1680 edid = intel_sdvo_get_edid(connector);
1681 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1682 has_audio = drm_detect_monitor_audio(edid);
1683
1684 return has_audio;
1685 }
1686
1687 static int
1688 intel_sdvo_set_property(struct drm_connector *connector,
1689 struct drm_property *property,
1690 uint64_t val)
1691 {
1692 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1693 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1694 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1695 uint16_t temp_value;
1696 uint8_t cmd;
1697 int ret;
1698
1699 ret = drm_connector_property_set_value(connector, property, val);
1700 if (ret)
1701 return ret;
1702
1703 if (property == dev_priv->force_audio_property) {
1704 int i = val;
1705 bool has_audio;
1706
1707 if (i == intel_sdvo_connector->force_audio)
1708 return 0;
1709
1710 intel_sdvo_connector->force_audio = i;
1711
1712 if (i == HDMI_AUDIO_AUTO)
1713 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1714 else
1715 has_audio = (i == HDMI_AUDIO_ON);
1716
1717 if (has_audio == intel_sdvo->has_hdmi_audio)
1718 return 0;
1719
1720 intel_sdvo->has_hdmi_audio = has_audio;
1721 goto done;
1722 }
1723
1724 if (property == dev_priv->broadcast_rgb_property) {
1725 if (val == !!intel_sdvo->color_range)
1726 return 0;
1727
1728 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1729 goto done;
1730 }
1731
1732 #define CHECK_PROPERTY(name, NAME) \
1733 if (intel_sdvo_connector->name == property) { \
1734 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1735 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1736 cmd = SDVO_CMD_SET_##NAME; \
1737 intel_sdvo_connector->cur_##name = temp_value; \
1738 goto set_value; \
1739 }
1740
1741 if (property == intel_sdvo_connector->tv_format) {
1742 if (val >= TV_FORMAT_NUM)
1743 return -EINVAL;
1744
1745 if (intel_sdvo->tv_format_index ==
1746 intel_sdvo_connector->tv_format_supported[val])
1747 return 0;
1748
1749 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1750 goto done;
1751 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1752 temp_value = val;
1753 if (intel_sdvo_connector->left == property) {
1754 drm_connector_property_set_value(connector,
1755 intel_sdvo_connector->right, val);
1756 if (intel_sdvo_connector->left_margin == temp_value)
1757 return 0;
1758
1759 intel_sdvo_connector->left_margin = temp_value;
1760 intel_sdvo_connector->right_margin = temp_value;
1761 temp_value = intel_sdvo_connector->max_hscan -
1762 intel_sdvo_connector->left_margin;
1763 cmd = SDVO_CMD_SET_OVERSCAN_H;
1764 goto set_value;
1765 } else if (intel_sdvo_connector->right == property) {
1766 drm_connector_property_set_value(connector,
1767 intel_sdvo_connector->left, val);
1768 if (intel_sdvo_connector->right_margin == temp_value)
1769 return 0;
1770
1771 intel_sdvo_connector->left_margin = temp_value;
1772 intel_sdvo_connector->right_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_hscan -
1774 intel_sdvo_connector->left_margin;
1775 cmd = SDVO_CMD_SET_OVERSCAN_H;
1776 goto set_value;
1777 } else if (intel_sdvo_connector->top == property) {
1778 drm_connector_property_set_value(connector,
1779 intel_sdvo_connector->bottom, val);
1780 if (intel_sdvo_connector->top_margin == temp_value)
1781 return 0;
1782
1783 intel_sdvo_connector->top_margin = temp_value;
1784 intel_sdvo_connector->bottom_margin = temp_value;
1785 temp_value = intel_sdvo_connector->max_vscan -
1786 intel_sdvo_connector->top_margin;
1787 cmd = SDVO_CMD_SET_OVERSCAN_V;
1788 goto set_value;
1789 } else if (intel_sdvo_connector->bottom == property) {
1790 drm_connector_property_set_value(connector,
1791 intel_sdvo_connector->top, val);
1792 if (intel_sdvo_connector->bottom_margin == temp_value)
1793 return 0;
1794
1795 intel_sdvo_connector->top_margin = temp_value;
1796 intel_sdvo_connector->bottom_margin = temp_value;
1797 temp_value = intel_sdvo_connector->max_vscan -
1798 intel_sdvo_connector->top_margin;
1799 cmd = SDVO_CMD_SET_OVERSCAN_V;
1800 goto set_value;
1801 }
1802 CHECK_PROPERTY(hpos, HPOS)
1803 CHECK_PROPERTY(vpos, VPOS)
1804 CHECK_PROPERTY(saturation, SATURATION)
1805 CHECK_PROPERTY(contrast, CONTRAST)
1806 CHECK_PROPERTY(hue, HUE)
1807 CHECK_PROPERTY(brightness, BRIGHTNESS)
1808 CHECK_PROPERTY(sharpness, SHARPNESS)
1809 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1810 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1811 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1812 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1813 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1814 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1815 }
1816
1817 return -EINVAL; /* unknown property */
1818
1819 set_value:
1820 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1821 return -EIO;
1822
1823
1824 done:
1825 if (intel_sdvo->base.base.crtc) {
1826 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1827 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1828 crtc->y, crtc->fb);
1829 }
1830
1831 return 0;
1832 #undef CHECK_PROPERTY
1833 }
1834
1835 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1836 .dpms = intel_sdvo_dpms,
1837 .mode_fixup = intel_sdvo_mode_fixup,
1838 .prepare = intel_encoder_prepare,
1839 .mode_set = intel_sdvo_mode_set,
1840 .commit = intel_encoder_commit,
1841 };
1842
1843 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1844 .dpms = drm_helper_connector_dpms,
1845 .detect = intel_sdvo_detect,
1846 .fill_modes = drm_helper_probe_single_connector_modes,
1847 .set_property = intel_sdvo_set_property,
1848 .destroy = intel_sdvo_destroy,
1849 };
1850
1851 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1852 .get_modes = intel_sdvo_get_modes,
1853 .mode_valid = intel_sdvo_mode_valid,
1854 .best_encoder = intel_best_encoder,
1855 };
1856
1857 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1858 {
1859 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1860
1861 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1862 drm_mode_destroy(encoder->dev,
1863 intel_sdvo->sdvo_lvds_fixed_mode);
1864
1865 i2c_del_adapter(&intel_sdvo->ddc);
1866 intel_encoder_destroy(encoder);
1867 }
1868
1869 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1870 .destroy = intel_sdvo_enc_destroy,
1871 };
1872
1873 static void
1874 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1875 {
1876 uint16_t mask = 0;
1877 unsigned int num_bits;
1878
1879 /* Make a mask of outputs less than or equal to our own priority in the
1880 * list.
1881 */
1882 switch (sdvo->controlled_output) {
1883 case SDVO_OUTPUT_LVDS1:
1884 mask |= SDVO_OUTPUT_LVDS1;
1885 case SDVO_OUTPUT_LVDS0:
1886 mask |= SDVO_OUTPUT_LVDS0;
1887 case SDVO_OUTPUT_TMDS1:
1888 mask |= SDVO_OUTPUT_TMDS1;
1889 case SDVO_OUTPUT_TMDS0:
1890 mask |= SDVO_OUTPUT_TMDS0;
1891 case SDVO_OUTPUT_RGB1:
1892 mask |= SDVO_OUTPUT_RGB1;
1893 case SDVO_OUTPUT_RGB0:
1894 mask |= SDVO_OUTPUT_RGB0;
1895 break;
1896 }
1897
1898 /* Count bits to find what number we are in the priority list. */
1899 mask &= sdvo->caps.output_flags;
1900 num_bits = hweight16(mask);
1901 /* If more than 3 outputs, default to DDC bus 3 for now. */
1902 if (num_bits > 3)
1903 num_bits = 3;
1904
1905 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1906 sdvo->ddc_bus = 1 << num_bits;
1907 }
1908
1909 /**
1910 * Choose the appropriate DDC bus for control bus switch command for this
1911 * SDVO output based on the controlled output.
1912 *
1913 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1914 * outputs, then LVDS outputs.
1915 */
1916 static void
1917 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1918 struct intel_sdvo *sdvo, u32 reg)
1919 {
1920 struct sdvo_device_mapping *mapping;
1921
1922 if (sdvo->is_sdvob)
1923 mapping = &(dev_priv->sdvo_mappings[0]);
1924 else
1925 mapping = &(dev_priv->sdvo_mappings[1]);
1926
1927 if (mapping->initialized)
1928 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1929 else
1930 intel_sdvo_guess_ddc_bus(sdvo);
1931 }
1932
1933 static void
1934 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1935 struct intel_sdvo *sdvo, u32 reg)
1936 {
1937 struct sdvo_device_mapping *mapping;
1938 u8 pin;
1939
1940 if (sdvo->is_sdvob)
1941 mapping = &dev_priv->sdvo_mappings[0];
1942 else
1943 mapping = &dev_priv->sdvo_mappings[1];
1944
1945 pin = GMBUS_PORT_DPB;
1946 if (mapping->initialized)
1947 pin = mapping->i2c_pin;
1948
1949 if (intel_gmbus_is_port_valid(pin)) {
1950 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
1951 intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
1952 intel_gmbus_force_bit(sdvo->i2c, true);
1953 } else {
1954 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
1955 }
1956 }
1957
1958 static bool
1959 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1960 {
1961 return intel_sdvo_check_supp_encode(intel_sdvo);
1962 }
1963
1964 static u8
1965 intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
1966 {
1967 struct drm_i915_private *dev_priv = dev->dev_private;
1968 struct sdvo_device_mapping *my_mapping, *other_mapping;
1969
1970 if (sdvo->is_sdvob) {
1971 my_mapping = &dev_priv->sdvo_mappings[0];
1972 other_mapping = &dev_priv->sdvo_mappings[1];
1973 } else {
1974 my_mapping = &dev_priv->sdvo_mappings[1];
1975 other_mapping = &dev_priv->sdvo_mappings[0];
1976 }
1977
1978 /* If the BIOS described our SDVO device, take advantage of it. */
1979 if (my_mapping->slave_addr)
1980 return my_mapping->slave_addr;
1981
1982 /* If the BIOS only described a different SDVO device, use the
1983 * address that it isn't using.
1984 */
1985 if (other_mapping->slave_addr) {
1986 if (other_mapping->slave_addr == 0x70)
1987 return 0x72;
1988 else
1989 return 0x70;
1990 }
1991
1992 /* No SDVO device info is found for another DVO port,
1993 * so use mapping assumption we had before BIOS parsing.
1994 */
1995 if (sdvo->is_sdvob)
1996 return 0x70;
1997 else
1998 return 0x72;
1999 }
2000
2001 static void
2002 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2003 struct intel_sdvo *encoder)
2004 {
2005 drm_connector_init(encoder->base.base.dev,
2006 &connector->base.base,
2007 &intel_sdvo_connector_funcs,
2008 connector->base.base.connector_type);
2009
2010 drm_connector_helper_add(&connector->base.base,
2011 &intel_sdvo_connector_helper_funcs);
2012
2013 connector->base.base.interlace_allowed = 1;
2014 connector->base.base.doublescan_allowed = 0;
2015 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2016
2017 intel_connector_attach_encoder(&connector->base, &encoder->base);
2018 drm_sysfs_connector_add(&connector->base.base);
2019 }
2020
2021 static void
2022 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2023 {
2024 struct drm_device *dev = connector->base.base.dev;
2025
2026 intel_attach_force_audio_property(&connector->base.base);
2027 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2028 intel_attach_broadcast_rgb_property(&connector->base.base);
2029 }
2030
2031 static bool
2032 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2033 {
2034 struct drm_encoder *encoder = &intel_sdvo->base.base;
2035 struct drm_connector *connector;
2036 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2037 struct intel_connector *intel_connector;
2038 struct intel_sdvo_connector *intel_sdvo_connector;
2039
2040 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2041 if (!intel_sdvo_connector)
2042 return false;
2043
2044 if (device == 0) {
2045 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2046 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2047 } else if (device == 1) {
2048 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2049 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2050 }
2051
2052 intel_connector = &intel_sdvo_connector->base;
2053 connector = &intel_connector->base;
2054 if (intel_sdvo_supports_hotplug(intel_sdvo) & (1 << device)) {
2055 connector->polled = DRM_CONNECTOR_POLL_HPD;
2056 intel_sdvo->hotplug_active[0] |= 1 << device;
2057 /* Some SDVO devices have one-shot hotplug interrupts.
2058 * Ensure that they get re-enabled when an interrupt happens.
2059 */
2060 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2061 intel_sdvo_enable_hotplug(intel_encoder);
2062 }
2063 else
2064 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2065 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2066 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2067
2068 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2069 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2070 intel_sdvo->is_hdmi = true;
2071 }
2072 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2073 (1 << INTEL_ANALOG_CLONE_BIT));
2074
2075 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2076 if (intel_sdvo->is_hdmi)
2077 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2078
2079 return true;
2080 }
2081
2082 static bool
2083 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2084 {
2085 struct drm_encoder *encoder = &intel_sdvo->base.base;
2086 struct drm_connector *connector;
2087 struct intel_connector *intel_connector;
2088 struct intel_sdvo_connector *intel_sdvo_connector;
2089
2090 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2091 if (!intel_sdvo_connector)
2092 return false;
2093
2094 intel_connector = &intel_sdvo_connector->base;
2095 connector = &intel_connector->base;
2096 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2097 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2098
2099 intel_sdvo->controlled_output |= type;
2100 intel_sdvo_connector->output_flag = type;
2101
2102 intel_sdvo->is_tv = true;
2103 intel_sdvo->base.needs_tv_clock = true;
2104 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2105
2106 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2107
2108 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2109 goto err;
2110
2111 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2112 goto err;
2113
2114 return true;
2115
2116 err:
2117 intel_sdvo_destroy(connector);
2118 return false;
2119 }
2120
2121 static bool
2122 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2123 {
2124 struct drm_encoder *encoder = &intel_sdvo->base.base;
2125 struct drm_connector *connector;
2126 struct intel_connector *intel_connector;
2127 struct intel_sdvo_connector *intel_sdvo_connector;
2128
2129 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2130 if (!intel_sdvo_connector)
2131 return false;
2132
2133 intel_connector = &intel_sdvo_connector->base;
2134 connector = &intel_connector->base;
2135 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2136 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2137 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2138
2139 if (device == 0) {
2140 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2141 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2142 } else if (device == 1) {
2143 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2144 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2145 }
2146
2147 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2148 (1 << INTEL_ANALOG_CLONE_BIT));
2149
2150 intel_sdvo_connector_init(intel_sdvo_connector,
2151 intel_sdvo);
2152 return true;
2153 }
2154
2155 static bool
2156 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2157 {
2158 struct drm_encoder *encoder = &intel_sdvo->base.base;
2159 struct drm_connector *connector;
2160 struct intel_connector *intel_connector;
2161 struct intel_sdvo_connector *intel_sdvo_connector;
2162
2163 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2164 if (!intel_sdvo_connector)
2165 return false;
2166
2167 intel_connector = &intel_sdvo_connector->base;
2168 connector = &intel_connector->base;
2169 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2170 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2171
2172 if (device == 0) {
2173 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2174 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2175 } else if (device == 1) {
2176 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2177 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2178 }
2179
2180 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2181 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2182
2183 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2184 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2185 goto err;
2186
2187 return true;
2188
2189 err:
2190 intel_sdvo_destroy(connector);
2191 return false;
2192 }
2193
2194 static bool
2195 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2196 {
2197 intel_sdvo->is_tv = false;
2198 intel_sdvo->base.needs_tv_clock = false;
2199 intel_sdvo->is_lvds = false;
2200
2201 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2202
2203 if (flags & SDVO_OUTPUT_TMDS0)
2204 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2205 return false;
2206
2207 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2208 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2209 return false;
2210
2211 /* TV has no XXX1 function block */
2212 if (flags & SDVO_OUTPUT_SVID0)
2213 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2214 return false;
2215
2216 if (flags & SDVO_OUTPUT_CVBS0)
2217 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2218 return false;
2219
2220 if (flags & SDVO_OUTPUT_YPRPB0)
2221 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2222 return false;
2223
2224 if (flags & SDVO_OUTPUT_RGB0)
2225 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2226 return false;
2227
2228 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2229 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2230 return false;
2231
2232 if (flags & SDVO_OUTPUT_LVDS0)
2233 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2234 return false;
2235
2236 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2237 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2238 return false;
2239
2240 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2241 unsigned char bytes[2];
2242
2243 intel_sdvo->controlled_output = 0;
2244 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2245 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2246 SDVO_NAME(intel_sdvo),
2247 bytes[0], bytes[1]);
2248 return false;
2249 }
2250 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2251
2252 return true;
2253 }
2254
2255 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2256 struct intel_sdvo_connector *intel_sdvo_connector,
2257 int type)
2258 {
2259 struct drm_device *dev = intel_sdvo->base.base.dev;
2260 struct intel_sdvo_tv_format format;
2261 uint32_t format_map, i;
2262
2263 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2264 return false;
2265
2266 BUILD_BUG_ON(sizeof(format) != 6);
2267 if (!intel_sdvo_get_value(intel_sdvo,
2268 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2269 &format, sizeof(format)))
2270 return false;
2271
2272 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2273
2274 if (format_map == 0)
2275 return false;
2276
2277 intel_sdvo_connector->format_supported_num = 0;
2278 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2279 if (format_map & (1 << i))
2280 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2281
2282
2283 intel_sdvo_connector->tv_format =
2284 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2285 "mode", intel_sdvo_connector->format_supported_num);
2286 if (!intel_sdvo_connector->tv_format)
2287 return false;
2288
2289 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2290 drm_property_add_enum(
2291 intel_sdvo_connector->tv_format, i,
2292 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2293
2294 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2295 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2296 intel_sdvo_connector->tv_format, 0);
2297 return true;
2298
2299 }
2300
2301 #define ENHANCEMENT(name, NAME) do { \
2302 if (enhancements.name) { \
2303 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2304 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2305 return false; \
2306 intel_sdvo_connector->max_##name = data_value[0]; \
2307 intel_sdvo_connector->cur_##name = response; \
2308 intel_sdvo_connector->name = \
2309 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2310 if (!intel_sdvo_connector->name) return false; \
2311 drm_connector_attach_property(connector, \
2312 intel_sdvo_connector->name, \
2313 intel_sdvo_connector->cur_##name); \
2314 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2315 data_value[0], data_value[1], response); \
2316 } \
2317 } while (0)
2318
2319 static bool
2320 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2321 struct intel_sdvo_connector *intel_sdvo_connector,
2322 struct intel_sdvo_enhancements_reply enhancements)
2323 {
2324 struct drm_device *dev = intel_sdvo->base.base.dev;
2325 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2326 uint16_t response, data_value[2];
2327
2328 /* when horizontal overscan is supported, Add the left/right property */
2329 if (enhancements.overscan_h) {
2330 if (!intel_sdvo_get_value(intel_sdvo,
2331 SDVO_CMD_GET_MAX_OVERSCAN_H,
2332 &data_value, 4))
2333 return false;
2334
2335 if (!intel_sdvo_get_value(intel_sdvo,
2336 SDVO_CMD_GET_OVERSCAN_H,
2337 &response, 2))
2338 return false;
2339
2340 intel_sdvo_connector->max_hscan = data_value[0];
2341 intel_sdvo_connector->left_margin = data_value[0] - response;
2342 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2343 intel_sdvo_connector->left =
2344 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2345 if (!intel_sdvo_connector->left)
2346 return false;
2347
2348 drm_connector_attach_property(connector,
2349 intel_sdvo_connector->left,
2350 intel_sdvo_connector->left_margin);
2351
2352 intel_sdvo_connector->right =
2353 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2354 if (!intel_sdvo_connector->right)
2355 return false;
2356
2357 drm_connector_attach_property(connector,
2358 intel_sdvo_connector->right,
2359 intel_sdvo_connector->right_margin);
2360 DRM_DEBUG_KMS("h_overscan: max %d, "
2361 "default %d, current %d\n",
2362 data_value[0], data_value[1], response);
2363 }
2364
2365 if (enhancements.overscan_v) {
2366 if (!intel_sdvo_get_value(intel_sdvo,
2367 SDVO_CMD_GET_MAX_OVERSCAN_V,
2368 &data_value, 4))
2369 return false;
2370
2371 if (!intel_sdvo_get_value(intel_sdvo,
2372 SDVO_CMD_GET_OVERSCAN_V,
2373 &response, 2))
2374 return false;
2375
2376 intel_sdvo_connector->max_vscan = data_value[0];
2377 intel_sdvo_connector->top_margin = data_value[0] - response;
2378 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2379 intel_sdvo_connector->top =
2380 drm_property_create_range(dev, 0,
2381 "top_margin", 0, data_value[0]);
2382 if (!intel_sdvo_connector->top)
2383 return false;
2384
2385 drm_connector_attach_property(connector,
2386 intel_sdvo_connector->top,
2387 intel_sdvo_connector->top_margin);
2388
2389 intel_sdvo_connector->bottom =
2390 drm_property_create_range(dev, 0,
2391 "bottom_margin", 0, data_value[0]);
2392 if (!intel_sdvo_connector->bottom)
2393 return false;
2394
2395 drm_connector_attach_property(connector,
2396 intel_sdvo_connector->bottom,
2397 intel_sdvo_connector->bottom_margin);
2398 DRM_DEBUG_KMS("v_overscan: max %d, "
2399 "default %d, current %d\n",
2400 data_value[0], data_value[1], response);
2401 }
2402
2403 ENHANCEMENT(hpos, HPOS);
2404 ENHANCEMENT(vpos, VPOS);
2405 ENHANCEMENT(saturation, SATURATION);
2406 ENHANCEMENT(contrast, CONTRAST);
2407 ENHANCEMENT(hue, HUE);
2408 ENHANCEMENT(sharpness, SHARPNESS);
2409 ENHANCEMENT(brightness, BRIGHTNESS);
2410 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2411 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2412 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2413 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2414 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2415
2416 if (enhancements.dot_crawl) {
2417 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2418 return false;
2419
2420 intel_sdvo_connector->max_dot_crawl = 1;
2421 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2422 intel_sdvo_connector->dot_crawl =
2423 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2424 if (!intel_sdvo_connector->dot_crawl)
2425 return false;
2426
2427 drm_connector_attach_property(connector,
2428 intel_sdvo_connector->dot_crawl,
2429 intel_sdvo_connector->cur_dot_crawl);
2430 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2431 }
2432
2433 return true;
2434 }
2435
2436 static bool
2437 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2438 struct intel_sdvo_connector *intel_sdvo_connector,
2439 struct intel_sdvo_enhancements_reply enhancements)
2440 {
2441 struct drm_device *dev = intel_sdvo->base.base.dev;
2442 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2443 uint16_t response, data_value[2];
2444
2445 ENHANCEMENT(brightness, BRIGHTNESS);
2446
2447 return true;
2448 }
2449 #undef ENHANCEMENT
2450
2451 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2452 struct intel_sdvo_connector *intel_sdvo_connector)
2453 {
2454 union {
2455 struct intel_sdvo_enhancements_reply reply;
2456 uint16_t response;
2457 } enhancements;
2458
2459 BUILD_BUG_ON(sizeof(enhancements) != 2);
2460
2461 enhancements.response = 0;
2462 intel_sdvo_get_value(intel_sdvo,
2463 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2464 &enhancements, sizeof(enhancements));
2465 if (enhancements.response == 0) {
2466 DRM_DEBUG_KMS("No enhancement is supported\n");
2467 return true;
2468 }
2469
2470 if (IS_TV(intel_sdvo_connector))
2471 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2472 else if (IS_LVDS(intel_sdvo_connector))
2473 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2474 else
2475 return true;
2476 }
2477
2478 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2479 struct i2c_msg *msgs,
2480 int num)
2481 {
2482 struct intel_sdvo *sdvo = adapter->algo_data;
2483
2484 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2485 return -EIO;
2486
2487 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2488 }
2489
2490 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2491 {
2492 struct intel_sdvo *sdvo = adapter->algo_data;
2493 return sdvo->i2c->algo->functionality(sdvo->i2c);
2494 }
2495
2496 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2497 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2498 .functionality = intel_sdvo_ddc_proxy_func
2499 };
2500
2501 static bool
2502 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2503 struct drm_device *dev)
2504 {
2505 sdvo->ddc.owner = THIS_MODULE;
2506 sdvo->ddc.class = I2C_CLASS_DDC;
2507 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2508 sdvo->ddc.dev.parent = &dev->pdev->dev;
2509 sdvo->ddc.algo_data = sdvo;
2510 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2511
2512 return i2c_add_adapter(&sdvo->ddc) == 0;
2513 }
2514
2515 bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
2516 {
2517 struct drm_i915_private *dev_priv = dev->dev_private;
2518 struct intel_encoder *intel_encoder;
2519 struct intel_sdvo *intel_sdvo;
2520 int i;
2521
2522 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2523 if (!intel_sdvo)
2524 return false;
2525
2526 intel_sdvo->sdvo_reg = sdvo_reg;
2527 intel_sdvo->is_sdvob = is_sdvob;
2528 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
2529 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2530 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2531 kfree(intel_sdvo);
2532 return false;
2533 }
2534
2535 /* encoder type will be decided later */
2536 intel_encoder = &intel_sdvo->base;
2537 intel_encoder->type = INTEL_OUTPUT_SDVO;
2538 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2539
2540 /* Read the regs to test if we can talk to the device */
2541 for (i = 0; i < 0x40; i++) {
2542 u8 byte;
2543
2544 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2545 DRM_DEBUG_KMS("No SDVO device found on %s\n",
2546 SDVO_NAME(intel_sdvo));
2547 goto err;
2548 }
2549 }
2550
2551 if (intel_sdvo->is_sdvob)
2552 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2553 else
2554 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2555
2556 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2557
2558 /* In default case sdvo lvds is false */
2559 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2560 goto err;
2561
2562 /* Set up hotplug command - note paranoia about contents of reply.
2563 * We assume that the hardware is in a sane state, and only touch
2564 * the bits we think we understand.
2565 */
2566 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG,
2567 &intel_sdvo->hotplug_active, 2);
2568 intel_sdvo->hotplug_active[0] &= ~0x3;
2569
2570 if (intel_sdvo_output_setup(intel_sdvo,
2571 intel_sdvo->caps.output_flags) != true) {
2572 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
2573 SDVO_NAME(intel_sdvo));
2574 goto err;
2575 }
2576
2577 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2578
2579 /* Set the input timing to the screen. Assume always input 0. */
2580 if (!intel_sdvo_set_target_input(intel_sdvo))
2581 goto err;
2582
2583 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2584 &intel_sdvo->pixel_clock_min,
2585 &intel_sdvo->pixel_clock_max))
2586 goto err;
2587
2588 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2589 "clock range %dMHz - %dMHz, "
2590 "input 1: %c, input 2: %c, "
2591 "output 1: %c, output 2: %c\n",
2592 SDVO_NAME(intel_sdvo),
2593 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2594 intel_sdvo->caps.device_rev_id,
2595 intel_sdvo->pixel_clock_min / 1000,
2596 intel_sdvo->pixel_clock_max / 1000,
2597 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2598 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2599 /* check currently supported outputs */
2600 intel_sdvo->caps.output_flags &
2601 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2602 intel_sdvo->caps.output_flags &
2603 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2604 return true;
2605
2606 err:
2607 drm_encoder_cleanup(&intel_encoder->base);
2608 i2c_del_adapter(&intel_sdvo->ddc);
2609 kfree(intel_sdvo);
2610
2611 return false;
2612 }
ubuntu-zesty-kernel mirror