drivers/gpu/drm/i915/intel_uncore.h

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef __INTEL_UNCORE_H__
  26 #define __INTEL_UNCORE_H__
  27
  28 struct drm_i915_private;
  29
  30 enum forcewake_domain_id {
  31         FW_DOMAIN_ID_RENDER = 0,
  32         FW_DOMAIN_ID_BLITTER,
  33         FW_DOMAIN_ID_MEDIA,
  34
  35         FW_DOMAIN_ID_COUNT
  36 };
  37
  38 enum forcewake_domains {
  39         FORCEWAKE_RENDER = BIT(FW_DOMAIN_ID_RENDER),
  40         FORCEWAKE_BLITTER = BIT(FW_DOMAIN_ID_BLITTER),
  41         FORCEWAKE_MEDIA = BIT(FW_DOMAIN_ID_MEDIA),
  42         FORCEWAKE_ALL = (FORCEWAKE_RENDER |
  43                          FORCEWAKE_BLITTER |
  44                          FORCEWAKE_MEDIA)
  45 };
  46
  47 struct intel_uncore_funcs {
  48         void (*force_wake_get)(struct drm_i915_private *dev_priv,
  49                                enum forcewake_domains domains);
  50         void (*force_wake_put)(struct drm_i915_private *dev_priv,
  51                                enum forcewake_domains domains);
  52
  53         uint8_t  (*mmio_readb)(struct drm_i915_private *dev_priv,
  54                                i915_reg_t r, bool trace);
  55         uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv,
  56                                i915_reg_t r, bool trace);
  57         uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv,
  58                                i915_reg_t r, bool trace);
  59         uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv,
  60                                i915_reg_t r, bool trace);
  61
  62         void (*mmio_writeb)(struct drm_i915_private *dev_priv,
  63                             i915_reg_t r, uint8_t val, bool trace);
  64         void (*mmio_writew)(struct drm_i915_private *dev_priv,
  65                             i915_reg_t r, uint16_t val, bool trace);
  66         void (*mmio_writel)(struct drm_i915_private *dev_priv,
  67                             i915_reg_t r, uint32_t val, bool trace);
  68 };
  69
  70 struct intel_forcewake_range {
  71         u32 start;
  72         u32 end;
  73
  74         enum forcewake_domains domains;
  75 };
  76
  77 struct intel_uncore {
  78         spinlock_t lock; /** lock is also taken in irq contexts. */
  79
  80         const struct intel_forcewake_range *fw_domains_table;
  81         unsigned int fw_domains_table_entries;
  82
  83         struct notifier_block pmic_bus_access_nb;
  84         struct intel_uncore_funcs funcs;
  85
  86         unsigned int fifo_count;
  87
  88         enum forcewake_domains fw_domains;
  89         enum forcewake_domains fw_domains_active;
  90
  91         u32 fw_set;
  92         u32 fw_clear;
  93         u32 fw_reset;
  94
  95         struct intel_uncore_forcewake_domain {
  96                 enum forcewake_domain_id id;
  97                 enum forcewake_domains mask;
  98                 unsigned int wake_count;
  99                 bool active;
 100                 struct hrtimer timer;
 101                 i915_reg_t reg_set;
 102                 i915_reg_t reg_ack;
 103         } fw_domain[FW_DOMAIN_ID_COUNT];
 104
 105         struct {
 106                 unsigned int count;
 107
 108                 int saved_mmio_check;
 109                 int saved_mmio_debug;
 110         } user_forcewake;
 111
 112         int unclaimed_mmio_check;
 113 };
 114
 115 /* Iterate over initialised fw domains */
 116 #define for_each_fw_domain_masked(domain__, mask__, dev_priv__, tmp__) \
 117         for (tmp__ = (mask__); \
 118              tmp__ ? (domain__ = &(dev_priv__)->uncore.fw_domain[__mask_next_bit(tmp__)]), 1 : 0;)
 119
 120 #define for_each_fw_domain(domain__, dev_priv__, tmp__) \
 121         for_each_fw_domain_masked(domain__, (dev_priv__)->uncore.fw_domains, dev_priv__, tmp__)
 122
 123
 124 void intel_uncore_sanitize(struct drm_i915_private *dev_priv);
 125 void intel_uncore_init(struct drm_i915_private *dev_priv);
 126 bool intel_uncore_unclaimed_mmio(struct drm_i915_private *dev_priv);
 127 bool intel_uncore_arm_unclaimed_mmio_detection(struct drm_i915_private *dev_priv);
 128 void intel_uncore_fini(struct drm_i915_private *dev_priv);
 129 void intel_uncore_suspend(struct drm_i915_private *dev_priv);
 130 void intel_uncore_resume_early(struct drm_i915_private *dev_priv);
 131
 132 u64 intel_uncore_edram_size(struct drm_i915_private *dev_priv);
 133 void assert_forcewakes_inactive(struct drm_i915_private *dev_priv);
 134 const char *intel_uncore_forcewake_domain_to_str(const enum forcewake_domain_id id);
 135
 136 enum forcewake_domains
 137 intel_uncore_forcewake_for_reg(struct drm_i915_private *dev_priv,
 138                                i915_reg_t reg, unsigned int op);
 139 #define FW_REG_READ  (1)
 140 #define FW_REG_WRITE (2)
 141
 142 void intel_uncore_forcewake_get(struct drm_i915_private *dev_priv,
 143                                 enum forcewake_domains domains);
 144 void intel_uncore_forcewake_put(struct drm_i915_private *dev_priv,
 145                                 enum forcewake_domains domains);
 146 /* Like above but the caller must manage the uncore.lock itself.
 147  * Must be used with I915_READ_FW and friends.
 148  */
 149 void intel_uncore_forcewake_get__locked(struct drm_i915_private *dev_priv,
 150                                         enum forcewake_domains domains);
 151 void intel_uncore_forcewake_put__locked(struct drm_i915_private *dev_priv,
 152                                         enum forcewake_domains domains);
 153
 154 void intel_uncore_forcewake_user_get(struct drm_i915_private *dev_priv);
 155 void intel_uncore_forcewake_user_put(struct drm_i915_private *dev_priv);
 156
 157 int intel_wait_for_register(struct drm_i915_private *dev_priv,
 158                             i915_reg_t reg,
 159                             u32 mask,
 160                             u32 value,
 161                             unsigned int timeout_ms);
 162 int __intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
 163                                  i915_reg_t reg,
 164                                  u32 mask,
 165                                  u32 value,
 166                                  unsigned int fast_timeout_us,
 167                                  unsigned int slow_timeout_ms,
 168                                  u32 *out_value);
 169 static inline
 170 int intel_wait_for_register_fw(struct drm_i915_private *dev_priv,
 171                                i915_reg_t reg,
 172                                u32 mask,
 173                                u32 value,
 174                                unsigned int timeout_ms)
 175 {
 176         return __intel_wait_for_register_fw(dev_priv, reg, mask, value,
 177                                             2, timeout_ms, NULL);
 178 }
 179
 180 #endif /* !__INTEL_UNCORE_H__ */