drivers/gpu/drm/msm/adreno/a5xx_gpu.h

   1 /* Copyright (c) 2016 The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  */
  13 #ifndef __A5XX_GPU_H__
  14 #define __A5XX_GPU_H__
  15
  16 #include "adreno_gpu.h"
  17
  18 /* Bringing over the hack from the previous targets */
  19 #undef ROP_COPY
  20 #undef ROP_XOR
  21
  22 #include "a5xx.xml.h"
  23
  24 struct a5xx_gpu {
  25         struct adreno_gpu base;
  26         struct platform_device *pdev;
  27
  28         struct drm_gem_object *pm4_bo;
  29         uint64_t pm4_iova;
  30
  31         struct drm_gem_object *pfp_bo;
  32         uint64_t pfp_iova;
  33
  34         struct drm_gem_object *gpmu_bo;
  35         uint64_t gpmu_iova;
  36         uint32_t gpmu_dwords;
  37
  38         uint32_t lm_leakage;
  39 };
  40
  41 #define to_a5xx_gpu(x) container_of(x, struct a5xx_gpu, base)
  42
  43 int a5xx_power_init(struct msm_gpu *gpu);
  44 void a5xx_gpmu_ucode_init(struct msm_gpu *gpu);
  45
  46 static inline int spin_usecs(struct msm_gpu *gpu, uint32_t usecs,
  47                 uint32_t reg, uint32_t mask, uint32_t value)
  48 {
  49         while (usecs--) {
  50                 udelay(1);
  51                 if ((gpu_read(gpu, reg) & mask) == value)
  52                         return 0;
  53                 cpu_relax();
  54         }
  55
  56         return -ETIMEDOUT;
  57 }
  58
  59 bool a5xx_idle(struct msm_gpu *gpu);
  60 void a5xx_set_hwcg(struct msm_gpu *gpu, bool state);
  61
  62 #endif /* __A5XX_GPU_H__ */