drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* Copyright (c) 2012, 2017-2018, The Linux Foundation. All rights reserved.
   3  */
   4
   5 #ifndef __DPU_IO_UTIL_H__
   6 #define __DPU_IO_UTIL_H__
   7
   8 #include <linux/gpio.h>
   9 #include <linux/platform_device.h>
  10 #include <linux/types.h>
  11
  12 #define DEV_DBG(fmt, args...)   pr_debug(fmt, ##args)
  13 #define DEV_INFO(fmt, args...)  pr_info(fmt, ##args)
  14 #define DEV_WARN(fmt, args...)  pr_warn(fmt, ##args)
  15 #define DEV_ERR(fmt, args...)   pr_err(fmt, ##args)
  16
  17 struct dss_gpio {
  18         unsigned int gpio;
  19         unsigned int value;
  20         char gpio_name[32];
  21 };
  22
  23 enum dss_clk_type {
  24         DSS_CLK_AHB, /* no set rate. rate controlled through rpm */
  25         DSS_CLK_PCLK,
  26 };
  27
  28 struct dss_clk {
  29         struct clk *clk; /* clk handle */
  30         char clk_name[32];
  31         enum dss_clk_type type;
  32         unsigned long rate;
  33         unsigned long max_rate;
  34 };
  35
  36 struct dss_module_power {
  37         unsigned int num_gpio;
  38         struct dss_gpio *gpio_config;
  39         unsigned int num_clk;
  40         struct dss_clk *clk_config;
  41 };
  42
  43 int msm_dss_get_clk(struct device *dev, struct dss_clk *clk_arry, int num_clk);
  44 void msm_dss_put_clk(struct dss_clk *clk_arry, int num_clk);
  45 int msm_dss_clk_set_rate(struct dss_clk *clk_arry, int num_clk);
  46 int msm_dss_enable_clk(struct dss_clk *clk_arry, int num_clk, int enable);
  47 int msm_dss_parse_clock(struct platform_device *pdev,
  48                 struct dss_module_power *mp);
  49 #endif /* __DPU_IO_UTIL_H__ */