2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #ifndef __HDMI_CONNECTOR_H__
19 #define __HDMI_CONNECTOR_H__
21 #include <linux/i2c.h>
22 #include <linux/clk.h>
23 #include <linux/platform_device.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/hdmi.h>
30 #define HDMI_MAX_NUM_GPIO 6
33 struct hdmi_platform_config
;
35 struct hdmi_gpio_data
{
44 struct hdmi_audio_infoframe infoframe
;
48 struct hdmi_hdcp_ctrl
;
51 struct drm_device
*dev
;
52 struct platform_device
*pdev
;
54 const struct hdmi_platform_config
*config
;
57 struct hdmi_audio audio
;
61 unsigned long int pixclock
;
64 void __iomem
*qfprom_mmio
;
65 phys_addr_t mmio_phy_addr
;
67 struct regulator
**hpd_regs
;
68 struct regulator
**pwr_regs
;
69 struct clk
**hpd_clks
;
70 struct clk
**pwr_clks
;
73 struct device
*phy_dev
;
75 struct i2c_adapter
*i2c
;
76 struct drm_connector
*connector
;
77 struct drm_bridge
*bridge
;
79 /* the encoder we are hooked to (outside of hdmi block) */
80 struct drm_encoder
*encoder
;
82 bool hdmi_mode
; /* are we in hdmi mode? */
85 struct workqueue_struct
*workq
;
87 struct hdmi_hdcp_ctrl
*hdcp_ctrl
;
90 * spinlock to protect registers shared by different execution
92 * REG_HDMI_DDC_ARBITRATION
93 * REG_HDMI_HDCP_INT_CTRL
99 /* platform config data (ie. from DT, or pdata) */
100 struct hdmi_platform_config
{
101 const char *mmio_name
;
102 const char *qfprom_mmio_name
;
104 /* regulators that need to be on for hpd: */
105 const char **hpd_reg_names
;
108 /* regulators that need to be on for screen pwr: */
109 const char **pwr_reg_names
;
112 /* clks that need to be on for hpd: */
113 const char **hpd_clk_names
;
114 const long unsigned *hpd_freq
;
117 /* clks that need to be on for screen pwr (ie pixel clk): */
118 const char **pwr_clk_names
;
122 struct hdmi_gpio_data gpios
[HDMI_MAX_NUM_GPIO
];
125 void msm_hdmi_set_mode(struct hdmi
*hdmi
, bool power_on
);
127 static inline void hdmi_write(struct hdmi
*hdmi
, u32 reg
, u32 data
)
129 msm_writel(data
, hdmi
->mmio
+ reg
);
132 static inline u32
hdmi_read(struct hdmi
*hdmi
, u32 reg
)
134 return msm_readl(hdmi
->mmio
+ reg
);
137 static inline u32
hdmi_qfprom_read(struct hdmi
*hdmi
, u32 reg
)
139 return msm_readl(hdmi
->qfprom_mmio
+ reg
);
154 struct hdmi_phy_cfg
{
155 enum hdmi_phy_type type
;
156 void (*powerup
)(struct hdmi_phy
*phy
, unsigned long int pixclock
);
157 void (*powerdown
)(struct hdmi_phy
*phy
);
158 const char * const *reg_names
;
160 const char * const *clk_names
;
164 extern const struct hdmi_phy_cfg msm_hdmi_phy_8x60_cfg
;
165 extern const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg
;
166 extern const struct hdmi_phy_cfg msm_hdmi_phy_8x74_cfg
;
167 extern const struct hdmi_phy_cfg msm_hdmi_phy_8996_cfg
;
170 struct platform_device
*pdev
;
172 struct hdmi_phy_cfg
*cfg
;
173 const struct hdmi_phy_funcs
*funcs
;
174 struct regulator
**regs
;
178 static inline void hdmi_phy_write(struct hdmi_phy
*phy
, u32 reg
, u32 data
)
180 msm_writel(data
, phy
->mmio
+ reg
);
183 static inline u32
hdmi_phy_read(struct hdmi_phy
*phy
, u32 reg
)
185 return msm_readl(phy
->mmio
+ reg
);
188 int msm_hdmi_phy_resource_enable(struct hdmi_phy
*phy
);
189 void msm_hdmi_phy_resource_disable(struct hdmi_phy
*phy
);
190 void msm_hdmi_phy_powerup(struct hdmi_phy
*phy
, unsigned long int pixclock
);
191 void msm_hdmi_phy_powerdown(struct hdmi_phy
*phy
);
192 void __init
msm_hdmi_phy_driver_register(void);
193 void __exit
msm_hdmi_phy_driver_unregister(void);
195 #ifdef CONFIG_COMMON_CLK
196 int msm_hdmi_pll_8960_init(struct platform_device
*pdev
);
197 int msm_hdmi_pll_8996_init(struct platform_device
*pdev
);
199 static inline int msm_hdmi_pll_8960_init(struct platform_device
*pdev
)
204 static inline int msm_hdmi_pll_8996_init(struct platform_device
*pdev
)
214 int msm_hdmi_audio_update(struct hdmi
*hdmi
);
215 int msm_hdmi_audio_info_setup(struct hdmi
*hdmi
, bool enabled
,
216 uint32_t num_of_channels
, uint32_t channel_allocation
,
217 uint32_t level_shift
, bool down_mix
);
218 void msm_hdmi_audio_set_sample_rate(struct hdmi
*hdmi
, int rate
);
225 struct drm_bridge
*msm_hdmi_bridge_init(struct hdmi
*hdmi
);
226 void msm_hdmi_bridge_destroy(struct drm_bridge
*bridge
);
232 void msm_hdmi_connector_irq(struct drm_connector
*connector
);
233 struct drm_connector
*msm_hdmi_connector_init(struct hdmi
*hdmi
);
236 * i2c adapter for ddc:
239 void msm_hdmi_i2c_irq(struct i2c_adapter
*i2c
);
240 void msm_hdmi_i2c_destroy(struct i2c_adapter
*i2c
);
241 struct i2c_adapter
*msm_hdmi_i2c_init(struct hdmi
*hdmi
);
246 #ifdef CONFIG_DRM_MSM_HDMI_HDCP
247 struct hdmi_hdcp_ctrl
*msm_hdmi_hdcp_init(struct hdmi
*hdmi
);
248 void msm_hdmi_hdcp_destroy(struct hdmi
*hdmi
);
249 void msm_hdmi_hdcp_on(struct hdmi_hdcp_ctrl
*hdcp_ctrl
);
250 void msm_hdmi_hdcp_off(struct hdmi_hdcp_ctrl
*hdcp_ctrl
);
251 void msm_hdmi_hdcp_irq(struct hdmi_hdcp_ctrl
*hdcp_ctrl
);
253 static inline struct hdmi_hdcp_ctrl
*msm_hdmi_hdcp_init(struct hdmi
*hdmi
)
255 return ERR_PTR(-ENXIO
);
257 static inline void msm_hdmi_hdcp_destroy(struct hdmi
*hdmi
) {}
258 static inline void msm_hdmi_hdcp_on(struct hdmi_hdcp_ctrl
*hdcp_ctrl
) {}
259 static inline void msm_hdmi_hdcp_off(struct hdmi_hdcp_ctrl
*hdcp_ctrl
) {}
260 static inline void msm_hdmi_hdcp_irq(struct hdmi_hdcp_ctrl
*hdcp_ctrl
) {}
263 #endif /* __HDMI_CONNECTOR_H__ */