2 * Copyright (C) 2013 Red Hat
3 * Author: Rob Clark <robdclark@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include "msm_debugfs.h"
20 #include "msm_fence.h"
24 static void msm_fb_output_poll_changed(struct drm_device
*dev
)
26 struct msm_drm_private
*priv
= dev
->dev_private
;
28 drm_fb_helper_hotplug_event(priv
->fbdev
);
31 static const struct drm_mode_config_funcs mode_config_funcs
= {
32 .fb_create
= msm_framebuffer_create
,
33 .output_poll_changed
= msm_fb_output_poll_changed
,
34 .atomic_check
= msm_atomic_check
,
35 .atomic_commit
= msm_atomic_commit
,
38 int msm_register_mmu(struct drm_device
*dev
, struct msm_mmu
*mmu
)
40 struct msm_drm_private
*priv
= dev
->dev_private
;
41 int idx
= priv
->num_mmus
++;
43 if (WARN_ON(idx
>= ARRAY_SIZE(priv
->mmus
)))
46 priv
->mmus
[idx
] = mmu
;
51 #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING
52 static bool reglog
= false;
53 MODULE_PARM_DESC(reglog
, "Enable register read/write logging");
54 module_param(reglog
, bool, 0600);
59 #ifdef CONFIG_DRM_FBDEV_EMULATION
60 static bool fbdev
= true;
61 MODULE_PARM_DESC(fbdev
, "Enable fbdev compat layer");
62 module_param(fbdev
, bool, 0600);
65 static char *vram
= "16m";
66 MODULE_PARM_DESC(vram
, "Configure VRAM size (for devices without IOMMU/GPUMMU)");
67 module_param(vram
, charp
, 0);
73 void __iomem
*msm_ioremap(struct platform_device
*pdev
, const char *name
,
81 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, name
);
83 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
86 dev_err(&pdev
->dev
, "failed to get memory resource: %s\n", name
);
87 return ERR_PTR(-EINVAL
);
90 size
= resource_size(res
);
92 ptr
= devm_ioremap_nocache(&pdev
->dev
, res
->start
, size
);
94 dev_err(&pdev
->dev
, "failed to ioremap: %s\n", name
);
95 return ERR_PTR(-ENOMEM
);
99 printk(KERN_DEBUG
"IO:region %s %p %08lx\n", dbgname
, ptr
, size
);
104 void msm_writel(u32 data
, void __iomem
*addr
)
107 printk(KERN_DEBUG
"IO:W %p %08x\n", addr
, data
);
111 u32
msm_readl(const void __iomem
*addr
)
113 u32 val
= readl(addr
);
115 printk(KERN_ERR
"IO:R %p %08x\n", addr
, val
);
119 struct vblank_event
{
120 struct list_head node
;
125 static void vblank_ctrl_worker(struct work_struct
*work
)
127 struct msm_vblank_ctrl
*vbl_ctrl
= container_of(work
,
128 struct msm_vblank_ctrl
, work
);
129 struct msm_drm_private
*priv
= container_of(vbl_ctrl
,
130 struct msm_drm_private
, vblank_ctrl
);
131 struct msm_kms
*kms
= priv
->kms
;
132 struct vblank_event
*vbl_ev
, *tmp
;
135 spin_lock_irqsave(&vbl_ctrl
->lock
, flags
);
136 list_for_each_entry_safe(vbl_ev
, tmp
, &vbl_ctrl
->event_list
, node
) {
137 list_del(&vbl_ev
->node
);
138 spin_unlock_irqrestore(&vbl_ctrl
->lock
, flags
);
141 kms
->funcs
->enable_vblank(kms
,
142 priv
->crtcs
[vbl_ev
->crtc_id
]);
144 kms
->funcs
->disable_vblank(kms
,
145 priv
->crtcs
[vbl_ev
->crtc_id
]);
149 spin_lock_irqsave(&vbl_ctrl
->lock
, flags
);
152 spin_unlock_irqrestore(&vbl_ctrl
->lock
, flags
);
155 static int vblank_ctrl_queue_work(struct msm_drm_private
*priv
,
156 int crtc_id
, bool enable
)
158 struct msm_vblank_ctrl
*vbl_ctrl
= &priv
->vblank_ctrl
;
159 struct vblank_event
*vbl_ev
;
162 vbl_ev
= kzalloc(sizeof(*vbl_ev
), GFP_ATOMIC
);
166 vbl_ev
->crtc_id
= crtc_id
;
167 vbl_ev
->enable
= enable
;
169 spin_lock_irqsave(&vbl_ctrl
->lock
, flags
);
170 list_add_tail(&vbl_ev
->node
, &vbl_ctrl
->event_list
);
171 spin_unlock_irqrestore(&vbl_ctrl
->lock
, flags
);
173 queue_work(priv
->wq
, &vbl_ctrl
->work
);
178 static int msm_drm_uninit(struct device
*dev
)
180 struct platform_device
*pdev
= to_platform_device(dev
);
181 struct drm_device
*ddev
= platform_get_drvdata(pdev
);
182 struct msm_drm_private
*priv
= ddev
->dev_private
;
183 struct msm_kms
*kms
= priv
->kms
;
184 struct msm_gpu
*gpu
= priv
->gpu
;
185 struct msm_vblank_ctrl
*vbl_ctrl
= &priv
->vblank_ctrl
;
186 struct vblank_event
*vbl_ev
, *tmp
;
188 /* We must cancel and cleanup any pending vblank enable/disable
189 * work before drm_irq_uninstall() to avoid work re-enabling an
190 * irq after uninstall has disabled it.
192 cancel_work_sync(&vbl_ctrl
->work
);
193 list_for_each_entry_safe(vbl_ev
, tmp
, &vbl_ctrl
->event_list
, node
) {
194 list_del(&vbl_ev
->node
);
198 drm_kms_helper_poll_fini(ddev
);
200 drm_connector_unregister_all(ddev
);
202 drm_dev_unregister(ddev
);
204 #ifdef CONFIG_DRM_FBDEV_EMULATION
205 if (fbdev
&& priv
->fbdev
)
206 msm_fbdev_free(ddev
);
208 drm_mode_config_cleanup(ddev
);
210 pm_runtime_get_sync(dev
);
211 drm_irq_uninstall(ddev
);
212 pm_runtime_put_sync(dev
);
214 flush_workqueue(priv
->wq
);
215 destroy_workqueue(priv
->wq
);
217 flush_workqueue(priv
->atomic_wq
);
218 destroy_workqueue(priv
->atomic_wq
);
221 pm_runtime_disable(dev
);
222 kms
->funcs
->destroy(kms
);
226 mutex_lock(&ddev
->struct_mutex
);
227 gpu
->funcs
->pm_suspend(gpu
);
228 mutex_unlock(&ddev
->struct_mutex
);
229 gpu
->funcs
->destroy(gpu
);
232 if (priv
->vram
.paddr
) {
233 DEFINE_DMA_ATTRS(attrs
);
234 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING
, &attrs
);
235 drm_mm_takedown(&priv
->vram
.mm
);
236 dma_free_attrs(dev
, priv
->vram
.size
, NULL
,
237 priv
->vram
.paddr
, &attrs
);
240 component_unbind_all(dev
, ddev
);
242 ddev
->dev_private
= NULL
;
250 static int get_mdp_ver(struct platform_device
*pdev
)
252 struct device
*dev
= &pdev
->dev
;
254 return (int) (unsigned long) of_device_get_match_data(dev
);
257 #include <linux/of_address.h>
259 static int msm_init_vram(struct drm_device
*dev
)
261 struct msm_drm_private
*priv
= dev
->dev_private
;
262 struct device_node
*node
;
263 unsigned long size
= 0;
266 /* In the device-tree world, we could have a 'memory-region'
267 * phandle, which gives us a link to our "vram". Allocating
268 * is all nicely abstracted behind the dma api, but we need
269 * to know the entire size to allocate it all in one go. There
271 * 1) device with no IOMMU, in which case we need exclusive
272 * access to a VRAM carveout big enough for all gpu
274 * 2) device with IOMMU, but where the bootloader puts up
275 * a splash screen. In this case, the VRAM carveout
276 * need only be large enough for fbdev fb. But we need
277 * exclusive access to the buffer to avoid the kernel
278 * using those pages for other purposes (which appears
279 * as corruption on screen before we have a chance to
280 * load and do initial modeset)
283 node
= of_parse_phandle(dev
->dev
->of_node
, "memory-region", 0);
286 ret
= of_address_to_resource(node
, 0, &r
);
289 size
= r
.end
- r
.start
;
290 DRM_INFO("using VRAM carveout: %lx@%pa\n", size
, &r
.start
);
292 /* if we have no IOMMU, then we need to use carveout allocator.
293 * Grab the entire CMA chunk carved out in early startup in
296 } else if (!iommu_present(&platform_bus_type
)) {
297 DRM_INFO("using %s VRAM carveout\n", vram
);
298 size
= memparse(vram
, NULL
);
302 DEFINE_DMA_ATTRS(attrs
);
305 priv
->vram
.size
= size
;
307 drm_mm_init(&priv
->vram
.mm
, 0, (size
>> PAGE_SHIFT
) - 1);
309 dma_set_attr(DMA_ATTR_NO_KERNEL_MAPPING
, &attrs
);
310 dma_set_attr(DMA_ATTR_WRITE_COMBINE
, &attrs
);
312 /* note that for no-kernel-mapping, the vaddr returned
313 * is bogus, but non-null if allocation succeeded:
315 p
= dma_alloc_attrs(dev
->dev
, size
,
316 &priv
->vram
.paddr
, GFP_KERNEL
, &attrs
);
318 dev_err(dev
->dev
, "failed to allocate VRAM\n");
319 priv
->vram
.paddr
= 0;
323 dev_info(dev
->dev
, "VRAM: %08x->%08x\n",
324 (uint32_t)priv
->vram
.paddr
,
325 (uint32_t)(priv
->vram
.paddr
+ size
));
331 static int msm_drm_init(struct device
*dev
, struct drm_driver
*drv
)
333 struct platform_device
*pdev
= to_platform_device(dev
);
334 struct drm_device
*ddev
;
335 struct msm_drm_private
*priv
;
339 ddev
= drm_dev_alloc(drv
, dev
);
341 dev_err(dev
, "failed to allocate drm_device\n");
345 platform_set_drvdata(pdev
, ddev
);
346 ddev
->platformdev
= pdev
;
348 priv
= kzalloc(sizeof(*priv
), GFP_KERNEL
);
354 ddev
->dev_private
= priv
;
356 priv
->wq
= alloc_ordered_workqueue("msm", 0);
357 priv
->atomic_wq
= alloc_ordered_workqueue("msm:atomic", 0);
358 init_waitqueue_head(&priv
->pending_crtcs_event
);
360 INIT_LIST_HEAD(&priv
->inactive_list
);
361 INIT_LIST_HEAD(&priv
->vblank_ctrl
.event_list
);
362 INIT_WORK(&priv
->vblank_ctrl
.work
, vblank_ctrl_worker
);
363 spin_lock_init(&priv
->vblank_ctrl
.lock
);
365 drm_mode_config_init(ddev
);
367 /* Bind all our sub-components: */
368 ret
= component_bind_all(dev
, ddev
);
375 ret
= msm_init_vram(ddev
);
379 switch (get_mdp_ver(pdev
)) {
381 kms
= mdp4_kms_init(ddev
);
384 kms
= mdp5_kms_init(ddev
);
387 kms
= ERR_PTR(-ENODEV
);
393 * NOTE: once we have GPU support, having no kms should not
394 * be considered fatal.. ideally we would still support gpu
395 * and (for example) use dmabuf/prime to share buffers with
396 * imx drm driver on iMX5
398 dev_err(dev
, "failed to load kms\n");
406 pm_runtime_enable(dev
);
407 ret
= kms
->funcs
->hw_init(kms
);
409 dev_err(dev
, "kms hw init failed: %d\n", ret
);
414 ddev
->mode_config
.funcs
= &mode_config_funcs
;
416 ret
= drm_vblank_init(ddev
, priv
->num_crtcs
);
418 dev_err(dev
, "failed to initialize vblank\n");
422 pm_runtime_get_sync(dev
);
423 ret
= drm_irq_install(ddev
, platform_get_irq(pdev
, 0));
424 pm_runtime_put_sync(dev
);
426 dev_err(dev
, "failed to install IRQ handler\n");
430 ret
= drm_dev_register(ddev
, 0);
434 ret
= drm_connector_register_all(ddev
);
436 dev_err(dev
, "failed to register connectors\n");
440 drm_mode_config_reset(ddev
);
442 #ifdef CONFIG_DRM_FBDEV_EMULATION
444 priv
->fbdev
= msm_fbdev_init(ddev
);
447 ret
= msm_debugfs_late_init(ddev
);
451 drm_kms_helper_poll_init(ddev
);
464 static void load_gpu(struct drm_device
*dev
)
466 static DEFINE_MUTEX(init_lock
);
467 struct msm_drm_private
*priv
= dev
->dev_private
;
469 mutex_lock(&init_lock
);
472 priv
->gpu
= adreno_load_gpu(dev
);
474 mutex_unlock(&init_lock
);
477 static int msm_open(struct drm_device
*dev
, struct drm_file
*file
)
479 struct msm_file_private
*ctx
;
481 /* For now, load gpu on open.. to avoid the requirement of having
482 * firmware in the initrd.
486 ctx
= kzalloc(sizeof(*ctx
), GFP_KERNEL
);
490 file
->driver_priv
= ctx
;
495 static void msm_preclose(struct drm_device
*dev
, struct drm_file
*file
)
497 struct msm_drm_private
*priv
= dev
->dev_private
;
498 struct msm_file_private
*ctx
= file
->driver_priv
;
500 mutex_lock(&dev
->struct_mutex
);
501 if (ctx
== priv
->lastctx
)
502 priv
->lastctx
= NULL
;
503 mutex_unlock(&dev
->struct_mutex
);
508 static void msm_lastclose(struct drm_device
*dev
)
510 struct msm_drm_private
*priv
= dev
->dev_private
;
512 drm_fb_helper_restore_fbdev_mode_unlocked(priv
->fbdev
);
515 static irqreturn_t
msm_irq(int irq
, void *arg
)
517 struct drm_device
*dev
= arg
;
518 struct msm_drm_private
*priv
= dev
->dev_private
;
519 struct msm_kms
*kms
= priv
->kms
;
521 return kms
->funcs
->irq(kms
);
524 static void msm_irq_preinstall(struct drm_device
*dev
)
526 struct msm_drm_private
*priv
= dev
->dev_private
;
527 struct msm_kms
*kms
= priv
->kms
;
529 kms
->funcs
->irq_preinstall(kms
);
532 static int msm_irq_postinstall(struct drm_device
*dev
)
534 struct msm_drm_private
*priv
= dev
->dev_private
;
535 struct msm_kms
*kms
= priv
->kms
;
537 return kms
->funcs
->irq_postinstall(kms
);
540 static void msm_irq_uninstall(struct drm_device
*dev
)
542 struct msm_drm_private
*priv
= dev
->dev_private
;
543 struct msm_kms
*kms
= priv
->kms
;
545 kms
->funcs
->irq_uninstall(kms
);
548 static int msm_enable_vblank(struct drm_device
*dev
, unsigned int pipe
)
550 struct msm_drm_private
*priv
= dev
->dev_private
;
551 struct msm_kms
*kms
= priv
->kms
;
554 DBG("dev=%p, crtc=%u", dev
, pipe
);
555 return vblank_ctrl_queue_work(priv
, pipe
, true);
558 static void msm_disable_vblank(struct drm_device
*dev
, unsigned int pipe
)
560 struct msm_drm_private
*priv
= dev
->dev_private
;
561 struct msm_kms
*kms
= priv
->kms
;
564 DBG("dev=%p, crtc=%u", dev
, pipe
);
565 vblank_ctrl_queue_work(priv
, pipe
, false);
572 static int msm_ioctl_get_param(struct drm_device
*dev
, void *data
,
573 struct drm_file
*file
)
575 struct msm_drm_private
*priv
= dev
->dev_private
;
576 struct drm_msm_param
*args
= data
;
579 /* for now, we just have 3d pipe.. eventually this would need to
580 * be more clever to dispatch to appropriate gpu module:
582 if (args
->pipe
!= MSM_PIPE_3D0
)
590 return gpu
->funcs
->get_param(gpu
, args
->param
, &args
->value
);
593 static int msm_ioctl_gem_new(struct drm_device
*dev
, void *data
,
594 struct drm_file
*file
)
596 struct drm_msm_gem_new
*args
= data
;
598 if (args
->flags
& ~MSM_BO_FLAGS
) {
599 DRM_ERROR("invalid flags: %08x\n", args
->flags
);
603 return msm_gem_new_handle(dev
, file
, args
->size
,
604 args
->flags
, &args
->handle
);
607 static inline ktime_t
to_ktime(struct drm_msm_timespec timeout
)
609 return ktime_set(timeout
.tv_sec
, timeout
.tv_nsec
);
612 static int msm_ioctl_gem_cpu_prep(struct drm_device
*dev
, void *data
,
613 struct drm_file
*file
)
615 struct drm_msm_gem_cpu_prep
*args
= data
;
616 struct drm_gem_object
*obj
;
617 ktime_t timeout
= to_ktime(args
->timeout
);
620 if (args
->op
& ~MSM_PREP_FLAGS
) {
621 DRM_ERROR("invalid op: %08x\n", args
->op
);
625 obj
= drm_gem_object_lookup(file
, args
->handle
);
629 ret
= msm_gem_cpu_prep(obj
, args
->op
, &timeout
);
631 drm_gem_object_unreference_unlocked(obj
);
636 static int msm_ioctl_gem_cpu_fini(struct drm_device
*dev
, void *data
,
637 struct drm_file
*file
)
639 struct drm_msm_gem_cpu_fini
*args
= data
;
640 struct drm_gem_object
*obj
;
643 obj
= drm_gem_object_lookup(file
, args
->handle
);
647 ret
= msm_gem_cpu_fini(obj
);
649 drm_gem_object_unreference_unlocked(obj
);
654 static int msm_ioctl_gem_info(struct drm_device
*dev
, void *data
,
655 struct drm_file
*file
)
657 struct drm_msm_gem_info
*args
= data
;
658 struct drm_gem_object
*obj
;
664 obj
= drm_gem_object_lookup(file
, args
->handle
);
668 args
->offset
= msm_gem_mmap_offset(obj
);
670 drm_gem_object_unreference_unlocked(obj
);
675 static int msm_ioctl_wait_fence(struct drm_device
*dev
, void *data
,
676 struct drm_file
*file
)
678 struct msm_drm_private
*priv
= dev
->dev_private
;
679 struct drm_msm_wait_fence
*args
= data
;
680 ktime_t timeout
= to_ktime(args
->timeout
);
683 DRM_ERROR("invalid pad: %08x\n", args
->pad
);
690 return msm_wait_fence(priv
->gpu
->fctx
, args
->fence
, &timeout
, true);
693 static const struct drm_ioctl_desc msm_ioctls
[] = {
694 DRM_IOCTL_DEF_DRV(MSM_GET_PARAM
, msm_ioctl_get_param
, DRM_AUTH
|DRM_RENDER_ALLOW
),
695 DRM_IOCTL_DEF_DRV(MSM_GEM_NEW
, msm_ioctl_gem_new
, DRM_AUTH
|DRM_RENDER_ALLOW
),
696 DRM_IOCTL_DEF_DRV(MSM_GEM_INFO
, msm_ioctl_gem_info
, DRM_AUTH
|DRM_RENDER_ALLOW
),
697 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_PREP
, msm_ioctl_gem_cpu_prep
, DRM_AUTH
|DRM_RENDER_ALLOW
),
698 DRM_IOCTL_DEF_DRV(MSM_GEM_CPU_FINI
, msm_ioctl_gem_cpu_fini
, DRM_AUTH
|DRM_RENDER_ALLOW
),
699 DRM_IOCTL_DEF_DRV(MSM_GEM_SUBMIT
, msm_ioctl_gem_submit
, DRM_AUTH
|DRM_RENDER_ALLOW
),
700 DRM_IOCTL_DEF_DRV(MSM_WAIT_FENCE
, msm_ioctl_wait_fence
, DRM_AUTH
|DRM_RENDER_ALLOW
),
703 static const struct vm_operations_struct vm_ops
= {
704 .fault
= msm_gem_fault
,
705 .open
= drm_gem_vm_open
,
706 .close
= drm_gem_vm_close
,
709 static const struct file_operations fops
= {
710 .owner
= THIS_MODULE
,
712 .release
= drm_release
,
713 .unlocked_ioctl
= drm_ioctl
,
715 .compat_ioctl
= drm_compat_ioctl
,
720 .mmap
= msm_gem_mmap
,
723 static struct drm_driver msm_driver
= {
724 .driver_features
= DRIVER_HAVE_IRQ
|
731 .preclose
= msm_preclose
,
732 .lastclose
= msm_lastclose
,
733 .set_busid
= drm_platform_set_busid
,
734 .irq_handler
= msm_irq
,
735 .irq_preinstall
= msm_irq_preinstall
,
736 .irq_postinstall
= msm_irq_postinstall
,
737 .irq_uninstall
= msm_irq_uninstall
,
738 .get_vblank_counter
= drm_vblank_no_hw_counter
,
739 .enable_vblank
= msm_enable_vblank
,
740 .disable_vblank
= msm_disable_vblank
,
741 .gem_free_object
= msm_gem_free_object
,
742 .gem_vm_ops
= &vm_ops
,
743 .dumb_create
= msm_gem_dumb_create
,
744 .dumb_map_offset
= msm_gem_dumb_map_offset
,
745 .dumb_destroy
= drm_gem_dumb_destroy
,
746 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
747 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
748 .gem_prime_export
= drm_gem_prime_export
,
749 .gem_prime_import
= drm_gem_prime_import
,
750 .gem_prime_pin
= msm_gem_prime_pin
,
751 .gem_prime_unpin
= msm_gem_prime_unpin
,
752 .gem_prime_get_sg_table
= msm_gem_prime_get_sg_table
,
753 .gem_prime_import_sg_table
= msm_gem_prime_import_sg_table
,
754 .gem_prime_vmap
= msm_gem_prime_vmap
,
755 .gem_prime_vunmap
= msm_gem_prime_vunmap
,
756 .gem_prime_mmap
= msm_gem_prime_mmap
,
757 #ifdef CONFIG_DEBUG_FS
758 .debugfs_init
= msm_debugfs_init
,
759 .debugfs_cleanup
= msm_debugfs_cleanup
,
761 .ioctls
= msm_ioctls
,
762 .num_ioctls
= DRM_MSM_NUM_IOCTLS
,
765 .desc
= "MSM Snapdragon DRM",
771 #ifdef CONFIG_PM_SLEEP
772 static int msm_pm_suspend(struct device
*dev
)
774 struct drm_device
*ddev
= dev_get_drvdata(dev
);
776 drm_kms_helper_poll_disable(ddev
);
781 static int msm_pm_resume(struct device
*dev
)
783 struct drm_device
*ddev
= dev_get_drvdata(dev
);
785 drm_kms_helper_poll_enable(ddev
);
791 static const struct dev_pm_ops msm_pm_ops
= {
792 SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend
, msm_pm_resume
)
796 * Componentized driver support:
800 * NOTE: duplication of the same code as exynos or imx (or probably any other).
801 * so probably some room for some helpers
803 static int compare_of(struct device
*dev
, void *data
)
805 return dev
->of_node
== data
;
808 static int add_components(struct device
*dev
, struct component_match
**matchptr
,
811 struct device_node
*np
= dev
->of_node
;
815 struct device_node
*node
;
817 node
= of_parse_phandle(np
, name
, i
);
821 component_match_add(dev
, matchptr
, compare_of
, node
);
827 static int msm_drm_bind(struct device
*dev
)
829 return msm_drm_init(dev
, &msm_driver
);
832 static void msm_drm_unbind(struct device
*dev
)
837 static const struct component_master_ops msm_drm_ops
= {
838 .bind
= msm_drm_bind
,
839 .unbind
= msm_drm_unbind
,
846 static int msm_pdev_probe(struct platform_device
*pdev
)
848 struct component_match
*match
= NULL
;
850 add_components(&pdev
->dev
, &match
, "connectors");
851 add_components(&pdev
->dev
, &match
, "gpus");
853 pdev
->dev
.coherent_dma_mask
= DMA_BIT_MASK(32);
854 return component_master_add_with_match(&pdev
->dev
, &msm_drm_ops
, match
);
857 static int msm_pdev_remove(struct platform_device
*pdev
)
859 component_master_del(&pdev
->dev
, &msm_drm_ops
);
864 static const struct platform_device_id msm_id
[] = {
869 static const struct of_device_id dt_match
[] = {
870 { .compatible
= "qcom,mdp4", .data
= (void *) 4 }, /* mdp4 */
871 { .compatible
= "qcom,mdp5", .data
= (void *) 5 }, /* mdp5 */
872 /* to support downstream DT files */
873 { .compatible
= "qcom,mdss_mdp", .data
= (void *) 5 }, /* mdp5 */
876 MODULE_DEVICE_TABLE(of
, dt_match
);
878 static struct platform_driver msm_platform_driver
= {
879 .probe
= msm_pdev_probe
,
880 .remove
= msm_pdev_remove
,
883 .of_match_table
= dt_match
,
889 static int __init
msm_drm_register(void)
896 return platform_driver_register(&msm_platform_driver
);
899 static void __exit
msm_drm_unregister(void)
902 platform_driver_unregister(&msm_platform_driver
);
903 msm_hdmi_unregister();
905 msm_edp_unregister();
906 msm_dsi_unregister();
909 module_init(msm_drm_register
);
910 module_exit(msm_drm_unregister
);
912 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
913 MODULE_DESCRIPTION("MSM DRM Driver");
914 MODULE_LICENSE("GPL");