]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/gpu/drm/nouveau/core/engine/disp/nv50.h
drm/nouveau/disp: port vblank handling to event interface
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / core / engine / disp / nv50.h
1 #ifndef __NV50_DISP_H__
2 #define __NV50_DISP_H__
3
4 #include <core/parent.h>
5 #include <core/namedb.h>
6 #include <core/engctx.h>
7 #include <core/ramht.h>
8 #include <core/event.h>
9
10 #include <engine/dmaobj.h>
11 #include <engine/disp.h>
12
13 struct dcb_output;
14
15 struct nv50_disp_priv {
16 struct nouveau_disp base;
17 struct nouveau_oclass *sclass;
18 struct {
19 int nr;
20 } head;
21 struct {
22 int nr;
23 int (*power)(struct nv50_disp_priv *, int dac, u32 data);
24 int (*sense)(struct nv50_disp_priv *, int dac, u32 load);
25 } dac;
26 struct {
27 int nr;
28 int (*power)(struct nv50_disp_priv *, int sor, u32 data);
29 int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32);
30 int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32);
31 int (*dp_train_init)(struct nv50_disp_priv *, int sor, int link,
32 int head, u16 type, u16 mask, u32 data,
33 struct dcb_output *);
34 int (*dp_train_fini)(struct nv50_disp_priv *, int sor, int link,
35 int head, u16 type, u16 mask, u32 data,
36 struct dcb_output *);
37 int (*dp_train)(struct nv50_disp_priv *, int sor, int link,
38 u16 type, u16 mask, u32 data,
39 struct dcb_output *);
40 int (*dp_lnkctl)(struct nv50_disp_priv *, int sor, int link,
41 int head, u16 type, u16 mask, u32 data,
42 struct dcb_output *);
43 int (*dp_drvctl)(struct nv50_disp_priv *, int sor, int link,
44 int lane, u16 type, u16 mask, u32 data,
45 struct dcb_output *);
46 u32 lvdsconf;
47 } sor;
48 };
49
50 #define DAC_MTHD(n) (n), (n) + 0x03
51
52 int nv50_dac_mthd(struct nouveau_object *, u32, void *, u32);
53 int nv50_dac_power(struct nv50_disp_priv *, int, u32);
54 int nv50_dac_sense(struct nv50_disp_priv *, int, u32);
55
56 #define SOR_MTHD(n) (n), (n) + 0x3f
57
58 int nva3_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);
59 int nvd0_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);
60
61 int nv84_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
62 int nva3_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
63 int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);
64
65 int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32);
66 int nv50_sor_power(struct nv50_disp_priv *, int, u32);
67
68 int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16,
69 u32, struct dcb_output *);
70 int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16,
71 u32, struct dcb_output *);
72 int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
73 struct dcb_output *);
74 int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
75 struct dcb_output *);
76 int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
77 struct dcb_output *);
78
79 int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,
80 struct dcb_output *);
81 int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
82 struct dcb_output *);
83 int nvd0_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,
84 struct dcb_output *);
85
86 struct nv50_disp_base {
87 struct nouveau_parent base;
88 struct nouveau_ramht *ramht;
89 u32 chan;
90 };
91
92 struct nv50_disp_chan {
93 struct nouveau_namedb base;
94 int chid;
95 };
96
97 int nv50_disp_chan_create_(struct nouveau_object *, struct nouveau_object *,
98 struct nouveau_oclass *, int, int, void **);
99 void nv50_disp_chan_destroy(struct nv50_disp_chan *);
100 u32 nv50_disp_chan_rd32(struct nouveau_object *, u64);
101 void nv50_disp_chan_wr32(struct nouveau_object *, u64, u32);
102
103 #define nv50_disp_chan_init(a) \
104 nouveau_namedb_init(&(a)->base)
105 #define nv50_disp_chan_fini(a,b) \
106 nouveau_namedb_fini(&(a)->base, (b))
107
108 int nv50_disp_dmac_create_(struct nouveau_object *, struct nouveau_object *,
109 struct nouveau_oclass *, u32, int, int, void **);
110 void nv50_disp_dmac_dtor(struct nouveau_object *);
111
112 struct nv50_disp_dmac {
113 struct nv50_disp_chan base;
114 struct nouveau_dmaobj *pushdma;
115 u32 push;
116 };
117
118 struct nv50_disp_pioc {
119 struct nv50_disp_chan base;
120 };
121
122 extern struct nouveau_ofuncs nv50_disp_mast_ofuncs;
123 extern struct nouveau_ofuncs nv50_disp_sync_ofuncs;
124 extern struct nouveau_ofuncs nv50_disp_ovly_ofuncs;
125 extern struct nouveau_ofuncs nv50_disp_oimm_ofuncs;
126 extern struct nouveau_ofuncs nv50_disp_curs_ofuncs;
127 extern struct nouveau_ofuncs nv50_disp_base_ofuncs;
128 extern struct nouveau_oclass nv50_disp_cclass;
129 void nv50_disp_intr(struct nouveau_subdev *);
130
131 extern struct nouveau_omthds nv84_disp_base_omthds[];
132
133 extern struct nouveau_omthds nva3_disp_base_omthds[];
134
135 extern struct nouveau_ofuncs nvd0_disp_mast_ofuncs;
136 extern struct nouveau_ofuncs nvd0_disp_sync_ofuncs;
137 extern struct nouveau_ofuncs nvd0_disp_ovly_ofuncs;
138 extern struct nouveau_ofuncs nvd0_disp_oimm_ofuncs;
139 extern struct nouveau_ofuncs nvd0_disp_curs_ofuncs;
140 extern struct nouveau_ofuncs nvd0_disp_base_ofuncs;
141 extern struct nouveau_oclass nvd0_disp_cclass;
142 void nvd0_disp_intr(struct nouveau_subdev *);
143
144 #endif