]>
git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/gpu/drm/nouveau/core/engine/disp/nva0.c
2 * Copyright 2012 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <engine/software.h>
26 #include <engine/disp.h>
28 #include <core/class.h>
32 static struct nouveau_oclass
33 nva0_disp_sclass
[] = {
34 { NVA0_DISP_MAST_CLASS
, &nv50_disp_mast_ofuncs
},
35 { NVA0_DISP_SYNC_CLASS
, &nv50_disp_sync_ofuncs
},
36 { NVA0_DISP_OVLY_CLASS
, &nv50_disp_ovly_ofuncs
},
37 { NVA0_DISP_OIMM_CLASS
, &nv50_disp_oimm_ofuncs
},
38 { NVA0_DISP_CURS_CLASS
, &nv50_disp_curs_ofuncs
},
42 static struct nouveau_oclass
43 nva0_disp_base_oclass
[] = {
44 { NVA0_DISP_CLASS
, &nv50_disp_base_ofuncs
, nv84_disp_base_omthds
},
49 nva0_disp_ctor(struct nouveau_object
*parent
, struct nouveau_object
*engine
,
50 struct nouveau_oclass
*oclass
, void *data
, u32 size
,
51 struct nouveau_object
**pobject
)
53 struct nv50_disp_priv
*priv
;
56 ret
= nouveau_disp_create(parent
, engine
, oclass
, 2, "PDISP",
58 *pobject
= nv_object(priv
);
62 nv_engine(priv
)->sclass
= nva0_disp_base_oclass
;
63 nv_engine(priv
)->cclass
= &nv50_disp_cclass
;
64 nv_subdev(priv
)->intr
= nv50_disp_intr
;
65 priv
->sclass
= nva0_disp_sclass
;
69 priv
->dac
.power
= nv50_dac_power
;
70 priv
->dac
.sense
= nv50_dac_sense
;
71 priv
->sor
.power
= nv50_sor_power
;
72 priv
->sor
.hdmi
= nv84_hdmi_ctrl
;
78 .handle
= NV_ENGINE(DISP
, 0x83),
79 .ofuncs
= &(struct nouveau_ofuncs
) {
80 .ctor
= nva0_disp_ctor
,
81 .dtor
= _nouveau_disp_dtor
,
82 .init
= _nouveau_disp_init
,
83 .fini
= _nouveau_disp_fini
,