drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c

   1 /*
   2  * Copyright (C) 2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include <subdev/fb.h>
  28
  29 struct nv10_fb_priv {
  30         struct nouveau_fb base;
  31 };
  32
  33 static void
  34 nv10_fb_tile_init(struct nouveau_fb *pfb, int i, u32 addr, u32 size, u32 pitch,
  35                   u32 flags, struct nouveau_fb_tile *tile)
  36 {
  37         tile->addr  = 0x80000000 | addr;
  38         tile->limit = max(1u, addr + size) - 1;
  39         tile->pitch = pitch;
  40 }
  41
  42 static void
  43 nv10_fb_tile_fini(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
  44 {
  45         tile->addr  = 0;
  46         tile->limit = 0;
  47         tile->pitch = 0;
  48         tile->zcomp = 0;
  49 }
  50
  51 void
  52 nv10_fb_tile_prog(struct nouveau_fb *pfb, int i, struct nouveau_fb_tile *tile)
  53 {
  54         nv_wr32(pfb, 0x100244 + (i * 0x10), tile->limit);
  55         nv_wr32(pfb, 0x100248 + (i * 0x10), tile->pitch);
  56         nv_wr32(pfb, 0x100240 + (i * 0x10), tile->addr);
  57 }
  58
  59 static int
  60 nv10_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  61              struct nouveau_oclass *oclass, void *data, u32 size,
  62              struct nouveau_object **pobject)
  63 {
  64         struct nouveau_device *device = nv_device(parent);
  65         struct nv10_fb_priv *priv;
  66         int ret;
  67
  68         ret = nouveau_fb_create(parent, engine, oclass, &priv);
  69         *pobject = nv_object(priv);
  70         if (ret)
  71                 return ret;
  72
  73         if (device->chipset == 0x1a ||  device->chipset == 0x1f) {
  74                 struct pci_dev *bridge;
  75                 u32 mem, mib;
  76
  77                 bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 1));
  78                 if (!bridge) {
  79                         nv_fatal(device, "no bridge device\n");
  80                         return 0;
  81                 }
  82
  83                 if (device->chipset == 0x1a) {
  84                         pci_read_config_dword(bridge, 0x7c, &mem);
  85                         mib = ((mem >> 6) & 31) + 1;
  86                 } else {
  87                         pci_read_config_dword(bridge, 0x84, &mem);
  88                         mib = ((mem >> 4) & 127) + 1;
  89                 }
  90
  91                 priv->base.ram.type = NV_MEM_TYPE_STOLEN;
  92                 priv->base.ram.size = mib * 1024 * 1024;
  93         } else {
  94                 u32 cfg0 = nv_rd32(priv, 0x100200);
  95                 if (cfg0 & 0x00000001)
  96                         priv->base.ram.type = NV_MEM_TYPE_DDR1;
  97                 else
  98                         priv->base.ram.type = NV_MEM_TYPE_SDRAM;
  99
 100                 priv->base.ram.size = nv_rd32(priv, 0x10020c) & 0xff000000;
 101         }
 102
 103         priv->base.memtype_valid = nv04_fb_memtype_valid;
 104         priv->base.tile.regions = 8;
 105         priv->base.tile.init = nv10_fb_tile_init;
 106         priv->base.tile.fini = nv10_fb_tile_fini;
 107         priv->base.tile.prog = nv10_fb_tile_prog;
 108         return nouveau_fb_created(&priv->base);
 109 }
 110
 111 struct nouveau_oclass
 112 nv10_fb_oclass = {
 113         .handle = NV_SUBDEV(FB, 0x10),
 114         .ofuncs = &(struct nouveau_ofuncs) {
 115                 .ctor = nv10_fb_ctor,
 116                 .dtor = _nouveau_fb_dtor,
 117                 .init = _nouveau_fb_init,
 118                 .fini = _nouveau_fb_fini,
 119         },
 120 };