]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - drivers/gpu/drm/nouveau/nouveau_drv.c
Merge branch 'tip/perf/core' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt...
[mirror_ubuntu-eoan-kernel.git] / drivers / gpu / drm / nouveau / nouveau_drv.c
1 /*
2 * Copyright 2005 Stephane Marchesin.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 */
24
25 #include <linux/console.h>
26 #include <linux/module.h>
27
28 #include "drmP.h"
29 #include "drm.h"
30 #include "drm_crtc_helper.h"
31 #include "nouveau_drv.h"
32 #include "nouveau_hw.h"
33 #include "nouveau_fb.h"
34 #include "nouveau_fbcon.h"
35 #include "nouveau_pm.h"
36 #include "nv50_display.h"
37
38 #include "drm_pciids.h"
39
40 MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
41 int nouveau_agpmode = -1;
42 module_param_named(agpmode, nouveau_agpmode, int, 0400);
43
44 MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
45 int nouveau_modeset = -1;
46 module_param_named(modeset, nouveau_modeset, int, 0400);
47
48 MODULE_PARM_DESC(vbios, "Override default VBIOS location");
49 char *nouveau_vbios;
50 module_param_named(vbios, nouveau_vbios, charp, 0400);
51
52 MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
53 int nouveau_vram_pushbuf;
54 module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
55
56 MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
57 int nouveau_vram_notify = 0;
58 module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
59
60 MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
61 int nouveau_duallink = 1;
62 module_param_named(duallink, nouveau_duallink, int, 0400);
63
64 MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
65 int nouveau_uscript_lvds = -1;
66 module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
67
68 MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
69 int nouveau_uscript_tmds = -1;
70 module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
71
72 MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
73 int nouveau_ignorelid = 0;
74 module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
75
76 MODULE_PARM_DESC(noaccel, "Disable all acceleration");
77 int nouveau_noaccel = -1;
78 module_param_named(noaccel, nouveau_noaccel, int, 0400);
79
80 MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
81 int nouveau_nofbaccel = 0;
82 module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
83
84 MODULE_PARM_DESC(force_post, "Force POST");
85 int nouveau_force_post = 0;
86 module_param_named(force_post, nouveau_force_post, int, 0400);
87
88 MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
89 int nouveau_override_conntype = 0;
90 module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
91
92 MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
93 int nouveau_tv_disable = 0;
94 module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
95
96 MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
97 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
98 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
99 "\t\tDefault: PAL\n"
100 "\t\t*NOTE* Ignored for cards with external TV encoders.");
101 char *nouveau_tv_norm;
102 module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
103
104 MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
105 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
106 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
107 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
108 int nouveau_reg_debug;
109 module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
110
111 MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
112 char *nouveau_perflvl;
113 module_param_named(perflvl, nouveau_perflvl, charp, 0400);
114
115 MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
116 int nouveau_perflvl_wr;
117 module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
118
119 MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
120 int nouveau_msi;
121 module_param_named(msi, nouveau_msi, int, 0400);
122
123 MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
124 int nouveau_ctxfw;
125 module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
126
127 int nouveau_fbpercrtc;
128 #if 0
129 module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
130 #endif
131
132 static struct pci_device_id pciidlist[] = {
133 {
134 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
135 .class = PCI_BASE_CLASS_DISPLAY << 16,
136 .class_mask = 0xff << 16,
137 },
138 {
139 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
140 .class = PCI_BASE_CLASS_DISPLAY << 16,
141 .class_mask = 0xff << 16,
142 },
143 {}
144 };
145
146 MODULE_DEVICE_TABLE(pci, pciidlist);
147
148 static struct drm_driver driver;
149
150 static int __devinit
151 nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
152 {
153 return drm_get_pci_dev(pdev, ent, &driver);
154 }
155
156 static void
157 nouveau_pci_remove(struct pci_dev *pdev)
158 {
159 struct drm_device *dev = pci_get_drvdata(pdev);
160
161 drm_put_dev(dev);
162 }
163
164 int
165 nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
166 {
167 struct drm_device *dev = pci_get_drvdata(pdev);
168 struct drm_nouveau_private *dev_priv = dev->dev_private;
169 struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
170 struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
171 struct nouveau_channel *chan;
172 struct drm_crtc *crtc;
173 int ret, i, e;
174
175 if (pm_state.event == PM_EVENT_PRETHAW)
176 return 0;
177
178 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
179 return 0;
180
181 NV_INFO(dev, "Disabling fbcon acceleration...\n");
182 nouveau_fbcon_save_disable_accel(dev);
183
184 NV_INFO(dev, "Unpinning framebuffer(s)...\n");
185 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
186 struct nouveau_framebuffer *nouveau_fb;
187
188 nouveau_fb = nouveau_framebuffer(crtc->fb);
189 if (!nouveau_fb || !nouveau_fb->nvbo)
190 continue;
191
192 nouveau_bo_unpin(nouveau_fb->nvbo);
193 }
194
195 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
196 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
197
198 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
199 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
200 }
201
202 NV_INFO(dev, "Evicting buffers...\n");
203 ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
204
205 NV_INFO(dev, "Idling channels...\n");
206 for (i = 0; i < pfifo->channels; i++) {
207 chan = dev_priv->channels.ptr[i];
208
209 if (chan && chan->pushbuf_bo)
210 nouveau_channel_idle(chan);
211 }
212
213 pfifo->reassign(dev, false);
214 pfifo->disable(dev);
215 pfifo->unload_context(dev);
216
217 for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
218 if (!dev_priv->eng[e])
219 continue;
220
221 ret = dev_priv->eng[e]->fini(dev, e, true);
222 if (ret) {
223 NV_ERROR(dev, "... engine %d failed: %d\n", i, ret);
224 goto out_abort;
225 }
226 }
227
228 ret = pinstmem->suspend(dev);
229 if (ret) {
230 NV_ERROR(dev, "... failed: %d\n", ret);
231 goto out_abort;
232 }
233
234 NV_INFO(dev, "Suspending GPU objects...\n");
235 ret = nouveau_gpuobj_suspend(dev);
236 if (ret) {
237 NV_ERROR(dev, "... failed: %d\n", ret);
238 pinstmem->resume(dev);
239 goto out_abort;
240 }
241
242 NV_INFO(dev, "And we're gone!\n");
243 pci_save_state(pdev);
244 if (pm_state.event == PM_EVENT_SUSPEND) {
245 pci_disable_device(pdev);
246 pci_set_power_state(pdev, PCI_D3hot);
247 }
248
249 console_lock();
250 nouveau_fbcon_set_suspend(dev, 1);
251 console_unlock();
252 nouveau_fbcon_restore_accel(dev);
253 return 0;
254
255 out_abort:
256 NV_INFO(dev, "Re-enabling acceleration..\n");
257 for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
258 if (dev_priv->eng[e])
259 dev_priv->eng[e]->init(dev, e);
260 }
261 pfifo->enable(dev);
262 pfifo->reassign(dev, true);
263 return ret;
264 }
265
266 int
267 nouveau_pci_resume(struct pci_dev *pdev)
268 {
269 struct drm_device *dev = pci_get_drvdata(pdev);
270 struct drm_nouveau_private *dev_priv = dev->dev_private;
271 struct nouveau_engine *engine = &dev_priv->engine;
272 struct drm_crtc *crtc;
273 int ret, i;
274
275 if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
276 return 0;
277
278 nouveau_fbcon_save_disable_accel(dev);
279
280 NV_INFO(dev, "We're back, enabling device...\n");
281 pci_set_power_state(pdev, PCI_D0);
282 pci_restore_state(pdev);
283 if (pci_enable_device(pdev))
284 return -1;
285 pci_set_master(dev->pdev);
286
287 /* Make sure the AGP controller is in a consistent state */
288 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
289 nouveau_mem_reset_agp(dev);
290
291 /* Make the CRTCs accessible */
292 engine->display.early_init(dev);
293
294 NV_INFO(dev, "POSTing device...\n");
295 ret = nouveau_run_vbios_init(dev);
296 if (ret)
297 return ret;
298
299 nouveau_pm_resume(dev);
300
301 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
302 ret = nouveau_mem_init_agp(dev);
303 if (ret) {
304 NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
305 return ret;
306 }
307 }
308
309 NV_INFO(dev, "Restoring GPU objects...\n");
310 nouveau_gpuobj_resume(dev);
311
312 NV_INFO(dev, "Reinitialising engines...\n");
313 engine->instmem.resume(dev);
314 engine->mc.init(dev);
315 engine->timer.init(dev);
316 engine->fb.init(dev);
317 for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
318 if (dev_priv->eng[i])
319 dev_priv->eng[i]->init(dev, i);
320 }
321 engine->fifo.init(dev);
322
323 nouveau_irq_postinstall(dev);
324
325 /* Re-write SKIPS, they'll have been lost over the suspend */
326 if (nouveau_vram_pushbuf) {
327 struct nouveau_channel *chan;
328 int j;
329
330 for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
331 chan = dev_priv->channels.ptr[i];
332 if (!chan || !chan->pushbuf_bo)
333 continue;
334
335 for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
336 nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
337 }
338 }
339
340 NV_INFO(dev, "Restoring mode...\n");
341 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
342 struct nouveau_framebuffer *nouveau_fb;
343
344 nouveau_fb = nouveau_framebuffer(crtc->fb);
345 if (!nouveau_fb || !nouveau_fb->nvbo)
346 continue;
347
348 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
349 }
350
351 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
352 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
353
354 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
355 if (!ret)
356 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
357 if (ret)
358 NV_ERROR(dev, "Could not pin/map cursor.\n");
359 }
360
361 engine->display.init(dev);
362
363 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
364 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
365 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
366
367 nv_crtc->cursor.set_offset(nv_crtc, offset);
368 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
369 nv_crtc->cursor_saved_y);
370 }
371
372 /* Force CLUT to get re-loaded during modeset */
373 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
374 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
375
376 nv_crtc->lut.depth = 0;
377 }
378
379 console_lock();
380 nouveau_fbcon_set_suspend(dev, 0);
381 console_unlock();
382
383 nouveau_fbcon_zfill_all(dev);
384
385 drm_helper_resume_force_mode(dev);
386
387 nouveau_fbcon_restore_accel(dev);
388 return 0;
389 }
390
391 static struct drm_driver driver = {
392 .driver_features =
393 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
394 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
395 DRIVER_MODESET,
396 .load = nouveau_load,
397 .firstopen = nouveau_firstopen,
398 .lastclose = nouveau_lastclose,
399 .unload = nouveau_unload,
400 .open = nouveau_open,
401 .preclose = nouveau_preclose,
402 .postclose = nouveau_postclose,
403 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
404 .debugfs_init = nouveau_debugfs_init,
405 .debugfs_cleanup = nouveau_debugfs_takedown,
406 #endif
407 .irq_preinstall = nouveau_irq_preinstall,
408 .irq_postinstall = nouveau_irq_postinstall,
409 .irq_uninstall = nouveau_irq_uninstall,
410 .irq_handler = nouveau_irq_handler,
411 .get_vblank_counter = drm_vblank_count,
412 .enable_vblank = nouveau_vblank_enable,
413 .disable_vblank = nouveau_vblank_disable,
414 .reclaim_buffers = drm_core_reclaim_buffers,
415 .ioctls = nouveau_ioctls,
416 .fops = {
417 .owner = THIS_MODULE,
418 .open = drm_open,
419 .release = drm_release,
420 .unlocked_ioctl = drm_ioctl,
421 .mmap = nouveau_ttm_mmap,
422 .poll = drm_poll,
423 .fasync = drm_fasync,
424 .read = drm_read,
425 #if defined(CONFIG_COMPAT)
426 .compat_ioctl = nouveau_compat_ioctl,
427 #endif
428 .llseek = noop_llseek,
429 },
430
431 .gem_init_object = nouveau_gem_object_new,
432 .gem_free_object = nouveau_gem_object_del,
433 .gem_open_object = nouveau_gem_object_open,
434 .gem_close_object = nouveau_gem_object_close,
435
436 .dumb_create = nouveau_display_dumb_create,
437 .dumb_map_offset = nouveau_display_dumb_map_offset,
438 .dumb_destroy = nouveau_display_dumb_destroy,
439
440 .name = DRIVER_NAME,
441 .desc = DRIVER_DESC,
442 #ifdef GIT_REVISION
443 .date = GIT_REVISION,
444 #else
445 .date = DRIVER_DATE,
446 #endif
447 .major = DRIVER_MAJOR,
448 .minor = DRIVER_MINOR,
449 .patchlevel = DRIVER_PATCHLEVEL,
450 };
451
452 static struct pci_driver nouveau_pci_driver = {
453 .name = DRIVER_NAME,
454 .id_table = pciidlist,
455 .probe = nouveau_pci_probe,
456 .remove = nouveau_pci_remove,
457 .suspend = nouveau_pci_suspend,
458 .resume = nouveau_pci_resume
459 };
460
461 static int __init nouveau_init(void)
462 {
463 driver.num_ioctls = nouveau_max_ioctl;
464
465 if (nouveau_modeset == -1) {
466 #ifdef CONFIG_VGA_CONSOLE
467 if (vgacon_text_force())
468 nouveau_modeset = 0;
469 else
470 #endif
471 nouveau_modeset = 1;
472 }
473
474 if (!nouveau_modeset)
475 return 0;
476
477 nouveau_register_dsm_handler();
478 return drm_pci_init(&driver, &nouveau_pci_driver);
479 }
480
481 static void __exit nouveau_exit(void)
482 {
483 if (!nouveau_modeset)
484 return;
485
486 drm_pci_exit(&driver, &nouveau_pci_driver);
487 nouveau_unregister_dsm_handler();
488 }
489
490 module_init(nouveau_init);
491 module_exit(nouveau_exit);
492
493 MODULE_AUTHOR(DRIVER_AUTHOR);
494 MODULE_DESCRIPTION(DRIVER_DESC);
495 MODULE_LICENSE("GPL and additional rights");