2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/module.h>
29 #include <drm/drm_crtc_helper.h>
30 #include "nouveau_drv.h"
31 #include "nouveau_abi16.h"
32 #include "nouveau_hw.h"
33 #include "nouveau_fb.h"
34 #include "nouveau_fbcon.h"
35 #include "nouveau_pm.h"
36 #include "nouveau_fifo.h"
37 #include "nv50_display.h"
39 #include <drm/drm_pciids.h>
41 MODULE_PARM_DESC(agpmode
, "AGP mode (0 to disable AGP)");
42 int nouveau_agpmode
= -1;
43 module_param_named(agpmode
, nouveau_agpmode
, int, 0400);
45 MODULE_PARM_DESC(modeset
, "Enable kernel modesetting");
46 int nouveau_modeset
= -1;
47 module_param_named(modeset
, nouveau_modeset
, int, 0400);
49 MODULE_PARM_DESC(vbios
, "Override default VBIOS location");
51 module_param_named(vbios
, nouveau_vbios
, charp
, 0400);
53 MODULE_PARM_DESC(vram_pushbuf
, "Force DMA push buffers to be in VRAM");
54 int nouveau_vram_pushbuf
;
55 module_param_named(vram_pushbuf
, nouveau_vram_pushbuf
, int, 0400);
57 MODULE_PARM_DESC(vram_notify
, "Force DMA notifiers to be in VRAM");
58 int nouveau_vram_notify
= 0;
59 module_param_named(vram_notify
, nouveau_vram_notify
, int, 0400);
61 MODULE_PARM_DESC(vram_type
, "Override detected VRAM type");
62 char *nouveau_vram_type
;
63 module_param_named(vram_type
, nouveau_vram_type
, charp
, 0400);
65 MODULE_PARM_DESC(duallink
, "Allow dual-link TMDS (>=GeForce 8)");
66 int nouveau_duallink
= 1;
67 module_param_named(duallink
, nouveau_duallink
, int, 0400);
69 MODULE_PARM_DESC(uscript_lvds
, "LVDS output script table ID (>=GeForce 8)");
70 int nouveau_uscript_lvds
= -1;
71 module_param_named(uscript_lvds
, nouveau_uscript_lvds
, int, 0400);
73 MODULE_PARM_DESC(uscript_tmds
, "TMDS output script table ID (>=GeForce 8)");
74 int nouveau_uscript_tmds
= -1;
75 module_param_named(uscript_tmds
, nouveau_uscript_tmds
, int, 0400);
77 MODULE_PARM_DESC(ignorelid
, "Ignore ACPI lid status");
78 int nouveau_ignorelid
= 0;
79 module_param_named(ignorelid
, nouveau_ignorelid
, int, 0400);
81 MODULE_PARM_DESC(noaccel
, "Disable all acceleration");
82 int nouveau_noaccel
= -1;
83 module_param_named(noaccel
, nouveau_noaccel
, int, 0400);
85 MODULE_PARM_DESC(nofbaccel
, "Disable fbcon acceleration");
86 int nouveau_nofbaccel
= 0;
87 module_param_named(nofbaccel
, nouveau_nofbaccel
, int, 0400);
89 MODULE_PARM_DESC(force_post
, "Force POST");
90 int nouveau_force_post
= 0;
91 module_param_named(force_post
, nouveau_force_post
, int, 0400);
93 MODULE_PARM_DESC(override_conntype
, "Ignore DCB connector type");
94 int nouveau_override_conntype
= 0;
95 module_param_named(override_conntype
, nouveau_override_conntype
, int, 0400);
97 MODULE_PARM_DESC(tv_disable
, "Disable TV-out detection");
98 int nouveau_tv_disable
= 0;
99 module_param_named(tv_disable
, nouveau_tv_disable
, int, 0400);
101 MODULE_PARM_DESC(tv_norm
, "Default TV norm.\n"
102 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
103 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
105 "\t\t*NOTE* Ignored for cards with external TV encoders.");
106 char *nouveau_tv_norm
;
107 module_param_named(tv_norm
, nouveau_tv_norm
, charp
, 0400);
109 MODULE_PARM_DESC(reg_debug
, "Register access debug bitmask:\n"
110 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
111 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
112 "\t\t0x100 vgaattr, 0x200 EVO (G80+)");
113 int nouveau_reg_debug
;
114 module_param_named(reg_debug
, nouveau_reg_debug
, int, 0600);
116 MODULE_PARM_DESC(perflvl
, "Performance level (default: boot)");
117 char *nouveau_perflvl
;
118 module_param_named(perflvl
, nouveau_perflvl
, charp
, 0400);
120 MODULE_PARM_DESC(perflvl_wr
, "Allow perflvl changes (warning: dangerous!)");
121 int nouveau_perflvl_wr
;
122 module_param_named(perflvl_wr
, nouveau_perflvl_wr
, int, 0400);
124 MODULE_PARM_DESC(msi
, "Enable MSI (default: off)");
126 module_param_named(msi
, nouveau_msi
, int, 0400);
128 MODULE_PARM_DESC(ctxfw
, "Use external HUB/GPC ucode (fermi)");
130 module_param_named(ctxfw
, nouveau_ctxfw
, int, 0400);
132 MODULE_PARM_DESC(mxmdcb
, "Santise DCB table according to MXM-SIS");
133 int nouveau_mxmdcb
= 1;
134 module_param_named(mxmdcb
, nouveau_mxmdcb
, int, 0400);
136 int nouveau_fbpercrtc
;
138 module_param_named(fbpercrtc
, nouveau_fbpercrtc
, int, 0400);
141 static struct pci_device_id pciidlist
[] = {
143 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
144 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
145 .class_mask
= 0xff << 16,
148 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS
, PCI_ANY_ID
),
149 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
150 .class_mask
= 0xff << 16,
155 MODULE_DEVICE_TABLE(pci
, pciidlist
);
157 static struct drm_driver driver
;
160 nouveau_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
162 return drm_get_pci_dev(pdev
, ent
, &driver
);
166 nouveau_pci_remove(struct pci_dev
*pdev
)
168 struct drm_device
*dev
= pci_get_drvdata(pdev
);
174 nouveau_pci_suspend(struct pci_dev
*pdev
, pm_message_t pm_state
)
176 struct drm_device
*dev
= pci_get_drvdata(pdev
);
177 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
178 struct nouveau_instmem_engine
*pinstmem
= &dev_priv
->engine
.instmem
;
179 struct nouveau_fifo_priv
*pfifo
= nv_engine(dev
, NVOBJ_ENGINE_FIFO
);
180 struct nouveau_channel
*chan
;
181 struct drm_crtc
*crtc
;
184 if (pm_state
.event
== PM_EVENT_PRETHAW
)
187 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
190 NV_INFO(dev
, "Disabling display...\n");
191 nouveau_display_fini(dev
);
193 NV_INFO(dev
, "Disabling fbcon...\n");
194 nouveau_fbcon_set_suspend(dev
, 1);
196 NV_INFO(dev
, "Unpinning framebuffer(s)...\n");
197 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
198 struct nouveau_framebuffer
*nouveau_fb
;
200 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
201 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
204 nouveau_bo_unpin(nouveau_fb
->nvbo
);
207 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
208 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
210 nouveau_bo_unmap(nv_crtc
->cursor
.nvbo
);
211 nouveau_bo_unpin(nv_crtc
->cursor
.nvbo
);
214 NV_INFO(dev
, "Evicting buffers...\n");
215 ttm_bo_evict_mm(&dev_priv
->ttm
.bdev
, TTM_PL_VRAM
);
217 NV_INFO(dev
, "Idling channels...\n");
218 for (i
= 0; i
< (pfifo
? pfifo
->channels
: 0); i
++) {
219 chan
= dev_priv
->channels
.ptr
[i
];
221 if (chan
&& chan
->pushbuf_bo
)
222 nouveau_channel_idle(chan
);
225 for (e
= NVOBJ_ENGINE_NR
- 1; e
>= 0; e
--) {
226 if (!dev_priv
->eng
[e
])
229 ret
= dev_priv
->eng
[e
]->fini(dev
, e
, true);
231 NV_ERROR(dev
, "... engine %d failed: %d\n", e
, ret
);
236 ret
= pinstmem
->suspend(dev
);
238 NV_ERROR(dev
, "... failed: %d\n", ret
);
242 NV_INFO(dev
, "Suspending GPU objects...\n");
243 ret
= nouveau_gpuobj_suspend(dev
);
245 NV_ERROR(dev
, "... failed: %d\n", ret
);
246 pinstmem
->resume(dev
);
250 NV_INFO(dev
, "And we're gone!\n");
251 pci_save_state(pdev
);
252 if (pm_state
.event
== PM_EVENT_SUSPEND
) {
253 pci_disable_device(pdev
);
254 pci_set_power_state(pdev
, PCI_D3hot
);
260 NV_INFO(dev
, "Re-enabling acceleration..\n");
261 for (e
= e
+ 1; e
< NVOBJ_ENGINE_NR
; e
++) {
262 if (dev_priv
->eng
[e
])
263 dev_priv
->eng
[e
]->init(dev
, e
);
269 nouveau_pci_resume(struct pci_dev
*pdev
)
271 struct drm_device
*dev
= pci_get_drvdata(pdev
);
272 struct nouveau_fifo_priv
*pfifo
= nv_engine(dev
, NVOBJ_ENGINE_FIFO
);
273 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
274 struct nouveau_engine
*engine
= &dev_priv
->engine
;
275 struct drm_crtc
*crtc
;
278 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
281 NV_INFO(dev
, "We're back, enabling device...\n");
282 pci_set_power_state(pdev
, PCI_D0
);
283 pci_restore_state(pdev
);
284 if (pci_enable_device(pdev
))
286 pci_set_master(dev
->pdev
);
288 /* Make sure the AGP controller is in a consistent state */
289 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
)
290 nouveau_mem_reset_agp(dev
);
292 /* Make the CRTCs accessible */
293 engine
->display
.early_init(dev
);
295 NV_INFO(dev
, "POSTing device...\n");
296 ret
= nouveau_run_vbios_init(dev
);
300 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
) {
301 ret
= nouveau_mem_init_agp(dev
);
303 NV_ERROR(dev
, "error reinitialising AGP: %d\n", ret
);
308 NV_INFO(dev
, "Restoring GPU objects...\n");
309 nouveau_gpuobj_resume(dev
);
311 NV_INFO(dev
, "Reinitialising engines...\n");
312 engine
->instmem
.resume(dev
);
313 engine
->mc
.init(dev
);
314 engine
->timer
.init(dev
);
315 engine
->fb
.init(dev
);
316 for (i
= 0; i
< NVOBJ_ENGINE_NR
; i
++) {
317 if (dev_priv
->eng
[i
])
318 dev_priv
->eng
[i
]->init(dev
, i
);
321 nouveau_irq_postinstall(dev
);
323 /* Re-write SKIPS, they'll have been lost over the suspend */
324 if (nouveau_vram_pushbuf
) {
325 struct nouveau_channel
*chan
;
328 for (i
= 0; i
< (pfifo
? pfifo
->channels
: 0); i
++) {
329 chan
= dev_priv
->channels
.ptr
[i
];
330 if (!chan
|| !chan
->pushbuf_bo
)
333 for (j
= 0; j
< NOUVEAU_DMA_SKIPS
; j
++)
334 nouveau_bo_wr32(chan
->pushbuf_bo
, i
, 0);
338 nouveau_pm_resume(dev
);
340 NV_INFO(dev
, "Restoring mode...\n");
341 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
342 struct nouveau_framebuffer
*nouveau_fb
;
344 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
345 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
348 nouveau_bo_pin(nouveau_fb
->nvbo
, TTM_PL_FLAG_VRAM
);
351 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
352 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
354 ret
= nouveau_bo_pin(nv_crtc
->cursor
.nvbo
, TTM_PL_FLAG_VRAM
);
356 ret
= nouveau_bo_map(nv_crtc
->cursor
.nvbo
);
358 NV_ERROR(dev
, "Could not pin/map cursor.\n");
361 nouveau_fbcon_set_suspend(dev
, 0);
362 nouveau_fbcon_zfill_all(dev
);
364 nouveau_display_init(dev
);
366 /* Force CLUT to get re-loaded during modeset */
367 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
368 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
370 nv_crtc
->lut
.depth
= 0;
373 drm_helper_resume_force_mode(dev
);
375 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
376 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
377 u32 offset
= nv_crtc
->cursor
.nvbo
->bo
.offset
;
379 nv_crtc
->cursor
.set_offset(nv_crtc
, offset
);
380 nv_crtc
->cursor
.set_pos(nv_crtc
, nv_crtc
->cursor_saved_x
,
381 nv_crtc
->cursor_saved_y
);
387 static struct drm_ioctl_desc nouveau_ioctls
[] = {
388 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM
, nouveau_abi16_ioctl_getparam
, DRM_UNLOCKED
|DRM_AUTH
),
389 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM
, nouveau_abi16_ioctl_setparam
, DRM_UNLOCKED
|DRM_AUTH
|DRM_MASTER
|DRM_ROOT_ONLY
),
390 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC
, nouveau_abi16_ioctl_channel_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
391 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE
, nouveau_abi16_ioctl_channel_free
, DRM_UNLOCKED
|DRM_AUTH
),
392 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC
, nouveau_abi16_ioctl_grobj_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
393 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC
, nouveau_abi16_ioctl_notifierobj_alloc
, DRM_UNLOCKED
|DRM_AUTH
),
394 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE
, nouveau_abi16_ioctl_gpuobj_free
, DRM_UNLOCKED
|DRM_AUTH
),
395 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW
, nouveau_gem_ioctl_new
, DRM_UNLOCKED
|DRM_AUTH
),
396 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF
, nouveau_gem_ioctl_pushbuf
, DRM_UNLOCKED
|DRM_AUTH
),
397 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP
, nouveau_gem_ioctl_cpu_prep
, DRM_UNLOCKED
|DRM_AUTH
),
398 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI
, nouveau_gem_ioctl_cpu_fini
, DRM_UNLOCKED
|DRM_AUTH
),
399 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO
, nouveau_gem_ioctl_info
, DRM_UNLOCKED
|DRM_AUTH
),
402 static const struct file_operations nouveau_driver_fops
= {
403 .owner
= THIS_MODULE
,
405 .release
= drm_release
,
406 .unlocked_ioctl
= drm_ioctl
,
407 .mmap
= nouveau_ttm_mmap
,
409 .fasync
= drm_fasync
,
411 #if defined(CONFIG_COMPAT)
412 .compat_ioctl
= nouveau_compat_ioctl
,
414 .llseek
= noop_llseek
,
417 static struct drm_driver driver
= {
419 DRIVER_USE_AGP
| DRIVER_PCI_DMA
| DRIVER_SG
|
420 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
|
421 DRIVER_MODESET
| DRIVER_PRIME
,
422 .load
= nouveau_load
,
423 .firstopen
= nouveau_firstopen
,
424 .lastclose
= nouveau_lastclose
,
425 .unload
= nouveau_unload
,
426 .open
= nouveau_open
,
427 .preclose
= nouveau_preclose
,
428 .postclose
= nouveau_postclose
,
429 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
430 .debugfs_init
= nouveau_debugfs_init
,
431 .debugfs_cleanup
= nouveau_debugfs_takedown
,
433 .irq_preinstall
= nouveau_irq_preinstall
,
434 .irq_postinstall
= nouveau_irq_postinstall
,
435 .irq_uninstall
= nouveau_irq_uninstall
,
436 .irq_handler
= nouveau_irq_handler
,
437 .get_vblank_counter
= drm_vblank_count
,
438 .enable_vblank
= nouveau_vblank_enable
,
439 .disable_vblank
= nouveau_vblank_disable
,
440 .ioctls
= nouveau_ioctls
,
441 .fops
= &nouveau_driver_fops
,
443 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
444 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
445 .gem_prime_export
= nouveau_gem_prime_export
,
446 .gem_prime_import
= nouveau_gem_prime_import
,
448 .gem_init_object
= nouveau_gem_object_new
,
449 .gem_free_object
= nouveau_gem_object_del
,
450 .gem_open_object
= nouveau_gem_object_open
,
451 .gem_close_object
= nouveau_gem_object_close
,
453 .dumb_create
= nouveau_display_dumb_create
,
454 .dumb_map_offset
= nouveau_display_dumb_map_offset
,
455 .dumb_destroy
= nouveau_display_dumb_destroy
,
460 .date
= GIT_REVISION
,
464 .major
= DRIVER_MAJOR
,
465 .minor
= DRIVER_MINOR
,
466 .patchlevel
= DRIVER_PATCHLEVEL
,
469 static struct pci_driver nouveau_pci_driver
= {
471 .id_table
= pciidlist
,
472 .probe
= nouveau_pci_probe
,
473 .remove
= nouveau_pci_remove
,
474 .suspend
= nouveau_pci_suspend
,
475 .resume
= nouveau_pci_resume
478 static int __init
nouveau_init(void)
480 driver
.num_ioctls
= ARRAY_SIZE(nouveau_ioctls
);
482 if (nouveau_modeset
== -1) {
483 #ifdef CONFIG_VGA_CONSOLE
484 if (vgacon_text_force())
491 if (!nouveau_modeset
)
494 nouveau_register_dsm_handler();
495 return drm_pci_init(&driver
, &nouveau_pci_driver
);
498 static void __exit
nouveau_exit(void)
500 if (!nouveau_modeset
)
503 drm_pci_exit(&driver
, &nouveau_pci_driver
);
504 nouveau_unregister_dsm_handler();
507 module_init(nouveau_init
);
508 module_exit(nouveau_exit
);
510 MODULE_AUTHOR(DRIVER_AUTHOR
);
511 MODULE_DESCRIPTION(DRIVER_DESC
);
512 MODULE_LICENSE("GPL and additional rights");