2 * Copyright 2005 Stephane Marchesin.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
25 #include <linux/console.h>
26 #include <linux/module.h>
30 #include "drm_crtc_helper.h"
31 #include "nouveau_drv.h"
32 #include "nouveau_hw.h"
33 #include "nouveau_fb.h"
34 #include "nouveau_fbcon.h"
35 #include "nouveau_pm.h"
36 #include "nv50_display.h"
38 #include "drm_pciids.h"
40 MODULE_PARM_DESC(agpmode
, "AGP mode (0 to disable AGP)");
41 int nouveau_agpmode
= -1;
42 module_param_named(agpmode
, nouveau_agpmode
, int, 0400);
44 MODULE_PARM_DESC(modeset
, "Enable kernel modesetting");
45 int nouveau_modeset
= -1;
46 module_param_named(modeset
, nouveau_modeset
, int, 0400);
48 MODULE_PARM_DESC(vbios
, "Override default VBIOS location");
50 module_param_named(vbios
, nouveau_vbios
, charp
, 0400);
52 MODULE_PARM_DESC(vram_pushbuf
, "Force DMA push buffers to be in VRAM");
53 int nouveau_vram_pushbuf
;
54 module_param_named(vram_pushbuf
, nouveau_vram_pushbuf
, int, 0400);
56 MODULE_PARM_DESC(vram_notify
, "Force DMA notifiers to be in VRAM");
57 int nouveau_vram_notify
= 0;
58 module_param_named(vram_notify
, nouveau_vram_notify
, int, 0400);
60 MODULE_PARM_DESC(duallink
, "Allow dual-link TMDS (>=GeForce 8)");
61 int nouveau_duallink
= 1;
62 module_param_named(duallink
, nouveau_duallink
, int, 0400);
64 MODULE_PARM_DESC(uscript_lvds
, "LVDS output script table ID (>=GeForce 8)");
65 int nouveau_uscript_lvds
= -1;
66 module_param_named(uscript_lvds
, nouveau_uscript_lvds
, int, 0400);
68 MODULE_PARM_DESC(uscript_tmds
, "TMDS output script table ID (>=GeForce 8)");
69 int nouveau_uscript_tmds
= -1;
70 module_param_named(uscript_tmds
, nouveau_uscript_tmds
, int, 0400);
72 MODULE_PARM_DESC(ignorelid
, "Ignore ACPI lid status");
73 int nouveau_ignorelid
= 0;
74 module_param_named(ignorelid
, nouveau_ignorelid
, int, 0400);
76 MODULE_PARM_DESC(noaccel
, "Disable all acceleration");
77 int nouveau_noaccel
= -1;
78 module_param_named(noaccel
, nouveau_noaccel
, int, 0400);
80 MODULE_PARM_DESC(nofbaccel
, "Disable fbcon acceleration");
81 int nouveau_nofbaccel
= 0;
82 module_param_named(nofbaccel
, nouveau_nofbaccel
, int, 0400);
84 MODULE_PARM_DESC(force_post
, "Force POST");
85 int nouveau_force_post
= 0;
86 module_param_named(force_post
, nouveau_force_post
, int, 0400);
88 MODULE_PARM_DESC(override_conntype
, "Ignore DCB connector type");
89 int nouveau_override_conntype
= 0;
90 module_param_named(override_conntype
, nouveau_override_conntype
, int, 0400);
92 MODULE_PARM_DESC(tv_disable
, "Disable TV-out detection\n");
93 int nouveau_tv_disable
= 0;
94 module_param_named(tv_disable
, nouveau_tv_disable
, int, 0400);
96 MODULE_PARM_DESC(tv_norm
, "Default TV norm.\n"
97 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
98 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
100 "\t\t*NOTE* Ignored for cards with external TV encoders.");
101 char *nouveau_tv_norm
;
102 module_param_named(tv_norm
, nouveau_tv_norm
, charp
, 0400);
104 MODULE_PARM_DESC(reg_debug
, "Register access debug bitmask:\n"
105 "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
106 "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
107 "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
108 int nouveau_reg_debug
;
109 module_param_named(reg_debug
, nouveau_reg_debug
, int, 0600);
111 MODULE_PARM_DESC(perflvl
, "Performance level (default: boot)\n");
112 char *nouveau_perflvl
;
113 module_param_named(perflvl
, nouveau_perflvl
, charp
, 0400);
115 MODULE_PARM_DESC(perflvl_wr
, "Allow perflvl changes (warning: dangerous!)\n");
116 int nouveau_perflvl_wr
;
117 module_param_named(perflvl_wr
, nouveau_perflvl_wr
, int, 0400);
119 MODULE_PARM_DESC(msi
, "Enable MSI (default: off)\n");
121 module_param_named(msi
, nouveau_msi
, int, 0400);
123 MODULE_PARM_DESC(ctxfw
, "Use external HUB/GPC ucode (fermi)\n");
125 module_param_named(ctxfw
, nouveau_ctxfw
, int, 0400);
127 int nouveau_fbpercrtc
;
129 module_param_named(fbpercrtc
, nouveau_fbpercrtc
, int, 0400);
132 static struct pci_device_id pciidlist
[] = {
134 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA
, PCI_ANY_ID
),
135 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
136 .class_mask
= 0xff << 16,
139 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS
, PCI_ANY_ID
),
140 .class = PCI_BASE_CLASS_DISPLAY
<< 16,
141 .class_mask
= 0xff << 16,
146 MODULE_DEVICE_TABLE(pci
, pciidlist
);
148 static struct drm_driver driver
;
151 nouveau_pci_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
153 return drm_get_pci_dev(pdev
, ent
, &driver
);
157 nouveau_pci_remove(struct pci_dev
*pdev
)
159 struct drm_device
*dev
= pci_get_drvdata(pdev
);
165 nouveau_pci_suspend(struct pci_dev
*pdev
, pm_message_t pm_state
)
167 struct drm_device
*dev
= pci_get_drvdata(pdev
);
168 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
169 struct nouveau_instmem_engine
*pinstmem
= &dev_priv
->engine
.instmem
;
170 struct nouveau_fifo_engine
*pfifo
= &dev_priv
->engine
.fifo
;
171 struct nouveau_channel
*chan
;
172 struct drm_crtc
*crtc
;
175 if (pm_state
.event
== PM_EVENT_PRETHAW
)
178 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
181 NV_INFO(dev
, "Disabling fbcon acceleration...\n");
182 nouveau_fbcon_save_disable_accel(dev
);
184 NV_INFO(dev
, "Unpinning framebuffer(s)...\n");
185 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
186 struct nouveau_framebuffer
*nouveau_fb
;
188 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
189 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
192 nouveau_bo_unpin(nouveau_fb
->nvbo
);
195 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
196 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
198 nouveau_bo_unmap(nv_crtc
->cursor
.nvbo
);
199 nouveau_bo_unpin(nv_crtc
->cursor
.nvbo
);
202 NV_INFO(dev
, "Evicting buffers...\n");
203 ttm_bo_evict_mm(&dev_priv
->ttm
.bdev
, TTM_PL_VRAM
);
205 NV_INFO(dev
, "Idling channels...\n");
206 for (i
= 0; i
< pfifo
->channels
; i
++) {
207 chan
= dev_priv
->channels
.ptr
[i
];
209 if (chan
&& chan
->pushbuf_bo
)
210 nouveau_channel_idle(chan
);
213 pfifo
->reassign(dev
, false);
215 pfifo
->unload_context(dev
);
217 for (e
= NVOBJ_ENGINE_NR
- 1; e
>= 0; e
--) {
218 if (!dev_priv
->eng
[e
])
221 ret
= dev_priv
->eng
[e
]->fini(dev
, e
, true);
223 NV_ERROR(dev
, "... engine %d failed: %d\n", i
, ret
);
228 ret
= pinstmem
->suspend(dev
);
230 NV_ERROR(dev
, "... failed: %d\n", ret
);
234 NV_INFO(dev
, "Suspending GPU objects...\n");
235 ret
= nouveau_gpuobj_suspend(dev
);
237 NV_ERROR(dev
, "... failed: %d\n", ret
);
238 pinstmem
->resume(dev
);
242 NV_INFO(dev
, "And we're gone!\n");
243 pci_save_state(pdev
);
244 if (pm_state
.event
== PM_EVENT_SUSPEND
) {
245 pci_disable_device(pdev
);
246 pci_set_power_state(pdev
, PCI_D3hot
);
250 nouveau_fbcon_set_suspend(dev
, 1);
252 nouveau_fbcon_restore_accel(dev
);
256 NV_INFO(dev
, "Re-enabling acceleration..\n");
257 for (e
= e
+ 1; e
< NVOBJ_ENGINE_NR
; e
++) {
258 if (dev_priv
->eng
[e
])
259 dev_priv
->eng
[e
]->init(dev
, e
);
262 pfifo
->reassign(dev
, true);
267 nouveau_pci_resume(struct pci_dev
*pdev
)
269 struct drm_device
*dev
= pci_get_drvdata(pdev
);
270 struct drm_nouveau_private
*dev_priv
= dev
->dev_private
;
271 struct nouveau_engine
*engine
= &dev_priv
->engine
;
272 struct drm_crtc
*crtc
;
275 if (dev
->switch_power_state
== DRM_SWITCH_POWER_OFF
)
278 nouveau_fbcon_save_disable_accel(dev
);
280 NV_INFO(dev
, "We're back, enabling device...\n");
281 pci_set_power_state(pdev
, PCI_D0
);
282 pci_restore_state(pdev
);
283 if (pci_enable_device(pdev
))
285 pci_set_master(dev
->pdev
);
287 /* Make sure the AGP controller is in a consistent state */
288 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
)
289 nouveau_mem_reset_agp(dev
);
291 /* Make the CRTCs accessible */
292 engine
->display
.early_init(dev
);
294 NV_INFO(dev
, "POSTing device...\n");
295 ret
= nouveau_run_vbios_init(dev
);
299 nouveau_pm_resume(dev
);
301 if (dev_priv
->gart_info
.type
== NOUVEAU_GART_AGP
) {
302 ret
= nouveau_mem_init_agp(dev
);
304 NV_ERROR(dev
, "error reinitialising AGP: %d\n", ret
);
309 NV_INFO(dev
, "Restoring GPU objects...\n");
310 nouveau_gpuobj_resume(dev
);
312 NV_INFO(dev
, "Reinitialising engines...\n");
313 engine
->instmem
.resume(dev
);
314 engine
->mc
.init(dev
);
315 engine
->timer
.init(dev
);
316 engine
->fb
.init(dev
);
317 for (i
= 0; i
< NVOBJ_ENGINE_NR
; i
++) {
318 if (dev_priv
->eng
[i
])
319 dev_priv
->eng
[i
]->init(dev
, i
);
321 engine
->fifo
.init(dev
);
323 nouveau_irq_postinstall(dev
);
325 /* Re-write SKIPS, they'll have been lost over the suspend */
326 if (nouveau_vram_pushbuf
) {
327 struct nouveau_channel
*chan
;
330 for (i
= 0; i
< dev_priv
->engine
.fifo
.channels
; i
++) {
331 chan
= dev_priv
->channels
.ptr
[i
];
332 if (!chan
|| !chan
->pushbuf_bo
)
335 for (j
= 0; j
< NOUVEAU_DMA_SKIPS
; j
++)
336 nouveau_bo_wr32(chan
->pushbuf_bo
, i
, 0);
340 NV_INFO(dev
, "Restoring mode...\n");
341 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
342 struct nouveau_framebuffer
*nouveau_fb
;
344 nouveau_fb
= nouveau_framebuffer(crtc
->fb
);
345 if (!nouveau_fb
|| !nouveau_fb
->nvbo
)
348 nouveau_bo_pin(nouveau_fb
->nvbo
, TTM_PL_FLAG_VRAM
);
351 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
352 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
354 ret
= nouveau_bo_pin(nv_crtc
->cursor
.nvbo
, TTM_PL_FLAG_VRAM
);
356 ret
= nouveau_bo_map(nv_crtc
->cursor
.nvbo
);
358 NV_ERROR(dev
, "Could not pin/map cursor.\n");
361 engine
->display
.init(dev
);
363 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
364 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
365 u32 offset
= nv_crtc
->cursor
.nvbo
->bo
.offset
;
367 nv_crtc
->cursor
.set_offset(nv_crtc
, offset
);
368 nv_crtc
->cursor
.set_pos(nv_crtc
, nv_crtc
->cursor_saved_x
,
369 nv_crtc
->cursor_saved_y
);
372 /* Force CLUT to get re-loaded during modeset */
373 list_for_each_entry(crtc
, &dev
->mode_config
.crtc_list
, head
) {
374 struct nouveau_crtc
*nv_crtc
= nouveau_crtc(crtc
);
376 nv_crtc
->lut
.depth
= 0;
380 nouveau_fbcon_set_suspend(dev
, 0);
383 nouveau_fbcon_zfill_all(dev
);
385 drm_helper_resume_force_mode(dev
);
387 nouveau_fbcon_restore_accel(dev
);
391 static struct drm_driver driver
= {
393 DRIVER_USE_AGP
| DRIVER_PCI_DMA
| DRIVER_SG
|
394 DRIVER_HAVE_IRQ
| DRIVER_IRQ_SHARED
| DRIVER_GEM
|
396 .load
= nouveau_load
,
397 .firstopen
= nouveau_firstopen
,
398 .lastclose
= nouveau_lastclose
,
399 .unload
= nouveau_unload
,
400 .open
= nouveau_open
,
401 .preclose
= nouveau_preclose
,
402 .postclose
= nouveau_postclose
,
403 #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
404 .debugfs_init
= nouveau_debugfs_init
,
405 .debugfs_cleanup
= nouveau_debugfs_takedown
,
407 .irq_preinstall
= nouveau_irq_preinstall
,
408 .irq_postinstall
= nouveau_irq_postinstall
,
409 .irq_uninstall
= nouveau_irq_uninstall
,
410 .irq_handler
= nouveau_irq_handler
,
411 .get_vblank_counter
= drm_vblank_count
,
412 .enable_vblank
= nouveau_vblank_enable
,
413 .disable_vblank
= nouveau_vblank_disable
,
414 .reclaim_buffers
= drm_core_reclaim_buffers
,
415 .ioctls
= nouveau_ioctls
,
417 .owner
= THIS_MODULE
,
419 .release
= drm_release
,
420 .unlocked_ioctl
= drm_ioctl
,
421 .mmap
= nouveau_ttm_mmap
,
423 .fasync
= drm_fasync
,
425 #if defined(CONFIG_COMPAT)
426 .compat_ioctl
= nouveau_compat_ioctl
,
428 .llseek
= noop_llseek
,
431 .gem_init_object
= nouveau_gem_object_new
,
432 .gem_free_object
= nouveau_gem_object_del
,
433 .gem_open_object
= nouveau_gem_object_open
,
434 .gem_close_object
= nouveau_gem_object_close
,
439 .date
= GIT_REVISION
,
443 .major
= DRIVER_MAJOR
,
444 .minor
= DRIVER_MINOR
,
445 .patchlevel
= DRIVER_PATCHLEVEL
,
448 static struct pci_driver nouveau_pci_driver
= {
450 .id_table
= pciidlist
,
451 .probe
= nouveau_pci_probe
,
452 .remove
= nouveau_pci_remove
,
453 .suspend
= nouveau_pci_suspend
,
454 .resume
= nouveau_pci_resume
457 static int __init
nouveau_init(void)
459 driver
.num_ioctls
= nouveau_max_ioctl
;
461 if (nouveau_modeset
== -1) {
462 #ifdef CONFIG_VGA_CONSOLE
463 if (vgacon_text_force())
470 if (!nouveau_modeset
)
473 nouveau_register_dsm_handler();
474 return drm_pci_init(&driver
, &nouveau_pci_driver
);
477 static void __exit
nouveau_exit(void)
479 if (!nouveau_modeset
)
482 drm_pci_exit(&driver
, &nouveau_pci_driver
);
483 nouveau_unregister_dsm_handler();
486 module_init(nouveau_init
);
487 module_exit(nouveau_exit
);
489 MODULE_AUTHOR(DRIVER_AUTHOR
);
490 MODULE_DESCRIPTION(DRIVER_DESC
);
491 MODULE_LICENSE("GPL and additional rights");