drivers/gpu/drm/nouveau/nv50_fbcon.c

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <drm/drmP.h>
  26 #include "nouveau_drv.h"
  27 #include "nouveau_dma.h"
  28 #include "nouveau_ramht.h"
  29 #include "nouveau_fbcon.h"
  30 #include "nouveau_mm.h"
  31
  32 int
  33 nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
  34 {
  35         struct nouveau_fbdev *nfbdev = info->par;
  36         struct drm_device *dev = nfbdev->dev;
  37         struct drm_nouveau_private *dev_priv = dev->dev_private;
  38         struct nouveau_channel *chan = dev_priv->channel;
  39         int ret;
  40
  41         ret = RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11);
  42         if (ret)
  43                 return ret;
  44
  45         if (rect->rop != ROP_COPY) {
  46                 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
  47                 OUT_RING(chan, 1);
  48         }
  49         BEGIN_NV04(chan, NvSub2D, 0x0588, 1);
  50         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
  51             info->fix.visual == FB_VISUAL_DIRECTCOLOR)
  52                 OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
  53         else
  54                 OUT_RING(chan, rect->color);
  55         BEGIN_NV04(chan, NvSub2D, 0x0600, 4);
  56         OUT_RING(chan, rect->dx);
  57         OUT_RING(chan, rect->dy);
  58         OUT_RING(chan, rect->dx + rect->width);
  59         OUT_RING(chan, rect->dy + rect->height);
  60         if (rect->rop != ROP_COPY) {
  61                 BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
  62                 OUT_RING(chan, 3);
  63         }
  64         FIRE_RING(chan);
  65         return 0;
  66 }
  67
  68 int
  69 nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
  70 {
  71         struct nouveau_fbdev *nfbdev = info->par;
  72         struct drm_device *dev = nfbdev->dev;
  73         struct drm_nouveau_private *dev_priv = dev->dev_private;
  74         struct nouveau_channel *chan = dev_priv->channel;
  75         int ret;
  76
  77         ret = RING_SPACE(chan, 12);
  78         if (ret)
  79                 return ret;
  80
  81         BEGIN_NV04(chan, NvSub2D, 0x0110, 1);
  82         OUT_RING(chan, 0);
  83         BEGIN_NV04(chan, NvSub2D, 0x08b0, 4);
  84         OUT_RING(chan, region->dx);
  85         OUT_RING(chan, region->dy);
  86         OUT_RING(chan, region->width);
  87         OUT_RING(chan, region->height);
  88         BEGIN_NV04(chan, NvSub2D, 0x08d0, 4);
  89         OUT_RING(chan, 0);
  90         OUT_RING(chan, region->sx);
  91         OUT_RING(chan, 0);
  92         OUT_RING(chan, region->sy);
  93         FIRE_RING(chan);
  94         return 0;
  95 }
  96
  97 int
  98 nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
  99 {
 100         struct nouveau_fbdev *nfbdev = info->par;
 101         struct drm_device *dev = nfbdev->dev;
 102         struct drm_nouveau_private *dev_priv = dev->dev_private;
 103         struct nouveau_channel *chan = dev_priv->channel;
 104         uint32_t width, dwords, *data = (uint32_t *)image->data;
 105         uint32_t mask = ~(~0 >> (32 - info->var.bits_per_pixel));
 106         uint32_t *palette = info->pseudo_palette;
 107         int ret;
 108
 109         if (image->depth != 1)
 110                 return -ENODEV;
 111
 112         ret = RING_SPACE(chan, 11);
 113         if (ret)
 114                 return ret;
 115
 116         width = ALIGN(image->width, 32);
 117         dwords = (width * image->height) >> 5;
 118
 119         BEGIN_NV04(chan, NvSub2D, 0x0814, 2);
 120         if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
 121             info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
 122                 OUT_RING(chan, palette[image->bg_color] | mask);
 123                 OUT_RING(chan, palette[image->fg_color] | mask);
 124         } else {
 125                 OUT_RING(chan, image->bg_color);
 126                 OUT_RING(chan, image->fg_color);
 127         }
 128         BEGIN_NV04(chan, NvSub2D, 0x0838, 2);
 129         OUT_RING(chan, image->width);
 130         OUT_RING(chan, image->height);
 131         BEGIN_NV04(chan, NvSub2D, 0x0850, 4);
 132         OUT_RING(chan, 0);
 133         OUT_RING(chan, image->dx);
 134         OUT_RING(chan, 0);
 135         OUT_RING(chan, image->dy);
 136
 137         while (dwords) {
 138                 int push = dwords > 2047 ? 2047 : dwords;
 139
 140                 ret = RING_SPACE(chan, push + 1);
 141                 if (ret)
 142                         return ret;
 143
 144                 dwords -= push;
 145
 146                 BEGIN_NI04(chan, NvSub2D, 0x0860, push);
 147                 OUT_RINGp(chan, data, push);
 148                 data += push;
 149         }
 150
 151         FIRE_RING(chan);
 152         return 0;
 153 }
 154
 155 int
 156 nv50_fbcon_accel_init(struct fb_info *info)
 157 {
 158         struct nouveau_fbdev *nfbdev = info->par;
 159         struct drm_device *dev = nfbdev->dev;
 160         struct drm_nouveau_private *dev_priv = dev->dev_private;
 161         struct nouveau_channel *chan = dev_priv->channel;
 162         struct nouveau_framebuffer *fb = &nfbdev->nouveau_fb;
 163         int ret, format;
 164
 165         switch (info->var.bits_per_pixel) {
 166         case 8:
 167                 format = 0xf3;
 168                 break;
 169         case 15:
 170                 format = 0xf8;
 171                 break;
 172         case 16:
 173                 format = 0xe8;
 174                 break;
 175         case 32:
 176                 switch (info->var.transp.length) {
 177                 case 0: /* depth 24 */
 178                 case 8: /* depth 32, just use 24.. */
 179                         format = 0xe6;
 180                         break;
 181                 case 2: /* depth 30 */
 182                         format = 0xd1;
 183                         break;
 184                 default:
 185                         return -EINVAL;
 186                 }
 187                 break;
 188         default:
 189                 return -EINVAL;
 190         }
 191
 192         ret = nouveau_gpuobj_gr_new(dev_priv->channel, Nv2D, 0x502d);
 193         if (ret)
 194                 return ret;
 195
 196         ret = RING_SPACE(chan, 59);
 197         if (ret) {
 198                 nouveau_fbcon_gpu_lockup(info);
 199                 return ret;
 200         }
 201
 202         BEGIN_NV04(chan, NvSub2D, 0x0000, 1);
 203         OUT_RING(chan, Nv2D);
 204         BEGIN_NV04(chan, NvSub2D, 0x0184, 3);
 205         OUT_RING(chan, chan->vram_handle);
 206         OUT_RING(chan, chan->vram_handle);
 207         OUT_RING(chan, chan->vram_handle);
 208         BEGIN_NV04(chan, NvSub2D, 0x0290, 1);
 209         OUT_RING(chan, 0);
 210         BEGIN_NV04(chan, NvSub2D, 0x0888, 1);
 211         OUT_RING(chan, 1);
 212         BEGIN_NV04(chan, NvSub2D, 0x02ac, 1);
 213         OUT_RING(chan, 3);
 214         BEGIN_NV04(chan, NvSub2D, 0x02a0, 1);
 215         OUT_RING(chan, 0x55);
 216         BEGIN_NV04(chan, NvSub2D, 0x08c0, 4);
 217         OUT_RING(chan, 0);
 218         OUT_RING(chan, 1);
 219         OUT_RING(chan, 0);
 220         OUT_RING(chan, 1);
 221         BEGIN_NV04(chan, NvSub2D, 0x0580, 2);
 222         OUT_RING(chan, 4);
 223         OUT_RING(chan, format);
 224         BEGIN_NV04(chan, NvSub2D, 0x02e8, 2);
 225         OUT_RING(chan, 2);
 226         OUT_RING(chan, 1);
 227         BEGIN_NV04(chan, NvSub2D, 0x0804, 1);
 228         OUT_RING(chan, format);
 229         BEGIN_NV04(chan, NvSub2D, 0x0800, 1);
 230         OUT_RING(chan, 1);
 231         BEGIN_NV04(chan, NvSub2D, 0x0808, 3);
 232         OUT_RING(chan, 0);
 233         OUT_RING(chan, 0);
 234         OUT_RING(chan, 1);
 235         BEGIN_NV04(chan, NvSub2D, 0x081c, 1);
 236         OUT_RING(chan, 1);
 237         BEGIN_NV04(chan, NvSub2D, 0x0840, 4);
 238         OUT_RING(chan, 0);
 239         OUT_RING(chan, 1);
 240         OUT_RING(chan, 0);
 241         OUT_RING(chan, 1);
 242         BEGIN_NV04(chan, NvSub2D, 0x0200, 2);
 243         OUT_RING(chan, format);
 244         OUT_RING(chan, 1);
 245         BEGIN_NV04(chan, NvSub2D, 0x0214, 5);
 246         OUT_RING(chan, info->fix.line_length);
 247         OUT_RING(chan, info->var.xres_virtual);
 248         OUT_RING(chan, info->var.yres_virtual);
 249         OUT_RING(chan, upper_32_bits(fb->vma.offset));
 250         OUT_RING(chan, lower_32_bits(fb->vma.offset));
 251         BEGIN_NV04(chan, NvSub2D, 0x0230, 2);
 252         OUT_RING(chan, format);
 253         OUT_RING(chan, 1);
 254         BEGIN_NV04(chan, NvSub2D, 0x0244, 5);
 255         OUT_RING(chan, info->fix.line_length);
 256         OUT_RING(chan, info->var.xres_virtual);
 257         OUT_RING(chan, info->var.yres_virtual);
 258         OUT_RING(chan, upper_32_bits(fb->vma.offset));
 259         OUT_RING(chan, lower_32_bits(fb->vma.offset));
 260
 261         return 0;
 262 }
 263