]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/gpu/drm/nouveau/nvkm/engine/disp/hdagt215.c
Merge branches 'iommu/fixes', 'arm/exynos', 'arm/renesas', 'arm/smmu', 'arm/mediatek...
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / nouveau / nvkm / engine / disp / hdagt215.c
1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "nv50.h"
25 #include "outp.h"
26
27 #include <core/client.h>
28 #include <subdev/timer.h>
29
30 #include <nvif/cl5070.h>
31 #include <nvif/unpack.h>
32
33 int
34 gt215_hda_eld(NV50_DISP_MTHD_V1)
35 {
36 struct nvkm_device *device = disp->base.engine.subdev.device;
37 union {
38 struct nv50_disp_sor_hda_eld_v0 v0;
39 } *args = data;
40 const u32 soff = outp->or * 0x800;
41 int ret = -ENOSYS, i;
42
43 nvif_ioctl(object, "disp sor hda eld size %d\n", size);
44 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
45 nvif_ioctl(object, "disp sor hda eld vers %d\n",
46 args->v0.version);
47 if (size > 0x60)
48 return -E2BIG;
49 } else
50 return ret;
51
52 if (size && args->v0.data[0]) {
53 if (outp->info.type == DCB_OUTPUT_DP) {
54 nvkm_mask(device, 0x61c1e0 + soff, 0x8000000d, 0x80000001);
55 nvkm_msec(device, 2000,
56 u32 tmp = nvkm_rd32(device, 0x61c1e0 + soff);
57 if (!(tmp & 0x80000000))
58 break;
59 );
60 }
61 for (i = 0; i < size; i++)
62 nvkm_wr32(device, 0x61c440 + soff, (i << 8) | args->v0.data[i]);
63 for (; i < 0x60; i++)
64 nvkm_wr32(device, 0x61c440 + soff, (i << 8));
65 nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000003);
66 } else {
67 if (outp->info.type == DCB_OUTPUT_DP) {
68 nvkm_mask(device, 0x61c1e0 + soff, 0x80000001, 0x80000000);
69 nvkm_msec(device, 2000,
70 u32 tmp = nvkm_rd32(device, 0x61c1e0 + soff);
71 if (!(tmp & 0x80000000))
72 break;
73 );
74 }
75 nvkm_mask(device, 0x61c448 + soff, 0x80000003, 0x80000000 | !!size);
76 }
77
78 return 0;
79 }