drivers/gpu/drm/nouveau/nvkm/engine/fifo/gp10b.c

   1 /*
   2  * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "gk104.h"
  23 #include "changk104.h"
  24
  25 #include <nvif/class.h>
  26
  27 static const struct gk104_fifo_func
  28 gp10b_fifo = {
  29         .intr.fault = gp100_fifo_intr_fault,
  30         .pbdma = &gm200_fifo_pbdma,
  31         .fault.access = gk104_fifo_fault_access,
  32         .fault.engine = gp100_fifo_fault_engine,
  33         .fault.reason = gk104_fifo_fault_reason,
  34         .fault.hubclient = gk104_fifo_fault_hubclient,
  35         .fault.gpcclient = gk104_fifo_fault_gpcclient,
  36         .runlist = &gm107_fifo_runlist,
  37         .chan = {{0,0,PASCAL_CHANNEL_GPFIFO_A}, gk104_fifo_gpfifo_new },
  38         .cgrp_force = true,
  39 };
  40
  41 int
  42 gp10b_fifo_new(struct nvkm_device *device, int index, struct nvkm_fifo **pfifo)
  43 {
  44         return gk104_fifo_new_(&gp10b_fifo, device, index, 512, pfifo);
  45 }