drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #define nv04_sw_chan(p) container_of((p), struct nv04_sw_chan, base)
  25 #include "priv.h"
  26 #include "chan.h"
  27 #include "nvsw.h"
  28
  29 #include <nvif/class.h>
  30 #include <nvif/ioctl.h>
  31 #include <nvif/unpack.h>
  32
  33 struct nv04_sw_chan {
  34         struct nvkm_sw_chan base;
  35         atomic_t ref;
  36 };
  37
  38 /*******************************************************************************
  39  * software object classes
  40  ******************************************************************************/
  41
  42 static int
  43 nv04_sw_mthd_get_ref(struct nvkm_object *object, void *data, u32 size)
  44 {
  45         struct nv04_sw_chan *chan = (void *)object->parent;
  46         union {
  47                 struct nv04_nvsw_get_ref_v0 v0;
  48         } *args = data;
  49         int ret;
  50
  51         if (nvif_unpack(args->v0, 0, 0, false)) {
  52                 args->v0.ref = atomic_read(&chan->ref);
  53         }
  54
  55         return ret;
  56 }
  57
  58 static int
  59 nv04_sw_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
  60 {
  61         switch (mthd) {
  62         case NV04_NVSW_GET_REF:
  63                 return nv04_sw_mthd_get_ref(object, data, size);
  64         default:
  65                 break;
  66         }
  67         return -EINVAL;
  68 }
  69
  70 static struct nvkm_ofuncs
  71 nv04_sw_ofuncs = {
  72         .ctor = nvkm_nvsw_ctor,
  73         .dtor = nvkm_object_destroy,
  74         .init = _nvkm_object_init,
  75         .fini = _nvkm_object_fini,
  76         .mthd = nv04_sw_mthd,
  77 };
  78
  79 static struct nvkm_oclass
  80 nv04_sw_sclass[] = {
  81         { NVIF_IOCTL_NEW_V0_SW_NV04, &nv04_sw_ofuncs },
  82         {}
  83 };
  84
  85 /*******************************************************************************
  86  * software context
  87  ******************************************************************************/
  88
  89 static bool
  90 nv04_sw_chan_mthd(struct nvkm_sw_chan *base, int subc, u32 mthd, u32 data)
  91 {
  92         struct nv04_sw_chan *chan = nv04_sw_chan(base);
  93
  94         switch (mthd) {
  95         case 0x0150:
  96                 atomic_set(&chan->ref, data);
  97                 return true;
  98         default:
  99                 break;
 100         }
 101
 102         return false;
 103 }
 104
 105 static const struct nvkm_sw_chan_func
 106 nv04_sw_chan_func = {
 107         .mthd = nv04_sw_chan_mthd,
 108 };
 109
 110 static int
 111 nv04_sw_context_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 112                      struct nvkm_oclass *oclass, void *data, u32 size,
 113                      struct nvkm_object **pobject)
 114 {
 115         struct nv04_sw_chan *chan;
 116         int ret;
 117
 118         ret = nvkm_sw_context_create(&nv04_sw_chan_func,
 119                                      parent, engine, oclass, &chan);
 120         *pobject = nv_object(chan);
 121         if (ret)
 122                 return ret;
 123
 124         atomic_set(&chan->ref, 0);
 125         return 0;
 126 }
 127
 128 static struct nvkm_oclass
 129 nv04_sw_cclass = {
 130         .handle = NV_ENGCTX(SW, 0x04),
 131         .ofuncs = &(struct nvkm_ofuncs) {
 132                 .ctor = nv04_sw_context_ctor,
 133                 .dtor = _nvkm_sw_context_dtor,
 134                 .init = _nvkm_sw_context_init,
 135                 .fini = _nvkm_sw_context_fini,
 136         },
 137 };
 138
 139 /*******************************************************************************
 140  * software engine/subdev functions
 141  ******************************************************************************/
 142
 143 void
 144 nv04_sw_intr(struct nvkm_subdev *subdev)
 145 {
 146         nvkm_mask(subdev->device, 0x000100, 0x80000000, 0x00000000);
 147 }
 148
 149 static int
 150 nv04_sw_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
 151              struct nvkm_oclass *oclass, void *data, u32 size,
 152              struct nvkm_object **pobject)
 153 {
 154         struct nvkm_sw *sw;
 155         int ret;
 156
 157         ret = nvkm_sw_create(parent, engine, oclass, &sw);
 158         *pobject = nv_object(sw);
 159         if (ret)
 160                 return ret;
 161
 162         nv_engine(sw)->cclass = &nv04_sw_cclass;
 163         nv_engine(sw)->sclass = nv04_sw_sclass;
 164         nv_subdev(sw)->intr = nv04_sw_intr;
 165         return 0;
 166 }
 167
 168 struct nvkm_oclass *
 169 nv04_sw_oclass = &(struct nvkm_oclass) {
 170         .handle = NV_ENGINE(SW, 0x04),
 171         .ofuncs = &(struct nvkm_ofuncs) {
 172                 .ctor = nv04_sw_ctor,
 173                 .dtor = _nvkm_sw_dtor,
 174                 .init = _nvkm_sw_init,
 175                 .fini = _nvkm_sw_fini,
 176         },
 177 };