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git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blob - drivers/gpu/drm/nouveau/nvkm/subdev/fb/nv30.c
2 * Copyright (C) 2010 Francisco Jerez.
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
28 #include <core/device.h>
31 nv30_fb_tile_init(struct nvkm_fb
*pfb
, int i
, u32 addr
, u32 size
, u32 pitch
,
32 u32 flags
, struct nvkm_fb_tile
*tile
)
34 /* for performance, select alternate bank offset for zeta */
36 tile
->addr
= (0 << 4);
38 if (pfb
->tile
.comp
) /* z compression */
39 pfb
->tile
.comp(pfb
, i
, size
, flags
, tile
);
40 tile
->addr
= (1 << 4);
43 tile
->addr
|= 0x00000001; /* enable */
45 tile
->limit
= max(1u, addr
+ size
) - 1;
50 nv30_fb_tile_comp(struct nvkm_fb
*pfb
, int i
, u32 size
, u32 flags
,
51 struct nvkm_fb_tile
*tile
)
53 u32 tiles
= DIV_ROUND_UP(size
, 0x40);
54 u32 tags
= round_up(tiles
/ pfb
->ram
->parts
, 0x40);
55 if (!nvkm_mm_head(&pfb
->tags
, 0, 1, tags
, tags
, 1, &tile
->tag
)) {
56 if (flags
& 2) tile
->zcomp
|= 0x01000000; /* Z16 */
57 else tile
->zcomp
|= 0x02000000; /* Z24S8 */
58 tile
->zcomp
|= ((tile
->tag
->offset
) >> 6);
59 tile
->zcomp
|= ((tile
->tag
->offset
+ tags
- 1) >> 6) << 12;
61 tile
->zcomp
|= 0x10000000;
67 calc_bias(struct nv04_fb_priv
*priv
, int k
, int i
, int j
)
69 struct nvkm_device
*device
= nv_device(priv
);
70 int b
= (device
->chipset
> 0x30 ?
71 nv_rd32(priv
, 0x122c + 0x10 * k
+ 0x4 * j
) >> (4 * (i
^ 1)) :
74 return 2 * (b
& 0x8 ? b
- 0x10 : b
);
78 calc_ref(struct nv04_fb_priv
*priv
, int l
, int k
, int i
)
82 for (j
= 0; j
< 4; j
++) {
83 int m
= (l
>> (8 * i
) & 0xff) + calc_bias(priv
, k
, i
, j
);
85 x
|= (0x80 | clamp(m
, 0, 0x1f)) << (8 * j
);
92 nv30_fb_init(struct nvkm_object
*object
)
94 struct nvkm_device
*device
= nv_device(object
);
95 struct nv04_fb_priv
*priv
= (void *)object
;
98 ret
= nvkm_fb_init(&priv
->base
);
102 /* Init the memory timing regs at 0x10037c/0x1003ac */
103 if (device
->chipset
== 0x30 ||
104 device
->chipset
== 0x31 ||
105 device
->chipset
== 0x35) {
106 /* Related to ROP count */
107 int n
= (device
->chipset
== 0x31 ? 2 : 4);
108 int l
= nv_rd32(priv
, 0x1003d0);
110 for (i
= 0; i
< n
; i
++) {
111 for (j
= 0; j
< 3; j
++)
112 nv_wr32(priv
, 0x10037c + 0xc * i
+ 0x4 * j
,
113 calc_ref(priv
, l
, 0, j
));
115 for (j
= 0; j
< 2; j
++)
116 nv_wr32(priv
, 0x1003ac + 0x8 * i
+ 0x4 * j
,
117 calc_ref(priv
, l
, 1, j
));
125 nv30_fb_oclass
= &(struct nv04_fb_impl
) {
126 .base
.base
.handle
= NV_SUBDEV(FB
, 0x30),
127 .base
.base
.ofuncs
= &(struct nvkm_ofuncs
) {
128 .ctor
= nv04_fb_ctor
,
129 .dtor
= _nvkm_fb_dtor
,
130 .init
= nv30_fb_init
,
131 .fini
= _nvkm_fb_fini
,
133 .base
.memtype
= nv04_fb_memtype_valid
,
134 .base
.ram
= &nv20_ram_oclass
,
136 .tile
.init
= nv30_fb_tile_init
,
137 .tile
.comp
= nv30_fb_tile_comp
,
138 .tile
.fini
= nv20_fb_tile_fini
,
139 .tile
.prog
= nv20_fb_tile_prog
,