drivers/gpu/drm/nouveau/nvkm/subdev/i2c/padnv94.c

   1 /*
   2  * Copyright 2014 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include "pad.h"
  26
  27 struct nv94_i2c_pad {
  28         struct nvkm_i2c_pad base;
  29         int addr;
  30 };
  31
  32 static int
  33 nv94_i2c_pad_fini(struct nouveau_object *object, bool suspend)
  34 {
  35         struct nouveau_i2c *i2c = (void *)nouveau_i2c(object);
  36         struct nv94_i2c_pad *pad = (void *)object;
  37         nv_mask(i2c, 0x00e50c + pad->addr, 0x00000001, 0x00000001);
  38         return nvkm_i2c_pad_fini(&pad->base, suspend);
  39 }
  40
  41 static int
  42 nv94_i2c_pad_init(struct nouveau_object *object)
  43 {
  44         struct nouveau_i2c *i2c = (void *)nouveau_i2c(object);
  45         struct nv94_i2c_pad *pad = (void *)object;
  46
  47         switch (nv_oclass(pad->base.next)->handle) {
  48         case NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_AUX):
  49                 nv_mask(i2c, 0x00e500 + pad->addr, 0x0000c003, 0x00000002);
  50                 break;
  51         case NV_I2C_TYPE_DCBI2C(DCB_I2C_NVIO_BIT):
  52         default:
  53                 nv_mask(i2c, 0x00e500 + pad->addr, 0x0000c003, 0x0000c001);
  54                 break;
  55         }
  56
  57         nv_mask(i2c, 0x00e50c + pad->addr, 0x00000001, 0x00000000);
  58         return nvkm_i2c_pad_init(&pad->base);
  59 }
  60
  61 static int
  62 nv94_i2c_pad_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
  63                   struct nouveau_oclass *oclass, void *data, u32 index,
  64                   struct nouveau_object **pobject)
  65 {
  66         struct nv94_i2c_pad *pad;
  67         int ret;
  68
  69         ret = nvkm_i2c_pad_create(parent, engine, oclass, index, &pad);
  70         *pobject = nv_object(pad);
  71         if (ret)
  72                 return ret;
  73
  74         pad->addr = index * 0x50;;
  75         return 0;
  76 }
  77
  78 struct nouveau_oclass
  79 nv94_i2c_pad_oclass = {
  80         .ofuncs = &(struct nouveau_ofuncs) {
  81                 .ctor = nv94_i2c_pad_ctor,
  82                 .dtor = _nvkm_i2c_pad_dtor,
  83                 .init = nv94_i2c_pad_init,
  84                 .fini = nv94_i2c_pad_fini,
  85         },
  86 };