2 * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
24 * GK20A does not have dedicated video memory, and to accurately represent this
25 * fact Nouveau will not create a RAM device for it. Therefore its instmem
26 * implementation must be done directly on top of system memory, while
27 * preserving coherency for read and write operations.
29 * Instmem can be allocated through two means:
30 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
31 * pages contiguous to the GPU. This is the preferred way.
32 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
35 * In both cases CPU read and writes are performed by creating a write-combined
36 * mapping. The GPU L2 cache must thus be flushed/invalidated when required. To
37 * be conservative we do this every time we acquire or release an instobj, but
38 * ideally L2 management should be handled at a higher level.
40 * To improve performance, CPU mappings are not removed upon instobj release.
41 * Instead they are placed into a LRU list to be recycled when the mapped space
42 * goes beyond a certain threshold. At the moment this limit is 1MB.
46 #include <core/memory.h>
48 #include <core/tegra.h>
49 #include <subdev/fb.h>
50 #include <subdev/ltc.h>
51 #include <subdev/mmu.h>
53 struct gk20a_instobj
{
54 struct nvkm_memory memory
;
55 struct nvkm_mm_node
*mn
;
56 struct gk20a_instmem
*imem
;
61 #define gk20a_instobj(p) container_of((p), struct gk20a_instobj, memory)
64 * Used for objects allocated using the DMA API
66 struct gk20a_instobj_dma
{
67 struct gk20a_instobj base
;
70 struct nvkm_mm_node r
;
72 #define gk20a_instobj_dma(p) \
73 container_of(gk20a_instobj(p), struct gk20a_instobj_dma, base)
76 * Used for objects flattened using the IOMMU API
78 struct gk20a_instobj_iommu
{
79 struct gk20a_instobj base
;
81 /* to link into gk20a_instmem::vaddr_lru */
82 struct list_head vaddr_node
;
83 /* how many clients are using vaddr? */
86 /* will point to the higher half of pages */
87 dma_addr_t
*dma_addrs
;
88 /* array of base.mem->size pages (+ dma_addr_ts) */
91 #define gk20a_instobj_iommu(p) \
92 container_of(gk20a_instobj(p), struct gk20a_instobj_iommu, base)
94 struct gk20a_instmem
{
95 struct nvkm_instmem base
;
97 /* protects vaddr_* and gk20a_instobj::vaddr* */
100 /* CPU mappings LRU */
101 unsigned int vaddr_use
;
102 unsigned int vaddr_max
;
103 struct list_head vaddr_lru
;
105 /* Only used if IOMMU if present */
106 struct mutex
*mm_mutex
;
108 struct iommu_domain
*domain
;
109 unsigned long iommu_pgshift
;
112 /* Only used by DMA API */
115 #define gk20a_instmem(p) container_of((p), struct gk20a_instmem, base)
117 static enum nvkm_memory_target
118 gk20a_instobj_target(struct nvkm_memory
*memory
)
120 return NVKM_MEM_TARGET_NCOH
;
124 gk20a_instobj_page(struct nvkm_memory
*memory
)
130 gk20a_instobj_addr(struct nvkm_memory
*memory
)
132 return (u64
)gk20a_instobj(memory
)->mn
->offset
<< 12;
136 gk20a_instobj_size(struct nvkm_memory
*memory
)
138 return (u64
)gk20a_instobj(memory
)->mn
->length
<< 12;
142 * Recycle the vaddr of obj. Must be called with gk20a_instmem::lock held.
145 gk20a_instobj_iommu_recycle_vaddr(struct gk20a_instobj_iommu
*obj
)
147 struct gk20a_instmem
*imem
= obj
->base
.imem
;
148 /* there should not be any user left... */
149 WARN_ON(obj
->use_cpt
);
150 list_del(&obj
->vaddr_node
);
151 vunmap(obj
->base
.vaddr
);
152 obj
->base
.vaddr
= NULL
;
153 imem
->vaddr_use
-= nvkm_memory_size(&obj
->base
.memory
);
154 nvkm_debug(&imem
->base
.subdev
, "vaddr used: %x/%x\n", imem
->vaddr_use
,
159 * Must be called while holding gk20a_instmem::lock
162 gk20a_instmem_vaddr_gc(struct gk20a_instmem
*imem
, const u64 size
)
164 while (imem
->vaddr_use
+ size
> imem
->vaddr_max
) {
165 /* no candidate that can be unmapped, abort... */
166 if (list_empty(&imem
->vaddr_lru
))
169 gk20a_instobj_iommu_recycle_vaddr(
170 list_first_entry(&imem
->vaddr_lru
,
171 struct gk20a_instobj_iommu
, vaddr_node
));
175 static void __iomem
*
176 gk20a_instobj_acquire_dma(struct nvkm_memory
*memory
)
178 struct gk20a_instobj
*node
= gk20a_instobj(memory
);
179 struct gk20a_instmem
*imem
= node
->imem
;
180 struct nvkm_ltc
*ltc
= imem
->base
.subdev
.device
->ltc
;
187 static void __iomem
*
188 gk20a_instobj_acquire_iommu(struct nvkm_memory
*memory
)
190 struct gk20a_instobj_iommu
*node
= gk20a_instobj_iommu(memory
);
191 struct gk20a_instmem
*imem
= node
->base
.imem
;
192 struct nvkm_ltc
*ltc
= imem
->base
.subdev
.device
->ltc
;
193 const u64 size
= nvkm_memory_size(memory
);
197 mutex_lock(&imem
->lock
);
199 if (node
->base
.vaddr
) {
200 if (!node
->use_cpt
) {
201 /* remove from LRU list since mapping in use again */
202 list_del(&node
->vaddr_node
);
207 /* try to free some address space if we reached the limit */
208 gk20a_instmem_vaddr_gc(imem
, size
);
211 node
->base
.vaddr
= vmap(node
->pages
, size
>> PAGE_SHIFT
, VM_MAP
,
212 pgprot_writecombine(PAGE_KERNEL
));
213 if (!node
->base
.vaddr
) {
214 nvkm_error(&imem
->base
.subdev
, "cannot map instobj - "
215 "this is not going to end well...\n");
219 imem
->vaddr_use
+= size
;
220 nvkm_debug(&imem
->base
.subdev
, "vaddr used: %x/%x\n",
221 imem
->vaddr_use
, imem
->vaddr_max
);
225 mutex_unlock(&imem
->lock
);
227 return node
->base
.vaddr
;
231 gk20a_instobj_release_dma(struct nvkm_memory
*memory
)
233 struct gk20a_instobj
*node
= gk20a_instobj(memory
);
234 struct gk20a_instmem
*imem
= node
->imem
;
235 struct nvkm_ltc
*ltc
= imem
->base
.subdev
.device
->ltc
;
237 /* in case we got a write-combined mapping */
239 nvkm_ltc_invalidate(ltc
);
243 gk20a_instobj_release_iommu(struct nvkm_memory
*memory
)
245 struct gk20a_instobj_iommu
*node
= gk20a_instobj_iommu(memory
);
246 struct gk20a_instmem
*imem
= node
->base
.imem
;
247 struct nvkm_ltc
*ltc
= imem
->base
.subdev
.device
->ltc
;
249 mutex_lock(&imem
->lock
);
251 /* we should at least have one user to release... */
252 if (WARN_ON(node
->use_cpt
== 0))
255 /* add unused objs to the LRU list to recycle their mapping */
256 if (--node
->use_cpt
== 0)
257 list_add_tail(&node
->vaddr_node
, &imem
->vaddr_lru
);
260 mutex_unlock(&imem
->lock
);
263 nvkm_ltc_invalidate(ltc
);
267 gk20a_instobj_rd32(struct nvkm_memory
*memory
, u64 offset
)
269 struct gk20a_instobj
*node
= gk20a_instobj(memory
);
271 return node
->vaddr
[offset
/ 4];
275 gk20a_instobj_wr32(struct nvkm_memory
*memory
, u64 offset
, u32 data
)
277 struct gk20a_instobj
*node
= gk20a_instobj(memory
);
279 node
->vaddr
[offset
/ 4] = data
;
283 gk20a_instobj_map(struct nvkm_memory
*memory
, u64 offset
, struct nvkm_vmm
*vmm
,
284 struct nvkm_vma
*vma
, void *argv
, u32 argc
)
286 struct gk20a_instobj
*node
= gk20a_instobj(memory
);
287 struct nvkm_vmm_map map
= {
288 .memory
= &node
->memory
,
294 struct nvkm_mem mem
= {
296 .memory
= &node
->memory
,
298 nvkm_vm_map_at(vma
, 0, &mem
);
302 return nvkm_vmm_map(vmm
, vma
, argv
, argc
, &map
);
306 gk20a_instobj_dtor_dma(struct nvkm_memory
*memory
)
308 struct gk20a_instobj_dma
*node
= gk20a_instobj_dma(memory
);
309 struct gk20a_instmem
*imem
= node
->base
.imem
;
310 struct device
*dev
= imem
->base
.subdev
.device
->dev
;
312 if (unlikely(!node
->base
.vaddr
))
315 dma_free_attrs(dev
, (u64
)node
->base
.mn
->length
<< PAGE_SHIFT
,
316 node
->base
.vaddr
, node
->handle
, imem
->attrs
);
323 gk20a_instobj_dtor_iommu(struct nvkm_memory
*memory
)
325 struct gk20a_instobj_iommu
*node
= gk20a_instobj_iommu(memory
);
326 struct gk20a_instmem
*imem
= node
->base
.imem
;
327 struct device
*dev
= imem
->base
.subdev
.device
->dev
;
328 struct nvkm_mm_node
*r
= node
->base
.mn
;
334 mutex_lock(&imem
->lock
);
336 /* vaddr has already been recycled */
337 if (node
->base
.vaddr
)
338 gk20a_instobj_iommu_recycle_vaddr(node
);
340 mutex_unlock(&imem
->lock
);
342 /* clear IOMMU bit to unmap pages */
343 r
->offset
&= ~BIT(imem
->iommu_bit
- imem
->iommu_pgshift
);
345 /* Unmap pages from GPU address space and free them */
346 for (i
= 0; i
< node
->base
.mn
->length
; i
++) {
347 iommu_unmap(imem
->domain
,
348 (r
->offset
+ i
) << imem
->iommu_pgshift
, PAGE_SIZE
);
349 dma_unmap_page(dev
, node
->dma_addrs
[i
], PAGE_SIZE
,
351 __free_page(node
->pages
[i
]);
354 /* Release area from GPU address space */
355 mutex_lock(imem
->mm_mutex
);
356 nvkm_mm_free(imem
->mm
, &r
);
357 mutex_unlock(imem
->mm_mutex
);
363 static const struct nvkm_memory_func
364 gk20a_instobj_func_dma
= {
365 .dtor
= gk20a_instobj_dtor_dma
,
366 .target
= gk20a_instobj_target
,
367 .page
= gk20a_instobj_page
,
368 .addr
= gk20a_instobj_addr
,
369 .size
= gk20a_instobj_size
,
370 .acquire
= gk20a_instobj_acquire_dma
,
371 .release
= gk20a_instobj_release_dma
,
372 .map
= gk20a_instobj_map
,
375 static const struct nvkm_memory_func
376 gk20a_instobj_func_iommu
= {
377 .dtor
= gk20a_instobj_dtor_iommu
,
378 .target
= gk20a_instobj_target
,
379 .page
= gk20a_instobj_page
,
380 .addr
= gk20a_instobj_addr
,
381 .size
= gk20a_instobj_size
,
382 .acquire
= gk20a_instobj_acquire_iommu
,
383 .release
= gk20a_instobj_release_iommu
,
384 .map
= gk20a_instobj_map
,
387 static const struct nvkm_memory_ptrs
388 gk20a_instobj_ptrs
= {
389 .rd32
= gk20a_instobj_rd32
,
390 .wr32
= gk20a_instobj_wr32
,
394 gk20a_instobj_ctor_dma(struct gk20a_instmem
*imem
, u32 npages
, u32 align
,
395 struct gk20a_instobj
**_node
)
397 struct gk20a_instobj_dma
*node
;
398 struct nvkm_subdev
*subdev
= &imem
->base
.subdev
;
399 struct device
*dev
= subdev
->device
->dev
;
401 if (!(node
= kzalloc(sizeof(*node
), GFP_KERNEL
)))
403 *_node
= &node
->base
;
405 nvkm_memory_ctor(&gk20a_instobj_func_dma
, &node
->base
.memory
);
406 node
->base
.memory
.ptrs
= &gk20a_instobj_ptrs
;
408 node
->base
.vaddr
= dma_alloc_attrs(dev
, npages
<< PAGE_SHIFT
,
409 &node
->handle
, GFP_KERNEL
,
411 if (!node
->base
.vaddr
) {
412 nvkm_error(subdev
, "cannot allocate DMA memory\n");
416 /* alignment check */
417 if (unlikely(node
->handle
& (align
- 1)))
419 "memory not aligned as requested: %pad (0x%x)\n",
420 &node
->handle
, align
);
422 /* present memory for being mapped using small pages */
424 node
->r
.offset
= node
->handle
>> 12;
425 node
->r
.length
= (npages
<< PAGE_SHIFT
) >> 12;
427 node
->base
.mn
= &node
->r
;
432 gk20a_instobj_ctor_iommu(struct gk20a_instmem
*imem
, u32 npages
, u32 align
,
433 struct gk20a_instobj
**_node
)
435 struct gk20a_instobj_iommu
*node
;
436 struct nvkm_subdev
*subdev
= &imem
->base
.subdev
;
437 struct device
*dev
= subdev
->device
->dev
;
438 struct nvkm_mm_node
*r
;
443 * despite their variable size, instmem allocations are small enough
444 * (< 1 page) to be handled by kzalloc
446 if (!(node
= kzalloc(sizeof(*node
) + ((sizeof(node
->pages
[0]) +
447 sizeof(*node
->dma_addrs
)) * npages
), GFP_KERNEL
)))
449 *_node
= &node
->base
;
450 node
->dma_addrs
= (void *)(node
->pages
+ npages
);
452 nvkm_memory_ctor(&gk20a_instobj_func_iommu
, &node
->base
.memory
);
453 node
->base
.memory
.ptrs
= &gk20a_instobj_ptrs
;
455 /* Allocate backing memory */
456 for (i
= 0; i
< npages
; i
++) {
457 struct page
*p
= alloc_page(GFP_KERNEL
);
465 dma_adr
= dma_map_page(dev
, p
, 0, PAGE_SIZE
, DMA_BIDIRECTIONAL
);
466 if (dma_mapping_error(dev
, dma_adr
)) {
467 nvkm_error(subdev
, "DMA mapping error!\n");
471 node
->dma_addrs
[i
] = dma_adr
;
474 mutex_lock(imem
->mm_mutex
);
475 /* Reserve area from GPU address space */
476 ret
= nvkm_mm_head(imem
->mm
, 0, 1, npages
, npages
,
477 align
>> imem
->iommu_pgshift
, &r
);
478 mutex_unlock(imem
->mm_mutex
);
480 nvkm_error(subdev
, "IOMMU space is full!\n");
484 /* Map into GPU address space */
485 for (i
= 0; i
< npages
; i
++) {
486 u32 offset
= (r
->offset
+ i
) << imem
->iommu_pgshift
;
488 ret
= iommu_map(imem
->domain
, offset
, node
->dma_addrs
[i
],
489 PAGE_SIZE
, IOMMU_READ
| IOMMU_WRITE
);
491 nvkm_error(subdev
, "IOMMU mapping failure: %d\n", ret
);
495 iommu_unmap(imem
->domain
, offset
, PAGE_SIZE
);
501 /* IOMMU bit tells that an address is to be resolved through the IOMMU */
502 r
->offset
|= BIT(imem
->iommu_bit
- imem
->iommu_pgshift
);
508 mutex_lock(imem
->mm_mutex
);
509 nvkm_mm_free(imem
->mm
, &r
);
510 mutex_unlock(imem
->mm_mutex
);
513 for (i
= 0; i
< npages
&& node
->pages
[i
] != NULL
; i
++) {
514 dma_addr_t dma_addr
= node
->dma_addrs
[i
];
516 dma_unmap_page(dev
, dma_addr
, PAGE_SIZE
,
518 __free_page(node
->pages
[i
]);
525 gk20a_instobj_new(struct nvkm_instmem
*base
, u32 size
, u32 align
, bool zero
,
526 struct nvkm_memory
**pmemory
)
528 struct gk20a_instmem
*imem
= gk20a_instmem(base
);
529 struct nvkm_subdev
*subdev
= &imem
->base
.subdev
;
530 struct gk20a_instobj
*node
= NULL
;
533 nvkm_debug(subdev
, "%s (%s): size: %x align: %x\n", __func__
,
534 imem
->domain
? "IOMMU" : "DMA", size
, align
);
536 /* Round size and align to page bounds */
537 size
= max(roundup(size
, PAGE_SIZE
), PAGE_SIZE
);
538 align
= max(roundup(align
, PAGE_SIZE
), PAGE_SIZE
);
541 ret
= gk20a_instobj_ctor_iommu(imem
, size
>> PAGE_SHIFT
,
544 ret
= gk20a_instobj_ctor_dma(imem
, size
>> PAGE_SHIFT
,
546 *pmemory
= node
? &node
->memory
: NULL
;
552 nvkm_debug(subdev
, "alloc size: 0x%x, align: 0x%x, gaddr: 0x%llx\n",
553 size
, align
, (u64
)node
->mn
->offset
<< 12);
559 gk20a_instmem_dtor(struct nvkm_instmem
*base
)
561 struct gk20a_instmem
*imem
= gk20a_instmem(base
);
563 /* perform some sanity checks... */
564 if (!list_empty(&imem
->vaddr_lru
))
565 nvkm_warn(&base
->subdev
, "instobj LRU not empty!\n");
567 if (imem
->vaddr_use
!= 0)
568 nvkm_warn(&base
->subdev
, "instobj vmap area not empty! "
569 "0x%x bytes still mapped\n", imem
->vaddr_use
);
574 static const struct nvkm_instmem_func
576 .dtor
= gk20a_instmem_dtor
,
577 .memory_new
= gk20a_instobj_new
,
582 gk20a_instmem_new(struct nvkm_device
*device
, int index
,
583 struct nvkm_instmem
**pimem
)
585 struct nvkm_device_tegra
*tdev
= device
->func
->tegra(device
);
586 struct gk20a_instmem
*imem
;
588 if (!(imem
= kzalloc(sizeof(*imem
), GFP_KERNEL
)))
590 nvkm_instmem_ctor(&gk20a_instmem
, device
, index
, &imem
->base
);
591 mutex_init(&imem
->lock
);
592 *pimem
= &imem
->base
;
594 /* do not allow more than 1MB of CPU-mapped instmem */
596 imem
->vaddr_max
= 0x100000;
597 INIT_LIST_HEAD(&imem
->vaddr_lru
);
599 if (tdev
->iommu
.domain
) {
600 imem
->mm_mutex
= &tdev
->iommu
.mutex
;
601 imem
->mm
= &tdev
->iommu
.mm
;
602 imem
->domain
= tdev
->iommu
.domain
;
603 imem
->iommu_pgshift
= tdev
->iommu
.pgshift
;
604 imem
->iommu_bit
= tdev
->func
->iommu_bit
;
606 nvkm_info(&imem
->base
.subdev
, "using IOMMU\n");
608 imem
->attrs
= DMA_ATTR_NON_CONSISTENT
|
609 DMA_ATTR_WEAK_ORDERING
|
610 DMA_ATTR_WRITE_COMBINE
;
612 nvkm_info(&imem
->base
.subdev
, "using DMA API\n");