drivers/gpu/drm/nouveau/nvkm/subdev/ltc/gf100.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 #include <subdev/fb.h>
  27 #include <subdev/timer.h>
  28
  29 void
  30 gf100_ltc_cbc_clear(struct nvkm_ltc *ltc, u32 start, u32 limit)
  31 {
  32         struct nvkm_device *device = ltc->subdev.device;
  33         nvkm_wr32(device, 0x17e8cc, start);
  34         nvkm_wr32(device, 0x17e8d0, limit);
  35         nvkm_wr32(device, 0x17e8c8, 0x00000004);
  36 }
  37
  38 void
  39 gf100_ltc_cbc_wait(struct nvkm_ltc *ltc)
  40 {
  41         struct nvkm_device *device = ltc->subdev.device;
  42         int c, s;
  43         for (c = 0; c < ltc->ltc_nr; c++) {
  44                 for (s = 0; s < ltc->lts_nr; s++) {
  45                         const u32 addr = 0x1410c8 + (c * 0x2000) + (s * 0x400);
  46                         nvkm_msec(device, 2000,
  47                                 if (!nvkm_rd32(device, addr))
  48                                         break;
  49                         );
  50                 }
  51         }
  52 }
  53
  54 void
  55 gf100_ltc_zbc_clear_color(struct nvkm_ltc *ltc, int i, const u32 color[4])
  56 {
  57         struct nvkm_device *device = ltc->subdev.device;
  58         nvkm_mask(device, 0x17ea44, 0x0000000f, i);
  59         nvkm_wr32(device, 0x17ea48, color[0]);
  60         nvkm_wr32(device, 0x17ea4c, color[1]);
  61         nvkm_wr32(device, 0x17ea50, color[2]);
  62         nvkm_wr32(device, 0x17ea54, color[3]);
  63 }
  64
  65 void
  66 gf100_ltc_zbc_clear_depth(struct nvkm_ltc *ltc, int i, const u32 depth)
  67 {
  68         struct nvkm_device *device = ltc->subdev.device;
  69         nvkm_mask(device, 0x17ea44, 0x0000000f, i);
  70         nvkm_wr32(device, 0x17ea58, depth);
  71 }
  72
  73 const struct nvkm_bitfield
  74 gf100_ltc_lts_intr_name[] = {
  75         { 0x00000001, "IDLE_ERROR_IQ" },
  76         { 0x00000002, "IDLE_ERROR_CBC" },
  77         { 0x00000004, "IDLE_ERROR_TSTG" },
  78         { 0x00000008, "IDLE_ERROR_DSTG" },
  79         { 0x00000010, "EVICTED_CB" },
  80         { 0x00000020, "ILLEGAL_COMPSTAT" },
  81         { 0x00000040, "BLOCKLINEAR_CB" },
  82         { 0x00000100, "ECC_SEC_ERROR" },
  83         { 0x00000200, "ECC_DED_ERROR" },
  84         { 0x00000400, "DEBUG" },
  85         { 0x00000800, "ATOMIC_TO_Z" },
  86         { 0x00001000, "ILLEGAL_ATOMIC" },
  87         { 0x00002000, "BLKACTIVITY_ERR" },
  88         {}
  89 };
  90
  91 static void
  92 gf100_ltc_lts_intr(struct nvkm_ltc *ltc, int c, int s)
  93 {
  94         struct nvkm_subdev *subdev = &ltc->subdev;
  95         struct nvkm_device *device = subdev->device;
  96         u32 base = 0x141000 + (c * 0x2000) + (s * 0x400);
  97         u32 intr = nvkm_rd32(device, base + 0x020);
  98         u32 stat = intr & 0x0000ffff;
  99         char msg[128];
 100
 101         if (stat) {
 102                 nvkm_snprintbf(msg, sizeof(msg), gf100_ltc_lts_intr_name, stat);
 103                 nvkm_error(subdev, "LTC%d_LTS%d: %08x [%s]\n", c, s, stat, msg);
 104         }
 105
 106         nvkm_wr32(device, base + 0x020, intr);
 107 }
 108
 109 void
 110 gf100_ltc_intr(struct nvkm_ltc *ltc)
 111 {
 112         struct nvkm_device *device = ltc->subdev.device;
 113         u32 mask;
 114
 115         mask = nvkm_rd32(device, 0x00017c);
 116         while (mask) {
 117                 u32 s, c = __ffs(mask);
 118                 for (s = 0; s < ltc->lts_nr; s++)
 119                         gf100_ltc_lts_intr(ltc, c, s);
 120                 mask &= ~(1 << c);
 121         }
 122 }
 123
 124 void
 125 gf100_ltc_invalidate(struct nvkm_ltc *ltc)
 126 {
 127         struct nvkm_device *device = ltc->subdev.device;
 128         s64 taken;
 129
 130         nvkm_wr32(device, 0x70004, 0x00000001);
 131         taken = nvkm_wait_msec(device, 2000, 0x70004, 0x00000003, 0x00000000);
 132
 133         if (taken > 0)
 134                 nvkm_debug(&ltc->subdev, "LTC invalidate took %lld ns\n", taken);
 135 }
 136
 137 void
 138 gf100_ltc_flush(struct nvkm_ltc *ltc)
 139 {
 140         struct nvkm_device *device = ltc->subdev.device;
 141         s64 taken;
 142
 143         nvkm_wr32(device, 0x70010, 0x00000001);
 144         taken = nvkm_wait_msec(device, 2000, 0x70010, 0x00000003, 0x00000000);
 145
 146         if (taken > 0)
 147                 nvkm_debug(&ltc->subdev, "LTC flush took %lld ns\n", taken);
 148 }
 149
 150 /* TODO: Figure out tag memory details and drop the over-cautious allocation.
 151  */
 152 int
 153 gf100_ltc_oneinit_tag_ram(struct nvkm_ltc *ltc)
 154 {
 155         struct nvkm_fb *fb = ltc->subdev.device->fb;
 156         struct nvkm_ram *ram = fb->ram;
 157         u32 tag_size, tag_margin, tag_align;
 158         int ret;
 159
 160         /* No VRAM, no tags for now. */
 161         if (!ram) {
 162                 ltc->num_tags = 0;
 163                 goto mm_init;
 164         }
 165
 166         /* tags for 1/4 of VRAM should be enough (8192/4 per GiB of VRAM) */
 167         ltc->num_tags = (ram->size >> 17) / 4;
 168         if (ltc->num_tags > (1 << 17))
 169                 ltc->num_tags = 1 << 17; /* we have 17 bits in PTE */
 170         ltc->num_tags = (ltc->num_tags + 63) & ~63; /* round up to 64 */
 171
 172         tag_align = ltc->ltc_nr * 0x800;
 173         tag_margin = (tag_align < 0x6000) ? 0x6000 : tag_align;
 174
 175         /* 4 part 4 sub: 0x2000 bytes for 56 tags */
 176         /* 3 part 4 sub: 0x6000 bytes for 168 tags */
 177         /*
 178          * About 147 bytes per tag. Let's be safe and allocate x2, which makes
 179          * 0x4980 bytes for 64 tags, and round up to 0x6000 bytes for 64 tags.
 180          *
 181          * For 4 GiB of memory we'll have 8192 tags which makes 3 MiB, < 0.1 %.
 182          */
 183         tag_size  = (ltc->num_tags / 64) * 0x6000 + tag_margin;
 184         tag_size += tag_align;
 185         tag_size  = (tag_size + 0xfff) >> 12; /* round up */
 186
 187         ret = nvkm_mm_tail(&ram->vram, NVKM_RAM_MM_NORMAL, 1, tag_size,
 188                            tag_size, 1, &ltc->tag_ram);
 189         if (ret) {
 190                 ltc->num_tags = 0;
 191         } else {
 192                 u64 tag_base = ((u64)ltc->tag_ram->offset << 12) + tag_margin;
 193
 194                 tag_base += tag_align - 1;
 195                 do_div(tag_base, tag_align);
 196
 197                 ltc->tag_base = tag_base;
 198         }
 199
 200 mm_init:
 201         nvkm_mm_fini(&fb->tags);
 202         return nvkm_mm_init(&fb->tags, 0, 0, ltc->num_tags, 1);
 203 }
 204
 205 int
 206 gf100_ltc_oneinit(struct nvkm_ltc *ltc)
 207 {
 208         struct nvkm_device *device = ltc->subdev.device;
 209         const u32 parts = nvkm_rd32(device, 0x022438);
 210         const u32  mask = nvkm_rd32(device, 0x022554);
 211         const u32 slice = nvkm_rd32(device, 0x17e8dc) >> 28;
 212         int i;
 213
 214         for (i = 0; i < parts; i++) {
 215                 if (!(mask & (1 << i)))
 216                         ltc->ltc_nr++;
 217         }
 218         ltc->lts_nr = slice;
 219
 220         return gf100_ltc_oneinit_tag_ram(ltc);
 221 }
 222
 223 static void
 224 gf100_ltc_init(struct nvkm_ltc *ltc)
 225 {
 226         struct nvkm_device *device = ltc->subdev.device;
 227         u32 lpg128 = !(nvkm_rd32(device, 0x100c80) & 0x00000001);
 228
 229         nvkm_mask(device, 0x17e820, 0x00100000, 0x00000000); /* INTR_EN &= ~0x10 */
 230         nvkm_wr32(device, 0x17e8d8, ltc->ltc_nr);
 231         nvkm_wr32(device, 0x17e8d4, ltc->tag_base);
 232         nvkm_mask(device, 0x17e8c0, 0x00000002, lpg128 ? 0x00000002 : 0x00000000);
 233 }
 234
 235 static const struct nvkm_ltc_func
 236 gf100_ltc = {
 237         .oneinit = gf100_ltc_oneinit,
 238         .init = gf100_ltc_init,
 239         .intr = gf100_ltc_intr,
 240         .cbc_clear = gf100_ltc_cbc_clear,
 241         .cbc_wait = gf100_ltc_cbc_wait,
 242         .zbc = 16,
 243         .zbc_clear_color = gf100_ltc_zbc_clear_color,
 244         .zbc_clear_depth = gf100_ltc_zbc_clear_depth,
 245         .invalidate = gf100_ltc_invalidate,
 246         .flush = gf100_ltc_flush,
 247 };
 248
 249 int
 250 gf100_ltc_new(struct nvkm_device *device, int index, struct nvkm_ltc **pltc)
 251 {
 252         return nvkm_ltc_new_(&gf100_ltc, device, index, pltc);
 253 }