drivers/gpu/drm/nouveau/nvkm/subdev/mmu/gf100.c

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "vmm.h"
  25
  26 #include <nvif/class.h>
  27
  28 /* Map from compressed to corresponding uncompressed storage type.
  29  * The value 0xff represents an invalid storage type.
  30  */
  31 const u8 gf100_pte_storage_type_map[256] =
  32 {
  33         0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0xff, 0x01, /* 0x00 */
  34         0x01, 0x01, 0x01, 0xff, 0xff, 0xff, 0xff, 0xff,
  35         0xff, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff, 0x11, /* 0x10 */
  36         0x11, 0x11, 0x11, 0xff, 0xff, 0xff, 0xff, 0xff,
  37         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x26, 0x27, /* 0x20 */
  38         0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  39         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x30 */
  40         0xff, 0xff, 0x26, 0x27, 0x28, 0x29, 0x26, 0x27,
  41         0x28, 0x29, 0xff, 0xff, 0xff, 0xff, 0x46, 0xff, /* 0x40 */
  42         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  43         0xff, 0x46, 0x46, 0x46, 0x46, 0xff, 0xff, 0xff, /* 0x50 */
  44         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  45         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x60 */
  46         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  47         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x70 */
  48         0xff, 0xff, 0xff, 0x7b, 0xff, 0xff, 0xff, 0xff,
  49         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x7b, 0x7b, /* 0x80 */
  50         0x7b, 0x7b, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xff,
  51         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0x90 */
  52         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  53         0xff, 0xff, 0xff, 0x8b, 0x8c, 0x8d, 0x8e, 0xa7, /* 0xa0 */
  54         0xa8, 0xa9, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xb0 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xa7,
  57         0xa8, 0xa9, 0xaa, 0xc3, 0xff, 0xff, 0xff, 0xff, /* 0xc0 */
  58         0xff, 0xff, 0xff, 0xff, 0xfe, 0xfe, 0xc3, 0xc3,
  59         0xc3, 0xc3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 0xd0 */
  60         0xfe, 0xff, 0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe,
  61         0xfe, 0xff, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xff, /* 0xe0 */
  62         0xff, 0xfe, 0xff, 0xfe, 0xff, 0xfe, 0xfe, 0xff,
  63         0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, /* 0xf0 */
  64         0xfe, 0xfe, 0xfe, 0xfe, 0xff, 0xfd, 0xfe, 0xff
  65 };
  66
  67 const u8 *
  68 gf100_mmu_kind(struct nvkm_mmu *mmu, int *count)
  69 {
  70         *count = ARRAY_SIZE(gf100_pte_storage_type_map);
  71         return gf100_pte_storage_type_map;
  72 }
  73
  74 static const struct nvkm_mmu_func
  75 gf100_mmu = {
  76         .limit = (1ULL << 40),
  77         .dma_bits = 40,
  78         .lpg_shift = 17,
  79         .vmm = {{ -1, -1, NVIF_CLASS_VMM_GF100}, gf100_vmm_new },
  80         .kind = gf100_mmu_kind,
  81 };
  82
  83 int
  84 gf100_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
  85 {
  86         return nvkm_mmu_new_(&gf100_mmu, device, index, pmmu);
  87 }