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1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 * Martin Peres
24 */
25 #include "priv.h"
26
27 #include <subdev/fuse.h>
28
29 int
30 g84_temp_get(struct nvkm_therm *therm)
31 {
32 struct nvkm_device *device = therm->subdev.device;
33 struct nvkm_fuse *fuse = nvkm_fuse(therm);
34
35 if (fuse->func->read(fuse, 0x1a8) == 1)
36 return nvkm_rd32(device, 0x20400);
37 else
38 return -ENODEV;
39 }
40
41 void
42 g84_sensor_setup(struct nvkm_therm *therm)
43 {
44 struct nvkm_device *device = therm->subdev.device;
45 struct nvkm_fuse *fuse = nvkm_fuse(therm);
46
47 /* enable temperature reading for cards with insane defaults */
48 if (fuse->func->read(fuse, 0x1a8) == 1) {
49 nvkm_mask(device, 0x20008, 0x80008000, 0x80000000);
50 nvkm_mask(device, 0x2000c, 0x80000003, 0x00000000);
51 mdelay(20); /* wait for the temperature to stabilize */
52 }
53 }
54
55 static void
56 g84_therm_program_alarms(struct nvkm_therm *obj)
57 {
58 struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
59 struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
60 struct nvkm_subdev *subdev = &therm->base.subdev;
61 struct nvkm_device *device = subdev->device;
62 unsigned long flags;
63
64 spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
65
66 /* enable RISING and FALLING IRQs for shutdown, THRS 0, 1, 2 and 4 */
67 nvkm_wr32(device, 0x20000, 0x000003ff);
68
69 /* shutdown: The computer should be shutdown when reached */
70 nvkm_wr32(device, 0x20484, sensor->thrs_shutdown.hysteresis);
71 nvkm_wr32(device, 0x20480, sensor->thrs_shutdown.temp);
72
73 /* THRS_1 : fan boost*/
74 nvkm_wr32(device, 0x204c4, sensor->thrs_fan_boost.temp);
75
76 /* THRS_2 : critical */
77 nvkm_wr32(device, 0x204c0, sensor->thrs_critical.temp);
78
79 /* THRS_4 : down clock */
80 nvkm_wr32(device, 0x20414, sensor->thrs_down_clock.temp);
81 spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
82
83 nvkm_debug(subdev,
84 "Programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
85 sensor->thrs_fan_boost.temp,
86 sensor->thrs_fan_boost.hysteresis,
87 sensor->thrs_down_clock.temp,
88 sensor->thrs_down_clock.hysteresis,
89 sensor->thrs_critical.temp,
90 sensor->thrs_critical.hysteresis,
91 sensor->thrs_shutdown.temp,
92 sensor->thrs_shutdown.hysteresis);
93
94 }
95
96 /* must be called with alarm_program_lock taken ! */
97 static void
98 g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm,
99 uint32_t thrs_reg, u8 status_bit,
100 const struct nvbios_therm_threshold *thrs,
101 enum nvkm_therm_thrs thrs_name)
102 {
103 struct nvkm_device *device = therm->subdev.device;
104 enum nvkm_therm_thrs_direction direction;
105 enum nvkm_therm_thrs_state prev_state, new_state;
106 int temp, cur;
107
108 prev_state = nvkm_therm_sensor_get_threshold_state(therm, thrs_name);
109 temp = nvkm_rd32(device, thrs_reg);
110
111 /* program the next threshold */
112 if (temp == thrs->temp) {
113 nvkm_wr32(device, thrs_reg, thrs->temp - thrs->hysteresis);
114 new_state = NVKM_THERM_THRS_HIGHER;
115 } else {
116 nvkm_wr32(device, thrs_reg, thrs->temp);
117 new_state = NVKM_THERM_THRS_LOWER;
118 }
119
120 /* fix the state (in case someone reprogrammed the alarms) */
121 cur = therm->temp_get(therm);
122 if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp)
123 new_state = NVKM_THERM_THRS_HIGHER;
124 else if (new_state == NVKM_THERM_THRS_HIGHER &&
125 cur < thrs->temp - thrs->hysteresis)
126 new_state = NVKM_THERM_THRS_LOWER;
127 nvkm_therm_sensor_set_threshold_state(therm, thrs_name, new_state);
128
129 /* find the direction */
130 if (prev_state < new_state)
131 direction = NVKM_THERM_THRS_RISING;
132 else if (prev_state > new_state)
133 direction = NVKM_THERM_THRS_FALLING;
134 else
135 return;
136
137 /* advertise a change in direction */
138 nvkm_therm_sensor_event(therm, thrs_name, direction);
139 }
140
141 static void
142 g84_therm_intr(struct nvkm_subdev *subdev)
143 {
144 struct nvkm_therm_priv *therm = (void *)subdev;
145 struct nvkm_device *device = therm->base.subdev.device;
146 struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
147 unsigned long flags;
148 uint32_t intr;
149
150 spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
151
152 intr = nvkm_rd32(device, 0x20100) & 0x3ff;
153
154 /* THRS_4: downclock */
155 if (intr & 0x002) {
156 g84_therm_threshold_hyst_emulation(&therm->base, 0x20414, 24,
157 &sensor->thrs_down_clock,
158 NVKM_THERM_THRS_DOWNCLOCK);
159 intr &= ~0x002;
160 }
161
162 /* shutdown */
163 if (intr & 0x004) {
164 g84_therm_threshold_hyst_emulation(&therm->base, 0x20480, 20,
165 &sensor->thrs_shutdown,
166 NVKM_THERM_THRS_SHUTDOWN);
167 intr &= ~0x004;
168 }
169
170 /* THRS_1 : fan boost */
171 if (intr & 0x008) {
172 g84_therm_threshold_hyst_emulation(&therm->base, 0x204c4, 21,
173 &sensor->thrs_fan_boost,
174 NVKM_THERM_THRS_FANBOOST);
175 intr &= ~0x008;
176 }
177
178 /* THRS_2 : critical */
179 if (intr & 0x010) {
180 g84_therm_threshold_hyst_emulation(&therm->base, 0x204c0, 22,
181 &sensor->thrs_critical,
182 NVKM_THERM_THRS_CRITICAL);
183 intr &= ~0x010;
184 }
185
186 if (intr)
187 nvkm_error(subdev, "intr %08x\n", intr);
188
189 /* ACK everything */
190 nvkm_wr32(device, 0x20100, 0xffffffff);
191 nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */
192
193 spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
194 }
195
196 static int
197 g84_therm_init(struct nvkm_object *object)
198 {
199 struct nvkm_therm_priv *therm = (void *)object;
200 int ret;
201
202 ret = nvkm_therm_init(&therm->base);
203 if (ret)
204 return ret;
205
206 g84_sensor_setup(&therm->base);
207 return 0;
208 }
209
210 static int
211 g84_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
212 struct nvkm_oclass *oclass, void *data, u32 size,
213 struct nvkm_object **pobject)
214 {
215 struct nvkm_therm_priv *therm;
216 int ret;
217
218 ret = nvkm_therm_create(parent, engine, oclass, &therm);
219 *pobject = nv_object(therm);
220 if (ret)
221 return ret;
222
223 therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
224 therm->base.pwm_get = nv50_fan_pwm_get;
225 therm->base.pwm_set = nv50_fan_pwm_set;
226 therm->base.pwm_clock = nv50_fan_pwm_clock;
227 therm->base.temp_get = g84_temp_get;
228 therm->sensor.program_alarms = g84_therm_program_alarms;
229 nv_subdev(therm)->intr = g84_therm_intr;
230
231 /* init the thresholds */
232 nvkm_therm_sensor_set_threshold_state(&therm->base,
233 NVKM_THERM_THRS_SHUTDOWN,
234 NVKM_THERM_THRS_LOWER);
235 nvkm_therm_sensor_set_threshold_state(&therm->base,
236 NVKM_THERM_THRS_FANBOOST,
237 NVKM_THERM_THRS_LOWER);
238 nvkm_therm_sensor_set_threshold_state(&therm->base,
239 NVKM_THERM_THRS_CRITICAL,
240 NVKM_THERM_THRS_LOWER);
241 nvkm_therm_sensor_set_threshold_state(&therm->base,
242 NVKM_THERM_THRS_DOWNCLOCK,
243 NVKM_THERM_THRS_LOWER);
244
245 return nvkm_therm_preinit(&therm->base);
246 }
247
248 int
249 g84_therm_fini(struct nvkm_object *object, bool suspend)
250 {
251 struct nvkm_therm *therm = (void *)object;
252 struct nvkm_device *device = therm->subdev.device;
253
254 /* Disable PTherm IRQs */
255 nvkm_wr32(device, 0x20000, 0x00000000);
256
257 /* ACK all PTherm IRQs */
258 nvkm_wr32(device, 0x20100, 0xffffffff);
259 nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */
260
261 return _nvkm_therm_fini(object, suspend);
262 }
263
264 struct nvkm_oclass
265 g84_therm_oclass = {
266 .handle = NV_SUBDEV(THERM, 0x84),
267 .ofuncs = &(struct nvkm_ofuncs) {
268 .ctor = g84_therm_ctor,
269 .dtor = _nvkm_therm_dtor,
270 .init = g84_therm_init,
271 .fini = g84_therm_fini,
272 },
273 };