drivers/gpu/drm/omapdrm/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <linux/component.h>
  41 #include <linux/of.h>
  42 #include <video/omapdss.h>
  43 #include <sound/omap-hdmi-audio.h>
  44
  45 #include "hdmi5_core.h"
  46 #include "dss.h"
  47 #include "dss_features.h"
  48
  49 static struct omap_hdmi hdmi;
  50
  51 static int hdmi_runtime_get(void)
  52 {
  53         int r;
  54
  55         DSSDBG("hdmi_runtime_get\n");
  56
  57         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  58         WARN_ON(r < 0);
  59         if (r < 0)
  60                 return r;
  61
  62         return 0;
  63 }
  64
  65 static void hdmi_runtime_put(void)
  66 {
  67         int r;
  68
  69         DSSDBG("hdmi_runtime_put\n");
  70
  71         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  72         WARN_ON(r < 0 && r != -ENOSYS);
  73 }
  74
  75 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  76 {
  77         struct hdmi_wp_data *wp = data;
  78         u32 irqstatus;
  79
  80         irqstatus = hdmi_wp_get_irqstatus(wp);
  81         hdmi_wp_set_irqstatus(wp, irqstatus);
  82
  83         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  84                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  85                 u32 v;
  86                 /*
  87                  * If we get both connect and disconnect interrupts at the same
  88                  * time, turn off the PHY, clear interrupts, and restart, which
  89                  * raises connect interrupt if a cable is connected, or nothing
  90                  * if cable is not connected.
  91                  */
  92
  93                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  94
  95                 /*
  96                  * We always get bogus CONNECT & DISCONNECT interrupts when
  97                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  98                  * line to 0 until the PHY power state has been changed.
  99                  */
 100                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
 101                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 102                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 103                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 104
 105                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 106                                 HDMI_IRQ_LINK_DISCONNECT);
 107
 108                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 109
 110                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 111
 112         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 114         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 115                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 116         }
 117
 118         return IRQ_HANDLED;
 119 }
 120
 121 static int hdmi_init_regulator(void)
 122 {
 123         int r;
 124         struct regulator *reg;
 125
 126         if (hdmi.vdda_reg != NULL)
 127                 return 0;
 128
 129         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 130         if (IS_ERR(reg)) {
 131                 DSSERR("can't get VDDA regulator\n");
 132                 return PTR_ERR(reg);
 133         }
 134
 135         if (regulator_can_change_voltage(reg)) {
 136                 r = regulator_set_voltage(reg, 1800000, 1800000);
 137                 if (r) {
 138                         devm_regulator_put(reg);
 139                         DSSWARN("can't set the regulator voltage\n");
 140                         return r;
 141                 }
 142         }
 143
 144         hdmi.vdda_reg = reg;
 145
 146         return 0;
 147 }
 148
 149 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 150 {
 151         int r;
 152
 153         r = regulator_enable(hdmi.vdda_reg);
 154         if (r)
 155                 return r;
 156
 157         r = hdmi_runtime_get();
 158         if (r)
 159                 goto err_runtime_get;
 160
 161         /* Make selection of HDMI in DSS */
 162         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 163
 164         hdmi.core_enabled = true;
 165
 166         return 0;
 167
 168 err_runtime_get:
 169         regulator_disable(hdmi.vdda_reg);
 170
 171         return r;
 172 }
 173
 174 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 175 {
 176         hdmi.core_enabled = false;
 177
 178         hdmi_runtime_put();
 179         regulator_disable(hdmi.vdda_reg);
 180 }
 181
 182 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 183 {
 184         int r;
 185         struct omap_video_timings *p;
 186         enum omap_channel channel = dssdev->dispc_channel;
 187         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 188         unsigned pc;
 189
 190         r = hdmi_power_on_core(dssdev);
 191         if (r)
 192                 return r;
 193
 194         p = &hdmi.cfg.timings;
 195
 196         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 197
 198         pc = p->pixelclock;
 199         if (p->double_pixel)
 200                 pc *= 2;
 201
 202         hdmi_pll_compute(&hdmi.pll, pc, &hdmi_cinfo);
 203
 204         /* disable and clear irqs */
 205         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 206         hdmi_wp_set_irqstatus(&hdmi.wp,
 207                         hdmi_wp_get_irqstatus(&hdmi.wp));
 208
 209         r = dss_pll_enable(&hdmi.pll.pll);
 210         if (r) {
 211                 DSSERR("Failed to enable PLL\n");
 212                 goto err_pll_enable;
 213         }
 214
 215         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 216         if (r) {
 217                 DSSERR("Failed to configure PLL\n");
 218                 goto err_pll_cfg;
 219         }
 220
 221         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 222                 hdmi_cinfo.clkout[0]);
 223         if (r) {
 224                 DSSDBG("Failed to start PHY\n");
 225                 goto err_phy_cfg;
 226         }
 227
 228         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 229         if (r)
 230                 goto err_phy_pwr;
 231
 232         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 233
 234         /* bypass TV gamma table */
 235         dispc_enable_gamma_table(0);
 236
 237         /* tv size */
 238         dss_mgr_set_timings(channel, p);
 239
 240         r = dss_mgr_enable(channel);
 241         if (r)
 242                 goto err_mgr_enable;
 243
 244         r = hdmi_wp_video_start(&hdmi.wp);
 245         if (r)
 246                 goto err_vid_enable;
 247
 248         hdmi_wp_set_irqenable(&hdmi.wp,
 249                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 250
 251         return 0;
 252
 253 err_vid_enable:
 254         dss_mgr_disable(channel);
 255 err_mgr_enable:
 256         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 257 err_phy_pwr:
 258 err_phy_cfg:
 259 err_pll_cfg:
 260         dss_pll_disable(&hdmi.pll.pll);
 261 err_pll_enable:
 262         hdmi_power_off_core(dssdev);
 263         return -EIO;
 264 }
 265
 266 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 267 {
 268         enum omap_channel channel = dssdev->dispc_channel;
 269
 270         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 271
 272         hdmi_wp_video_stop(&hdmi.wp);
 273
 274         dss_mgr_disable(channel);
 275
 276         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 277
 278         dss_pll_disable(&hdmi.pll.pll);
 279
 280         hdmi_power_off_core(dssdev);
 281 }
 282
 283 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 284                                         struct omap_video_timings *timings)
 285 {
 286         if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
 287                 return -EINVAL;
 288
 289         return 0;
 290 }
 291
 292 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 293                 struct omap_video_timings *timings)
 294 {
 295         mutex_lock(&hdmi.lock);
 296
 297         hdmi.cfg.timings = *timings;
 298
 299         dispc_set_tv_pclk(timings->pixelclock);
 300
 301         mutex_unlock(&hdmi.lock);
 302 }
 303
 304 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 305                 struct omap_video_timings *timings)
 306 {
 307         *timings = hdmi.cfg.timings;
 308 }
 309
 310 static void hdmi_dump_regs(struct seq_file *s)
 311 {
 312         mutex_lock(&hdmi.lock);
 313
 314         if (hdmi_runtime_get()) {
 315                 mutex_unlock(&hdmi.lock);
 316                 return;
 317         }
 318
 319         hdmi_wp_dump(&hdmi.wp, s);
 320         hdmi_pll_dump(&hdmi.pll, s);
 321         hdmi_phy_dump(&hdmi.phy, s);
 322         hdmi5_core_dump(&hdmi.core, s);
 323
 324         hdmi_runtime_put();
 325         mutex_unlock(&hdmi.lock);
 326 }
 327
 328 static int read_edid(u8 *buf, int len)
 329 {
 330         int r;
 331         int idlemode;
 332
 333         mutex_lock(&hdmi.lock);
 334
 335         r = hdmi_runtime_get();
 336         BUG_ON(r);
 337
 338         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 339         /* No-idle mode */
 340         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 341
 342         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 343
 344         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 345
 346         hdmi_runtime_put();
 347         mutex_unlock(&hdmi.lock);
 348
 349         return r;
 350 }
 351
 352 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 353 {
 354         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 355         hdmi_wp_audio_enable(&hd->wp, true);
 356         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 357 }
 358
 359 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
 360 {
 361         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 362         hdmi_wp_audio_enable(&hd->wp, false);
 363         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 364 }
 365
 366 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 367 {
 368         struct omap_dss_device *out = &hdmi.output;
 369         unsigned long flags;
 370         int r = 0;
 371
 372         DSSDBG("ENTER hdmi_display_enable\n");
 373
 374         mutex_lock(&hdmi.lock);
 375
 376         if (!out->dispc_channel_connected) {
 377                 DSSERR("failed to enable display: no output/manager\n");
 378                 r = -ENODEV;
 379                 goto err0;
 380         }
 381
 382         r = hdmi_power_on_full(dssdev);
 383         if (r) {
 384                 DSSERR("failed to power on device\n");
 385                 goto err0;
 386         }
 387
 388         if (hdmi.audio_configured) {
 389                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
 390                                        hdmi.cfg.timings.pixelclock);
 391                 if (r) {
 392                         DSSERR("Error restoring audio configuration: %d", r);
 393                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
 394                         hdmi.audio_configured = false;
 395                 }
 396         }
 397
 398         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 399         if (hdmi.audio_configured && hdmi.audio_playing)
 400                 hdmi_start_audio_stream(&hdmi);
 401         hdmi.display_enabled = true;
 402         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 403
 404         mutex_unlock(&hdmi.lock);
 405         return 0;
 406
 407 err0:
 408         mutex_unlock(&hdmi.lock);
 409         return r;
 410 }
 411
 412 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 413 {
 414         unsigned long flags;
 415
 416         DSSDBG("Enter hdmi_display_disable\n");
 417
 418         mutex_lock(&hdmi.lock);
 419
 420         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 421         hdmi_stop_audio_stream(&hdmi);
 422         hdmi.display_enabled = false;
 423         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 424
 425         hdmi_power_off_full(dssdev);
 426
 427         mutex_unlock(&hdmi.lock);
 428 }
 429
 430 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 431 {
 432         int r = 0;
 433
 434         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 435
 436         mutex_lock(&hdmi.lock);
 437
 438         r = hdmi_power_on_core(dssdev);
 439         if (r) {
 440                 DSSERR("failed to power on device\n");
 441                 goto err0;
 442         }
 443
 444         mutex_unlock(&hdmi.lock);
 445         return 0;
 446
 447 err0:
 448         mutex_unlock(&hdmi.lock);
 449         return r;
 450 }
 451
 452 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 453 {
 454         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 455
 456         mutex_lock(&hdmi.lock);
 457
 458         hdmi_power_off_core(dssdev);
 459
 460         mutex_unlock(&hdmi.lock);
 461 }
 462
 463 static int hdmi_connect(struct omap_dss_device *dssdev,
 464                 struct omap_dss_device *dst)
 465 {
 466         enum omap_channel channel = dssdev->dispc_channel;
 467         int r;
 468
 469         r = hdmi_init_regulator();
 470         if (r)
 471                 return r;
 472
 473         r = dss_mgr_connect(channel, dssdev);
 474         if (r)
 475                 return r;
 476
 477         r = omapdss_output_set_device(dssdev, dst);
 478         if (r) {
 479                 DSSERR("failed to connect output to new device: %s\n",
 480                                 dst->name);
 481                 dss_mgr_disconnect(channel, dssdev);
 482                 return r;
 483         }
 484
 485         return 0;
 486 }
 487
 488 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 489                 struct omap_dss_device *dst)
 490 {
 491         enum omap_channel channel = dssdev->dispc_channel;
 492
 493         WARN_ON(dst != dssdev->dst);
 494
 495         if (dst != dssdev->dst)
 496                 return;
 497
 498         omapdss_output_unset_device(dssdev);
 499
 500         dss_mgr_disconnect(channel, dssdev);
 501 }
 502
 503 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 504                 u8 *edid, int len)
 505 {
 506         bool need_enable;
 507         int r;
 508
 509         need_enable = hdmi.core_enabled == false;
 510
 511         if (need_enable) {
 512                 r = hdmi_core_enable(dssdev);
 513                 if (r)
 514                         return r;
 515         }
 516
 517         r = read_edid(edid, len);
 518
 519         if (need_enable)
 520                 hdmi_core_disable(dssdev);
 521
 522         return r;
 523 }
 524
 525 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 526                 const struct hdmi_avi_infoframe *avi)
 527 {
 528         hdmi.cfg.infoframe = *avi;
 529         return 0;
 530 }
 531
 532 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 533                 bool hdmi_mode)
 534 {
 535         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 536         return 0;
 537 }
 538
 539 static const struct omapdss_hdmi_ops hdmi_ops = {
 540         .connect                = hdmi_connect,
 541         .disconnect             = hdmi_disconnect,
 542
 543         .enable                 = hdmi_display_enable,
 544         .disable                = hdmi_display_disable,
 545
 546         .check_timings          = hdmi_display_check_timing,
 547         .set_timings            = hdmi_display_set_timing,
 548         .get_timings            = hdmi_display_get_timings,
 549
 550         .read_edid              = hdmi_read_edid,
 551         .set_infoframe          = hdmi_set_infoframe,
 552         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 553 };
 554
 555 static void hdmi_init_output(struct platform_device *pdev)
 556 {
 557         struct omap_dss_device *out = &hdmi.output;
 558
 559         out->dev = &pdev->dev;
 560         out->id = OMAP_DSS_OUTPUT_HDMI;
 561         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 562         out->name = "hdmi.0";
 563         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 564         out->ops.hdmi = &hdmi_ops;
 565         out->owner = THIS_MODULE;
 566
 567         omapdss_register_output(out);
 568 }
 569
 570 static void hdmi_uninit_output(struct platform_device *pdev)
 571 {
 572         struct omap_dss_device *out = &hdmi.output;
 573
 574         omapdss_unregister_output(out);
 575 }
 576
 577 static int hdmi_probe_of(struct platform_device *pdev)
 578 {
 579         struct device_node *node = pdev->dev.of_node;
 580         struct device_node *ep;
 581         int r;
 582
 583         ep = omapdss_of_get_first_endpoint(node);
 584         if (!ep)
 585                 return 0;
 586
 587         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 588         if (r)
 589                 goto err;
 590
 591         of_node_put(ep);
 592         return 0;
 593
 594 err:
 595         of_node_put(ep);
 596         return r;
 597 }
 598
 599 /* Audio callbacks */
 600 static int hdmi_audio_startup(struct device *dev,
 601                               void (*abort_cb)(struct device *dev))
 602 {
 603         struct omap_hdmi *hd = dev_get_drvdata(dev);
 604         int ret = 0;
 605
 606         mutex_lock(&hd->lock);
 607
 608         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 609                 ret = -EPERM;
 610                 goto out;
 611         }
 612
 613         hd->audio_abort_cb = abort_cb;
 614
 615 out:
 616         mutex_unlock(&hd->lock);
 617
 618         return ret;
 619 }
 620
 621 static int hdmi_audio_shutdown(struct device *dev)
 622 {
 623         struct omap_hdmi *hd = dev_get_drvdata(dev);
 624
 625         mutex_lock(&hd->lock);
 626         hd->audio_abort_cb = NULL;
 627         hd->audio_configured = false;
 628         hd->audio_playing = false;
 629         mutex_unlock(&hd->lock);
 630
 631         return 0;
 632 }
 633
 634 static int hdmi_audio_start(struct device *dev)
 635 {
 636         struct omap_hdmi *hd = dev_get_drvdata(dev);
 637         unsigned long flags;
 638
 639         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 640
 641         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 642
 643         if (hd->display_enabled)
 644                 hdmi_start_audio_stream(hd);
 645         hd->audio_playing = true;
 646
 647         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 648         return 0;
 649 }
 650
 651 static void hdmi_audio_stop(struct device *dev)
 652 {
 653         struct omap_hdmi *hd = dev_get_drvdata(dev);
 654         unsigned long flags;
 655
 656         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 657
 658         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 659
 660         if (hd->display_enabled)
 661                 hdmi_stop_audio_stream(hd);
 662         hd->audio_playing = false;
 663
 664         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 665 }
 666
 667 static int hdmi_audio_config(struct device *dev,
 668                              struct omap_dss_audio *dss_audio)
 669 {
 670         struct omap_hdmi *hd = dev_get_drvdata(dev);
 671         int ret;
 672
 673         mutex_lock(&hd->lock);
 674
 675         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 676                 ret = -EPERM;
 677                 goto out;
 678         }
 679
 680         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 681                                  hd->cfg.timings.pixelclock);
 682
 683         if (!ret) {
 684                 hd->audio_configured = true;
 685                 hd->audio_config = *dss_audio;
 686         }
 687 out:
 688         mutex_unlock(&hd->lock);
 689
 690         return ret;
 691 }
 692
 693 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 694         .audio_startup = hdmi_audio_startup,
 695         .audio_shutdown = hdmi_audio_shutdown,
 696         .audio_start = hdmi_audio_start,
 697         .audio_stop = hdmi_audio_stop,
 698         .audio_config = hdmi_audio_config,
 699 };
 700
 701 static int hdmi_audio_register(struct device *dev)
 702 {
 703         struct omap_hdmi_audio_pdata pdata = {
 704                 .dev = dev,
 705                 .dss_version = omapdss_get_version(),
 706                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 707                 .ops = &hdmi_audio_ops,
 708         };
 709
 710         hdmi.audio_pdev = platform_device_register_data(
 711                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 712                 &pdata, sizeof(pdata));
 713
 714         if (IS_ERR(hdmi.audio_pdev))
 715                 return PTR_ERR(hdmi.audio_pdev);
 716
 717         hdmi_runtime_get();
 718         hdmi.wp_idlemode =
 719                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 720         hdmi_runtime_put();
 721
 722         return 0;
 723 }
 724
 725 /* HDMI HW IP initialisation */
 726 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
 727 {
 728         struct platform_device *pdev = to_platform_device(dev);
 729         int r;
 730         int irq;
 731
 732         hdmi.pdev = pdev;
 733         dev_set_drvdata(&pdev->dev, &hdmi);
 734
 735         mutex_init(&hdmi.lock);
 736         spin_lock_init(&hdmi.audio_playing_lock);
 737
 738         if (pdev->dev.of_node) {
 739                 r = hdmi_probe_of(pdev);
 740                 if (r)
 741                         return r;
 742         }
 743
 744         r = hdmi_wp_init(pdev, &hdmi.wp);
 745         if (r)
 746                 return r;
 747
 748         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 749         if (r)
 750                 return r;
 751
 752         r = hdmi_phy_init(pdev, &hdmi.phy);
 753         if (r)
 754                 goto err;
 755
 756         r = hdmi5_core_init(pdev, &hdmi.core);
 757         if (r)
 758                 goto err;
 759
 760         irq = platform_get_irq(pdev, 0);
 761         if (irq < 0) {
 762                 DSSERR("platform_get_irq failed\n");
 763                 r = -ENODEV;
 764                 goto err;
 765         }
 766
 767         r = devm_request_threaded_irq(&pdev->dev, irq,
 768                         NULL, hdmi_irq_handler,
 769                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 770         if (r) {
 771                 DSSERR("HDMI IRQ request failed\n");
 772                 goto err;
 773         }
 774
 775         pm_runtime_enable(&pdev->dev);
 776
 777         hdmi_init_output(pdev);
 778
 779         r = hdmi_audio_register(&pdev->dev);
 780         if (r) {
 781                 DSSERR("Registering HDMI audio failed %d\n", r);
 782                 hdmi_uninit_output(pdev);
 783                 pm_runtime_disable(&pdev->dev);
 784                 return r;
 785         }
 786
 787         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 788
 789         return 0;
 790 err:
 791         hdmi_pll_uninit(&hdmi.pll);
 792         return r;
 793 }
 794
 795 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
 796 {
 797         struct platform_device *pdev = to_platform_device(dev);
 798
 799         if (hdmi.audio_pdev)
 800                 platform_device_unregister(hdmi.audio_pdev);
 801
 802         hdmi_uninit_output(pdev);
 803
 804         hdmi_pll_uninit(&hdmi.pll);
 805
 806         pm_runtime_disable(&pdev->dev);
 807 }
 808
 809 static const struct component_ops hdmi5_component_ops = {
 810         .bind   = hdmi5_bind,
 811         .unbind = hdmi5_unbind,
 812 };
 813
 814 static int hdmi5_probe(struct platform_device *pdev)
 815 {
 816         return component_add(&pdev->dev, &hdmi5_component_ops);
 817 }
 818
 819 static int hdmi5_remove(struct platform_device *pdev)
 820 {
 821         component_del(&pdev->dev, &hdmi5_component_ops);
 822         return 0;
 823 }
 824
 825 static int hdmi_runtime_suspend(struct device *dev)
 826 {
 827         dispc_runtime_put();
 828
 829         return 0;
 830 }
 831
 832 static int hdmi_runtime_resume(struct device *dev)
 833 {
 834         int r;
 835
 836         r = dispc_runtime_get();
 837         if (r < 0)
 838                 return r;
 839
 840         return 0;
 841 }
 842
 843 static const struct dev_pm_ops hdmi_pm_ops = {
 844         .runtime_suspend = hdmi_runtime_suspend,
 845         .runtime_resume = hdmi_runtime_resume,
 846 };
 847
 848 static const struct of_device_id hdmi_of_match[] = {
 849         { .compatible = "ti,omap5-hdmi", },
 850         { .compatible = "ti,dra7-hdmi", },
 851         {},
 852 };
 853
 854 static struct platform_driver omapdss_hdmihw_driver = {
 855         .probe          = hdmi5_probe,
 856         .remove         = hdmi5_remove,
 857         .driver         = {
 858                 .name   = "omapdss_hdmi5",
 859                 .pm     = &hdmi_pm_ops,
 860                 .of_match_table = hdmi_of_match,
 861                 .suppress_bind_attrs = true,
 862         },
 863 };
 864
 865 int __init hdmi5_init_platform_driver(void)
 866 {
 867         return platform_driver_register(&omapdss_hdmihw_driver);
 868 }
 869
 870 void hdmi5_uninit_platform_driver(void)
 871 {
 872         platform_driver_unregister(&omapdss_hdmihw_driver);
 873 }