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1 /*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Author: Stanislaw Skowronek
23 */
24
25 #include <linux/module.h>
26 #include <linux/sched.h>
27 #include <linux/slab.h>
28 #include <asm/unaligned.h>
29
30 #define ATOM_DEBUG
31
32 #include "atom.h"
33 #include "atom-names.h"
34 #include "atom-bits.h"
35
36 #define ATOM_COND_ABOVE 0
37 #define ATOM_COND_ABOVEOREQUAL 1
38 #define ATOM_COND_ALWAYS 2
39 #define ATOM_COND_BELOW 3
40 #define ATOM_COND_BELOWOREQUAL 4
41 #define ATOM_COND_EQUAL 5
42 #define ATOM_COND_NOTEQUAL 6
43
44 #define ATOM_PORT_ATI 0
45 #define ATOM_PORT_PCI 1
46 #define ATOM_PORT_SYSIO 2
47
48 #define ATOM_UNIT_MICROSEC 0
49 #define ATOM_UNIT_MILLISEC 1
50
51 #define PLL_INDEX 2
52 #define PLL_DATA 3
53
54 typedef struct {
55 struct atom_context *ctx;
56
57 uint32_t *ps, *ws;
58 int ps_shift;
59 uint16_t start;
60 } atom_exec_context;
61
62 int atom_debug = 0;
63 static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params);
64 void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params);
65
66 static uint32_t atom_arg_mask[8] =
67 { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000,
68 0xFF000000 };
69 static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 };
70
71 static int atom_dst_to_src[8][4] = {
72 /* translate destination alignment field to the source alignment encoding */
73 {0, 0, 0, 0},
74 {1, 2, 3, 0},
75 {1, 2, 3, 0},
76 {1, 2, 3, 0},
77 {4, 5, 6, 7},
78 {4, 5, 6, 7},
79 {4, 5, 6, 7},
80 {4, 5, 6, 7},
81 };
82 static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 };
83
84 static int debug_depth = 0;
85 #ifdef ATOM_DEBUG
86 static void debug_print_spaces(int n)
87 {
88 while (n--)
89 printk(" ");
90 }
91
92 #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0)
93 #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0)
94 #else
95 #define DEBUG(...) do { } while (0)
96 #define SDEBUG(...) do { } while (0)
97 #endif
98
99 static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
100 uint32_t index, uint32_t data)
101 {
102 uint32_t temp = 0xCDCDCDCD;
103 while (1)
104 switch (CU8(base)) {
105 case ATOM_IIO_NOP:
106 base++;
107 break;
108 case ATOM_IIO_READ:
109 temp = ctx->card->reg_read(ctx->card, CU16(base + 1));
110 base += 3;
111 break;
112 case ATOM_IIO_WRITE:
113 (void)ctx->card->reg_read(ctx->card, CU16(base + 1));
114 ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
115 base += 3;
116 break;
117 case ATOM_IIO_CLEAR:
118 temp &=
119 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
120 CU8(base + 2));
121 base += 3;
122 break;
123 case ATOM_IIO_SET:
124 temp |=
125 (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base +
126 2);
127 base += 3;
128 break;
129 case ATOM_IIO_MOVE_INDEX:
130 temp &=
131 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
132 CU8(base + 2));
133 temp |=
134 ((index >> CU8(base + 2)) &
135 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
136 3);
137 base += 4;
138 break;
139 case ATOM_IIO_MOVE_DATA:
140 temp &=
141 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
142 CU8(base + 2));
143 temp |=
144 ((data >> CU8(base + 2)) &
145 (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base +
146 3);
147 base += 4;
148 break;
149 case ATOM_IIO_MOVE_ATTR:
150 temp &=
151 ~((0xFFFFFFFF >> (32 - CU8(base + 1))) <<
152 CU8(base + 2));
153 temp |=
154 ((ctx->
155 io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 -
156 CU8
157 (base
158 +
159 1))))
160 << CU8(base + 3);
161 base += 4;
162 break;
163 case ATOM_IIO_END:
164 return temp;
165 default:
166 printk(KERN_INFO "Unknown IIO opcode.\n");
167 return 0;
168 }
169 }
170
171 static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr,
172 int *ptr, uint32_t *saved, int print)
173 {
174 uint32_t idx, val = 0xCDCDCDCD, align, arg;
175 struct atom_context *gctx = ctx->ctx;
176 arg = attr & 7;
177 align = (attr >> 3) & 7;
178 switch (arg) {
179 case ATOM_ARG_REG:
180 idx = U16(*ptr);
181 (*ptr) += 2;
182 if (print)
183 DEBUG("REG[0x%04X]", idx);
184 idx += gctx->reg_block;
185 switch (gctx->io_mode) {
186 case ATOM_IO_MM:
187 val = gctx->card->reg_read(gctx->card, idx);
188 break;
189 case ATOM_IO_PCI:
190 printk(KERN_INFO
191 "PCI registers are not implemented.\n");
192 return 0;
193 case ATOM_IO_SYSIO:
194 printk(KERN_INFO
195 "SYSIO registers are not implemented.\n");
196 return 0;
197 default:
198 if (!(gctx->io_mode & 0x80)) {
199 printk(KERN_INFO "Bad IO mode.\n");
200 return 0;
201 }
202 if (!gctx->iio[gctx->io_mode & 0x7F]) {
203 printk(KERN_INFO
204 "Undefined indirect IO read method %d.\n",
205 gctx->io_mode & 0x7F);
206 return 0;
207 }
208 val =
209 atom_iio_execute(gctx,
210 gctx->iio[gctx->io_mode & 0x7F],
211 idx, 0);
212 }
213 break;
214 case ATOM_ARG_PS:
215 idx = U8(*ptr);
216 (*ptr)++;
217 /* get_unaligned_le32 avoids unaligned accesses from atombios
218 * tables, noticed on a DEC Alpha. */
219 val = get_unaligned_le32((u32 *)&ctx->ps[idx]);
220 if (print)
221 DEBUG("PS[0x%02X,0x%04X]", idx, val);
222 break;
223 case ATOM_ARG_WS:
224 idx = U8(*ptr);
225 (*ptr)++;
226 if (print)
227 DEBUG("WS[0x%02X]", idx);
228 switch (idx) {
229 case ATOM_WS_QUOTIENT:
230 val = gctx->divmul[0];
231 break;
232 case ATOM_WS_REMAINDER:
233 val = gctx->divmul[1];
234 break;
235 case ATOM_WS_DATAPTR:
236 val = gctx->data_block;
237 break;
238 case ATOM_WS_SHIFT:
239 val = gctx->shift;
240 break;
241 case ATOM_WS_OR_MASK:
242 val = 1 << gctx->shift;
243 break;
244 case ATOM_WS_AND_MASK:
245 val = ~(1 << gctx->shift);
246 break;
247 case ATOM_WS_FB_WINDOW:
248 val = gctx->fb_base;
249 break;
250 case ATOM_WS_ATTRIBUTES:
251 val = gctx->io_attr;
252 break;
253 case ATOM_WS_REGPTR:
254 val = gctx->reg_block;
255 break;
256 default:
257 val = ctx->ws[idx];
258 }
259 break;
260 case ATOM_ARG_ID:
261 idx = U16(*ptr);
262 (*ptr) += 2;
263 if (print) {
264 if (gctx->data_block)
265 DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block);
266 else
267 DEBUG("ID[0x%04X]", idx);
268 }
269 val = U32(idx + gctx->data_block);
270 break;
271 case ATOM_ARG_FB:
272 idx = U8(*ptr);
273 (*ptr)++;
274 val = gctx->scratch[((gctx->fb_base + idx) / 4)];
275 if (print)
276 DEBUG("FB[0x%02X]", idx);
277 break;
278 case ATOM_ARG_IMM:
279 switch (align) {
280 case ATOM_SRC_DWORD:
281 val = U32(*ptr);
282 (*ptr) += 4;
283 if (print)
284 DEBUG("IMM 0x%08X\n", val);
285 return val;
286 case ATOM_SRC_WORD0:
287 case ATOM_SRC_WORD8:
288 case ATOM_SRC_WORD16:
289 val = U16(*ptr);
290 (*ptr) += 2;
291 if (print)
292 DEBUG("IMM 0x%04X\n", val);
293 return val;
294 case ATOM_SRC_BYTE0:
295 case ATOM_SRC_BYTE8:
296 case ATOM_SRC_BYTE16:
297 case ATOM_SRC_BYTE24:
298 val = U8(*ptr);
299 (*ptr)++;
300 if (print)
301 DEBUG("IMM 0x%02X\n", val);
302 return val;
303 }
304 return 0;
305 case ATOM_ARG_PLL:
306 idx = U8(*ptr);
307 (*ptr)++;
308 if (print)
309 DEBUG("PLL[0x%02X]", idx);
310 val = gctx->card->pll_read(gctx->card, idx);
311 break;
312 case ATOM_ARG_MC:
313 idx = U8(*ptr);
314 (*ptr)++;
315 if (print)
316 DEBUG("MC[0x%02X]", idx);
317 val = gctx->card->mc_read(gctx->card, idx);
318 break;
319 }
320 if (saved)
321 *saved = val;
322 val &= atom_arg_mask[align];
323 val >>= atom_arg_shift[align];
324 if (print)
325 switch (align) {
326 case ATOM_SRC_DWORD:
327 DEBUG(".[31:0] -> 0x%08X\n", val);
328 break;
329 case ATOM_SRC_WORD0:
330 DEBUG(".[15:0] -> 0x%04X\n", val);
331 break;
332 case ATOM_SRC_WORD8:
333 DEBUG(".[23:8] -> 0x%04X\n", val);
334 break;
335 case ATOM_SRC_WORD16:
336 DEBUG(".[31:16] -> 0x%04X\n", val);
337 break;
338 case ATOM_SRC_BYTE0:
339 DEBUG(".[7:0] -> 0x%02X\n", val);
340 break;
341 case ATOM_SRC_BYTE8:
342 DEBUG(".[15:8] -> 0x%02X\n", val);
343 break;
344 case ATOM_SRC_BYTE16:
345 DEBUG(".[23:16] -> 0x%02X\n", val);
346 break;
347 case ATOM_SRC_BYTE24:
348 DEBUG(".[31:24] -> 0x%02X\n", val);
349 break;
350 }
351 return val;
352 }
353
354 static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr)
355 {
356 uint32_t align = (attr >> 3) & 7, arg = attr & 7;
357 switch (arg) {
358 case ATOM_ARG_REG:
359 case ATOM_ARG_ID:
360 (*ptr) += 2;
361 break;
362 case ATOM_ARG_PLL:
363 case ATOM_ARG_MC:
364 case ATOM_ARG_PS:
365 case ATOM_ARG_WS:
366 case ATOM_ARG_FB:
367 (*ptr)++;
368 break;
369 case ATOM_ARG_IMM:
370 switch (align) {
371 case ATOM_SRC_DWORD:
372 (*ptr) += 4;
373 return;
374 case ATOM_SRC_WORD0:
375 case ATOM_SRC_WORD8:
376 case ATOM_SRC_WORD16:
377 (*ptr) += 2;
378 return;
379 case ATOM_SRC_BYTE0:
380 case ATOM_SRC_BYTE8:
381 case ATOM_SRC_BYTE16:
382 case ATOM_SRC_BYTE24:
383 (*ptr)++;
384 return;
385 }
386 return;
387 }
388 }
389
390 static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr)
391 {
392 return atom_get_src_int(ctx, attr, ptr, NULL, 1);
393 }
394
395 static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr)
396 {
397 uint32_t val = 0xCDCDCDCD;
398
399 switch (align) {
400 case ATOM_SRC_DWORD:
401 val = U32(*ptr);
402 (*ptr) += 4;
403 break;
404 case ATOM_SRC_WORD0:
405 case ATOM_SRC_WORD8:
406 case ATOM_SRC_WORD16:
407 val = U16(*ptr);
408 (*ptr) += 2;
409 break;
410 case ATOM_SRC_BYTE0:
411 case ATOM_SRC_BYTE8:
412 case ATOM_SRC_BYTE16:
413 case ATOM_SRC_BYTE24:
414 val = U8(*ptr);
415 (*ptr)++;
416 break;
417 }
418 return val;
419 }
420
421 static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr,
422 int *ptr, uint32_t *saved, int print)
423 {
424 return atom_get_src_int(ctx,
425 arg | atom_dst_to_src[(attr >> 3) &
426 7][(attr >> 6) & 3] << 3,
427 ptr, saved, print);
428 }
429
430 static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr)
431 {
432 atom_skip_src_int(ctx,
433 arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) &
434 3] << 3, ptr);
435 }
436
437 static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr,
438 int *ptr, uint32_t val, uint32_t saved)
439 {
440 uint32_t align =
441 atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val =
442 val, idx;
443 struct atom_context *gctx = ctx->ctx;
444 old_val &= atom_arg_mask[align] >> atom_arg_shift[align];
445 val <<= atom_arg_shift[align];
446 val &= atom_arg_mask[align];
447 saved &= ~atom_arg_mask[align];
448 val |= saved;
449 switch (arg) {
450 case ATOM_ARG_REG:
451 idx = U16(*ptr);
452 (*ptr) += 2;
453 DEBUG("REG[0x%04X]", idx);
454 idx += gctx->reg_block;
455 switch (gctx->io_mode) {
456 case ATOM_IO_MM:
457 if (idx == 0)
458 gctx->card->reg_write(gctx->card, idx,
459 val << 2);
460 else
461 gctx->card->reg_write(gctx->card, idx, val);
462 break;
463 case ATOM_IO_PCI:
464 printk(KERN_INFO
465 "PCI registers are not implemented.\n");
466 return;
467 case ATOM_IO_SYSIO:
468 printk(KERN_INFO
469 "SYSIO registers are not implemented.\n");
470 return;
471 default:
472 if (!(gctx->io_mode & 0x80)) {
473 printk(KERN_INFO "Bad IO mode.\n");
474 return;
475 }
476 if (!gctx->iio[gctx->io_mode & 0xFF]) {
477 printk(KERN_INFO
478 "Undefined indirect IO write method %d.\n",
479 gctx->io_mode & 0x7F);
480 return;
481 }
482 atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF],
483 idx, val);
484 }
485 break;
486 case ATOM_ARG_PS:
487 idx = U8(*ptr);
488 (*ptr)++;
489 DEBUG("PS[0x%02X]", idx);
490 ctx->ps[idx] = cpu_to_le32(val);
491 break;
492 case ATOM_ARG_WS:
493 idx = U8(*ptr);
494 (*ptr)++;
495 DEBUG("WS[0x%02X]", idx);
496 switch (idx) {
497 case ATOM_WS_QUOTIENT:
498 gctx->divmul[0] = val;
499 break;
500 case ATOM_WS_REMAINDER:
501 gctx->divmul[1] = val;
502 break;
503 case ATOM_WS_DATAPTR:
504 gctx->data_block = val;
505 break;
506 case ATOM_WS_SHIFT:
507 gctx->shift = val;
508 break;
509 case ATOM_WS_OR_MASK:
510 case ATOM_WS_AND_MASK:
511 break;
512 case ATOM_WS_FB_WINDOW:
513 gctx->fb_base = val;
514 break;
515 case ATOM_WS_ATTRIBUTES:
516 gctx->io_attr = val;
517 break;
518 case ATOM_WS_REGPTR:
519 gctx->reg_block = val;
520 break;
521 default:
522 ctx->ws[idx] = val;
523 }
524 break;
525 case ATOM_ARG_FB:
526 idx = U8(*ptr);
527 (*ptr)++;
528 gctx->scratch[((gctx->fb_base + idx) / 4)] = val;
529 DEBUG("FB[0x%02X]", idx);
530 break;
531 case ATOM_ARG_PLL:
532 idx = U8(*ptr);
533 (*ptr)++;
534 DEBUG("PLL[0x%02X]", idx);
535 gctx->card->pll_write(gctx->card, idx, val);
536 break;
537 case ATOM_ARG_MC:
538 idx = U8(*ptr);
539 (*ptr)++;
540 DEBUG("MC[0x%02X]", idx);
541 gctx->card->mc_write(gctx->card, idx, val);
542 return;
543 }
544 switch (align) {
545 case ATOM_SRC_DWORD:
546 DEBUG(".[31:0] <- 0x%08X\n", old_val);
547 break;
548 case ATOM_SRC_WORD0:
549 DEBUG(".[15:0] <- 0x%04X\n", old_val);
550 break;
551 case ATOM_SRC_WORD8:
552 DEBUG(".[23:8] <- 0x%04X\n", old_val);
553 break;
554 case ATOM_SRC_WORD16:
555 DEBUG(".[31:16] <- 0x%04X\n", old_val);
556 break;
557 case ATOM_SRC_BYTE0:
558 DEBUG(".[7:0] <- 0x%02X\n", old_val);
559 break;
560 case ATOM_SRC_BYTE8:
561 DEBUG(".[15:8] <- 0x%02X\n", old_val);
562 break;
563 case ATOM_SRC_BYTE16:
564 DEBUG(".[23:16] <- 0x%02X\n", old_val);
565 break;
566 case ATOM_SRC_BYTE24:
567 DEBUG(".[31:24] <- 0x%02X\n", old_val);
568 break;
569 }
570 }
571
572 static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg)
573 {
574 uint8_t attr = U8((*ptr)++);
575 uint32_t dst, src, saved;
576 int dptr = *ptr;
577 SDEBUG(" dst: ");
578 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
579 SDEBUG(" src: ");
580 src = atom_get_src(ctx, attr, ptr);
581 dst += src;
582 SDEBUG(" dst: ");
583 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
584 }
585
586 static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg)
587 {
588 uint8_t attr = U8((*ptr)++);
589 uint32_t dst, src, saved;
590 int dptr = *ptr;
591 SDEBUG(" dst: ");
592 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
593 SDEBUG(" src: ");
594 src = atom_get_src(ctx, attr, ptr);
595 dst &= src;
596 SDEBUG(" dst: ");
597 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
598 }
599
600 static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg)
601 {
602 printk("ATOM BIOS beeped!\n");
603 }
604
605 static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg)
606 {
607 int idx = U8((*ptr)++);
608 if (idx < ATOM_TABLE_NAMES_CNT)
609 SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]);
610 else
611 SDEBUG(" table: %d\n", idx);
612 if (U16(ctx->ctx->cmd_table + 4 + 2 * idx))
613 atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift);
614 }
615
616 static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg)
617 {
618 uint8_t attr = U8((*ptr)++);
619 uint32_t saved;
620 int dptr = *ptr;
621 attr &= 0x38;
622 attr |= atom_def_dst[attr >> 3] << 6;
623 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
624 SDEBUG(" dst: ");
625 atom_put_dst(ctx, arg, attr, &dptr, 0, saved);
626 }
627
628 static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg)
629 {
630 uint8_t attr = U8((*ptr)++);
631 uint32_t dst, src;
632 SDEBUG(" src1: ");
633 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
634 SDEBUG(" src2: ");
635 src = atom_get_src(ctx, attr, ptr);
636 ctx->ctx->cs_equal = (dst == src);
637 ctx->ctx->cs_above = (dst > src);
638 SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE",
639 ctx->ctx->cs_above ? "GT" : "LE");
640 }
641
642 static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg)
643 {
644 uint8_t count = U8((*ptr)++);
645 SDEBUG(" count: %d\n", count);
646 if (arg == ATOM_UNIT_MICROSEC)
647 udelay(count);
648 else
649 schedule_timeout_uninterruptible(msecs_to_jiffies(count));
650 }
651
652 static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg)
653 {
654 uint8_t attr = U8((*ptr)++);
655 uint32_t dst, src;
656 SDEBUG(" src1: ");
657 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
658 SDEBUG(" src2: ");
659 src = atom_get_src(ctx, attr, ptr);
660 if (src != 0) {
661 ctx->ctx->divmul[0] = dst / src;
662 ctx->ctx->divmul[1] = dst % src;
663 } else {
664 ctx->ctx->divmul[0] = 0;
665 ctx->ctx->divmul[1] = 0;
666 }
667 }
668
669 static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg)
670 {
671 /* functionally, a nop */
672 }
673
674 static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
675 {
676 int execute = 0, target = U16(*ptr);
677 (*ptr) += 2;
678 switch (arg) {
679 case ATOM_COND_ABOVE:
680 execute = ctx->ctx->cs_above;
681 break;
682 case ATOM_COND_ABOVEOREQUAL:
683 execute = ctx->ctx->cs_above || ctx->ctx->cs_equal;
684 break;
685 case ATOM_COND_ALWAYS:
686 execute = 1;
687 break;
688 case ATOM_COND_BELOW:
689 execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal);
690 break;
691 case ATOM_COND_BELOWOREQUAL:
692 execute = !ctx->ctx->cs_above;
693 break;
694 case ATOM_COND_EQUAL:
695 execute = ctx->ctx->cs_equal;
696 break;
697 case ATOM_COND_NOTEQUAL:
698 execute = !ctx->ctx->cs_equal;
699 break;
700 }
701 if (arg != ATOM_COND_ALWAYS)
702 SDEBUG(" taken: %s\n", execute ? "yes" : "no");
703 SDEBUG(" target: 0x%04X\n", target);
704 if (execute)
705 *ptr = ctx->start + target;
706 }
707
708 static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg)
709 {
710 uint8_t attr = U8((*ptr)++);
711 uint32_t dst, src1, src2, saved;
712 int dptr = *ptr;
713 SDEBUG(" dst: ");
714 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
715 SDEBUG(" src1: ");
716 src1 = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr);
717 SDEBUG(" src2: ");
718 src2 = atom_get_src(ctx, attr, ptr);
719 dst &= src1;
720 dst |= src2;
721 SDEBUG(" dst: ");
722 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
723 }
724
725 static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg)
726 {
727 uint8_t attr = U8((*ptr)++);
728 uint32_t src, saved;
729 int dptr = *ptr;
730 if (((attr >> 3) & 7) != ATOM_SRC_DWORD)
731 atom_get_dst(ctx, arg, attr, ptr, &saved, 0);
732 else {
733 atom_skip_dst(ctx, arg, attr, ptr);
734 saved = 0xCDCDCDCD;
735 }
736 SDEBUG(" src: ");
737 src = atom_get_src(ctx, attr, ptr);
738 SDEBUG(" dst: ");
739 atom_put_dst(ctx, arg, attr, &dptr, src, saved);
740 }
741
742 static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg)
743 {
744 uint8_t attr = U8((*ptr)++);
745 uint32_t dst, src;
746 SDEBUG(" src1: ");
747 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
748 SDEBUG(" src2: ");
749 src = atom_get_src(ctx, attr, ptr);
750 ctx->ctx->divmul[0] = dst * src;
751 }
752
753 static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg)
754 {
755 /* nothing */
756 }
757
758 static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg)
759 {
760 uint8_t attr = U8((*ptr)++);
761 uint32_t dst, src, saved;
762 int dptr = *ptr;
763 SDEBUG(" dst: ");
764 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
765 SDEBUG(" src: ");
766 src = atom_get_src(ctx, attr, ptr);
767 dst |= src;
768 SDEBUG(" dst: ");
769 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
770 }
771
772 static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg)
773 {
774 uint8_t val = U8((*ptr)++);
775 SDEBUG("POST card output: 0x%02X\n", val);
776 }
777
778 static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg)
779 {
780 printk(KERN_INFO "unimplemented!\n");
781 }
782
783 static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg)
784 {
785 printk(KERN_INFO "unimplemented!\n");
786 }
787
788 static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg)
789 {
790 printk(KERN_INFO "unimplemented!\n");
791 }
792
793 static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg)
794 {
795 int idx = U8(*ptr);
796 (*ptr)++;
797 SDEBUG(" block: %d\n", idx);
798 if (!idx)
799 ctx->ctx->data_block = 0;
800 else if (idx == 255)
801 ctx->ctx->data_block = ctx->start;
802 else
803 ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx);
804 SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block);
805 }
806
807 static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg)
808 {
809 uint8_t attr = U8((*ptr)++);
810 SDEBUG(" fb_base: ");
811 ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr);
812 }
813
814 static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg)
815 {
816 int port;
817 switch (arg) {
818 case ATOM_PORT_ATI:
819 port = U16(*ptr);
820 if (port < ATOM_IO_NAMES_CNT)
821 SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]);
822 else
823 SDEBUG(" port: %d\n", port);
824 if (!port)
825 ctx->ctx->io_mode = ATOM_IO_MM;
826 else
827 ctx->ctx->io_mode = ATOM_IO_IIO | port;
828 (*ptr) += 2;
829 break;
830 case ATOM_PORT_PCI:
831 ctx->ctx->io_mode = ATOM_IO_PCI;
832 (*ptr)++;
833 break;
834 case ATOM_PORT_SYSIO:
835 ctx->ctx->io_mode = ATOM_IO_SYSIO;
836 (*ptr)++;
837 break;
838 }
839 }
840
841 static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg)
842 {
843 ctx->ctx->reg_block = U16(*ptr);
844 (*ptr) += 2;
845 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block);
846 }
847
848 static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg)
849 {
850 uint8_t attr = U8((*ptr)++), shift;
851 uint32_t saved, dst;
852 int dptr = *ptr;
853 attr &= 0x38;
854 attr |= atom_def_dst[attr >> 3] << 6;
855 SDEBUG(" dst: ");
856 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
857 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
858 SDEBUG(" shift: %d\n", shift);
859 dst <<= shift;
860 SDEBUG(" dst: ");
861 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
862 }
863
864 static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg)
865 {
866 uint8_t attr = U8((*ptr)++), shift;
867 uint32_t saved, dst;
868 int dptr = *ptr;
869 attr &= 0x38;
870 attr |= atom_def_dst[attr >> 3] << 6;
871 SDEBUG(" dst: ");
872 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
873 shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr);
874 SDEBUG(" shift: %d\n", shift);
875 dst >>= shift;
876 SDEBUG(" dst: ");
877 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
878 }
879
880 static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg)
881 {
882 uint8_t attr = U8((*ptr)++), shift;
883 uint32_t saved, dst;
884 int dptr = *ptr;
885 SDEBUG(" dst: ");
886 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
887 shift = atom_get_src(ctx, attr, ptr);
888 SDEBUG(" shift: %d\n", shift);
889 dst <<= shift;
890 SDEBUG(" dst: ");
891 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
892 }
893
894 static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg)
895 {
896 uint8_t attr = U8((*ptr)++), shift;
897 uint32_t saved, dst;
898 int dptr = *ptr;
899 SDEBUG(" dst: ");
900 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
901 shift = atom_get_src(ctx, attr, ptr);
902 SDEBUG(" shift: %d\n", shift);
903 dst >>= shift;
904 SDEBUG(" dst: ");
905 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
906 }
907
908 static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg)
909 {
910 uint8_t attr = U8((*ptr)++);
911 uint32_t dst, src, saved;
912 int dptr = *ptr;
913 SDEBUG(" dst: ");
914 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
915 SDEBUG(" src: ");
916 src = atom_get_src(ctx, attr, ptr);
917 dst -= src;
918 SDEBUG(" dst: ");
919 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
920 }
921
922 static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg)
923 {
924 uint8_t attr = U8((*ptr)++);
925 uint32_t src, val, target;
926 SDEBUG(" switch: ");
927 src = atom_get_src(ctx, attr, ptr);
928 while (U16(*ptr) != ATOM_CASE_END)
929 if (U8(*ptr) == ATOM_CASE_MAGIC) {
930 (*ptr)++;
931 SDEBUG(" case: ");
932 val =
933 atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM,
934 ptr);
935 target = U16(*ptr);
936 if (val == src) {
937 SDEBUG(" target: %04X\n", target);
938 *ptr = ctx->start + target;
939 return;
940 }
941 (*ptr) += 2;
942 } else {
943 printk(KERN_INFO "Bad case.\n");
944 return;
945 }
946 (*ptr) += 2;
947 }
948
949 static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg)
950 {
951 uint8_t attr = U8((*ptr)++);
952 uint32_t dst, src;
953 SDEBUG(" src1: ");
954 dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1);
955 SDEBUG(" src2: ");
956 src = atom_get_src(ctx, attr, ptr);
957 ctx->ctx->cs_equal = ((dst & src) == 0);
958 SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE");
959 }
960
961 static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg)
962 {
963 uint8_t attr = U8((*ptr)++);
964 uint32_t dst, src, saved;
965 int dptr = *ptr;
966 SDEBUG(" dst: ");
967 dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1);
968 SDEBUG(" src: ");
969 src = atom_get_src(ctx, attr, ptr);
970 dst ^= src;
971 SDEBUG(" dst: ");
972 atom_put_dst(ctx, arg, attr, &dptr, dst, saved);
973 }
974
975 static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg)
976 {
977 printk(KERN_INFO "unimplemented!\n");
978 }
979
980 static struct {
981 void (*func) (atom_exec_context *, int *, int);
982 int arg;
983 } opcode_table[ATOM_OP_CNT] = {
984 {
985 NULL, 0}, {
986 atom_op_move, ATOM_ARG_REG}, {
987 atom_op_move, ATOM_ARG_PS}, {
988 atom_op_move, ATOM_ARG_WS}, {
989 atom_op_move, ATOM_ARG_FB}, {
990 atom_op_move, ATOM_ARG_PLL}, {
991 atom_op_move, ATOM_ARG_MC}, {
992 atom_op_and, ATOM_ARG_REG}, {
993 atom_op_and, ATOM_ARG_PS}, {
994 atom_op_and, ATOM_ARG_WS}, {
995 atom_op_and, ATOM_ARG_FB}, {
996 atom_op_and, ATOM_ARG_PLL}, {
997 atom_op_and, ATOM_ARG_MC}, {
998 atom_op_or, ATOM_ARG_REG}, {
999 atom_op_or, ATOM_ARG_PS}, {
1000 atom_op_or, ATOM_ARG_WS}, {
1001 atom_op_or, ATOM_ARG_FB}, {
1002 atom_op_or, ATOM_ARG_PLL}, {
1003 atom_op_or, ATOM_ARG_MC}, {
1004 atom_op_shift_left, ATOM_ARG_REG}, {
1005 atom_op_shift_left, ATOM_ARG_PS}, {
1006 atom_op_shift_left, ATOM_ARG_WS}, {
1007 atom_op_shift_left, ATOM_ARG_FB}, {
1008 atom_op_shift_left, ATOM_ARG_PLL}, {
1009 atom_op_shift_left, ATOM_ARG_MC}, {
1010 atom_op_shift_right, ATOM_ARG_REG}, {
1011 atom_op_shift_right, ATOM_ARG_PS}, {
1012 atom_op_shift_right, ATOM_ARG_WS}, {
1013 atom_op_shift_right, ATOM_ARG_FB}, {
1014 atom_op_shift_right, ATOM_ARG_PLL}, {
1015 atom_op_shift_right, ATOM_ARG_MC}, {
1016 atom_op_mul, ATOM_ARG_REG}, {
1017 atom_op_mul, ATOM_ARG_PS}, {
1018 atom_op_mul, ATOM_ARG_WS}, {
1019 atom_op_mul, ATOM_ARG_FB}, {
1020 atom_op_mul, ATOM_ARG_PLL}, {
1021 atom_op_mul, ATOM_ARG_MC}, {
1022 atom_op_div, ATOM_ARG_REG}, {
1023 atom_op_div, ATOM_ARG_PS}, {
1024 atom_op_div, ATOM_ARG_WS}, {
1025 atom_op_div, ATOM_ARG_FB}, {
1026 atom_op_div, ATOM_ARG_PLL}, {
1027 atom_op_div, ATOM_ARG_MC}, {
1028 atom_op_add, ATOM_ARG_REG}, {
1029 atom_op_add, ATOM_ARG_PS}, {
1030 atom_op_add, ATOM_ARG_WS}, {
1031 atom_op_add, ATOM_ARG_FB}, {
1032 atom_op_add, ATOM_ARG_PLL}, {
1033 atom_op_add, ATOM_ARG_MC}, {
1034 atom_op_sub, ATOM_ARG_REG}, {
1035 atom_op_sub, ATOM_ARG_PS}, {
1036 atom_op_sub, ATOM_ARG_WS}, {
1037 atom_op_sub, ATOM_ARG_FB}, {
1038 atom_op_sub, ATOM_ARG_PLL}, {
1039 atom_op_sub, ATOM_ARG_MC}, {
1040 atom_op_setport, ATOM_PORT_ATI}, {
1041 atom_op_setport, ATOM_PORT_PCI}, {
1042 atom_op_setport, ATOM_PORT_SYSIO}, {
1043 atom_op_setregblock, 0}, {
1044 atom_op_setfbbase, 0}, {
1045 atom_op_compare, ATOM_ARG_REG}, {
1046 atom_op_compare, ATOM_ARG_PS}, {
1047 atom_op_compare, ATOM_ARG_WS}, {
1048 atom_op_compare, ATOM_ARG_FB}, {
1049 atom_op_compare, ATOM_ARG_PLL}, {
1050 atom_op_compare, ATOM_ARG_MC}, {
1051 atom_op_switch, 0}, {
1052 atom_op_jump, ATOM_COND_ALWAYS}, {
1053 atom_op_jump, ATOM_COND_EQUAL}, {
1054 atom_op_jump, ATOM_COND_BELOW}, {
1055 atom_op_jump, ATOM_COND_ABOVE}, {
1056 atom_op_jump, ATOM_COND_BELOWOREQUAL}, {
1057 atom_op_jump, ATOM_COND_ABOVEOREQUAL}, {
1058 atom_op_jump, ATOM_COND_NOTEQUAL}, {
1059 atom_op_test, ATOM_ARG_REG}, {
1060 atom_op_test, ATOM_ARG_PS}, {
1061 atom_op_test, ATOM_ARG_WS}, {
1062 atom_op_test, ATOM_ARG_FB}, {
1063 atom_op_test, ATOM_ARG_PLL}, {
1064 atom_op_test, ATOM_ARG_MC}, {
1065 atom_op_delay, ATOM_UNIT_MILLISEC}, {
1066 atom_op_delay, ATOM_UNIT_MICROSEC}, {
1067 atom_op_calltable, 0}, {
1068 atom_op_repeat, 0}, {
1069 atom_op_clear, ATOM_ARG_REG}, {
1070 atom_op_clear, ATOM_ARG_PS}, {
1071 atom_op_clear, ATOM_ARG_WS}, {
1072 atom_op_clear, ATOM_ARG_FB}, {
1073 atom_op_clear, ATOM_ARG_PLL}, {
1074 atom_op_clear, ATOM_ARG_MC}, {
1075 atom_op_nop, 0}, {
1076 atom_op_eot, 0}, {
1077 atom_op_mask, ATOM_ARG_REG}, {
1078 atom_op_mask, ATOM_ARG_PS}, {
1079 atom_op_mask, ATOM_ARG_WS}, {
1080 atom_op_mask, ATOM_ARG_FB}, {
1081 atom_op_mask, ATOM_ARG_PLL}, {
1082 atom_op_mask, ATOM_ARG_MC}, {
1083 atom_op_postcard, 0}, {
1084 atom_op_beep, 0}, {
1085 atom_op_savereg, 0}, {
1086 atom_op_restorereg, 0}, {
1087 atom_op_setdatablock, 0}, {
1088 atom_op_xor, ATOM_ARG_REG}, {
1089 atom_op_xor, ATOM_ARG_PS}, {
1090 atom_op_xor, ATOM_ARG_WS}, {
1091 atom_op_xor, ATOM_ARG_FB}, {
1092 atom_op_xor, ATOM_ARG_PLL}, {
1093 atom_op_xor, ATOM_ARG_MC}, {
1094 atom_op_shl, ATOM_ARG_REG}, {
1095 atom_op_shl, ATOM_ARG_PS}, {
1096 atom_op_shl, ATOM_ARG_WS}, {
1097 atom_op_shl, ATOM_ARG_FB}, {
1098 atom_op_shl, ATOM_ARG_PLL}, {
1099 atom_op_shl, ATOM_ARG_MC}, {
1100 atom_op_shr, ATOM_ARG_REG}, {
1101 atom_op_shr, ATOM_ARG_PS}, {
1102 atom_op_shr, ATOM_ARG_WS}, {
1103 atom_op_shr, ATOM_ARG_FB}, {
1104 atom_op_shr, ATOM_ARG_PLL}, {
1105 atom_op_shr, ATOM_ARG_MC}, {
1106 atom_op_debug, 0},};
1107
1108 static void atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params)
1109 {
1110 int base = CU16(ctx->cmd_table + 4 + 2 * index);
1111 int len, ws, ps, ptr;
1112 unsigned char op;
1113 atom_exec_context ectx;
1114
1115 if (!base)
1116 return;
1117
1118 len = CU16(base + ATOM_CT_SIZE_PTR);
1119 ws = CU8(base + ATOM_CT_WS_PTR);
1120 ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK;
1121 ptr = base + ATOM_CT_CODE_PTR;
1122
1123 SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps);
1124
1125 ectx.ctx = ctx;
1126 ectx.ps_shift = ps / 4;
1127 ectx.start = base;
1128 ectx.ps = params;
1129 if (ws)
1130 ectx.ws = kzalloc(4 * ws, GFP_KERNEL);
1131 else
1132 ectx.ws = NULL;
1133
1134 debug_depth++;
1135 while (1) {
1136 op = CU8(ptr++);
1137 if (op < ATOM_OP_NAMES_CNT)
1138 SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1);
1139 else
1140 SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1);
1141
1142 if (op < ATOM_OP_CNT && op > 0)
1143 opcode_table[op].func(&ectx, &ptr,
1144 opcode_table[op].arg);
1145 else
1146 break;
1147
1148 if (op == ATOM_OP_EOT)
1149 break;
1150 }
1151 debug_depth--;
1152 SDEBUG("<<\n");
1153
1154 if (ws)
1155 kfree(ectx.ws);
1156 }
1157
1158 void atom_execute_table(struct atom_context *ctx, int index, uint32_t * params)
1159 {
1160 mutex_lock(&ctx->mutex);
1161 /* reset reg block */
1162 ctx->reg_block = 0;
1163 /* reset fb window */
1164 ctx->fb_base = 0;
1165 /* reset io mode */
1166 ctx->io_mode = ATOM_IO_MM;
1167 atom_execute_table_locked(ctx, index, params);
1168 mutex_unlock(&ctx->mutex);
1169 }
1170
1171 static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 };
1172
1173 static void atom_index_iio(struct atom_context *ctx, int base)
1174 {
1175 ctx->iio = kzalloc(2 * 256, GFP_KERNEL);
1176 while (CU8(base) == ATOM_IIO_START) {
1177 ctx->iio[CU8(base + 1)] = base + 2;
1178 base += 2;
1179 while (CU8(base) != ATOM_IIO_END)
1180 base += atom_iio_len[CU8(base)];
1181 base += 3;
1182 }
1183 }
1184
1185 struct atom_context *atom_parse(struct card_info *card, void *bios)
1186 {
1187 int base;
1188 struct atom_context *ctx =
1189 kzalloc(sizeof(struct atom_context), GFP_KERNEL);
1190 char *str;
1191 char name[512];
1192 int i;
1193
1194 ctx->card = card;
1195 ctx->bios = bios;
1196
1197 if (CU16(0) != ATOM_BIOS_MAGIC) {
1198 printk(KERN_INFO "Invalid BIOS magic.\n");
1199 kfree(ctx);
1200 return NULL;
1201 }
1202 if (strncmp
1203 (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC,
1204 strlen(ATOM_ATI_MAGIC))) {
1205 printk(KERN_INFO "Invalid ATI magic.\n");
1206 kfree(ctx);
1207 return NULL;
1208 }
1209
1210 base = CU16(ATOM_ROM_TABLE_PTR);
1211 if (strncmp
1212 (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC,
1213 strlen(ATOM_ROM_MAGIC))) {
1214 printk(KERN_INFO "Invalid ATOM magic.\n");
1215 kfree(ctx);
1216 return NULL;
1217 }
1218
1219 ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR);
1220 ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR);
1221 atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4);
1222
1223 str = CSTR(CU16(base + ATOM_ROM_MSG_PTR));
1224 while (*str && ((*str == '\n') || (*str == '\r')))
1225 str++;
1226 /* name string isn't always 0 terminated */
1227 for (i = 0; i < 511; i++) {
1228 name[i] = str[i];
1229 if (name[i] < '.' || name[i] > 'z') {
1230 name[i] = 0;
1231 break;
1232 }
1233 }
1234 printk(KERN_INFO "ATOM BIOS: %s\n", name);
1235
1236 return ctx;
1237 }
1238
1239 int atom_asic_init(struct atom_context *ctx)
1240 {
1241 int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR);
1242 uint32_t ps[16];
1243 memset(ps, 0, 64);
1244
1245 ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR));
1246 ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR));
1247 if (!ps[0] || !ps[1])
1248 return 1;
1249
1250 if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT))
1251 return 1;
1252 atom_execute_table(ctx, ATOM_CMD_INIT, ps);
1253
1254 return 0;
1255 }
1256
1257 void atom_destroy(struct atom_context *ctx)
1258 {
1259 if (ctx->iio)
1260 kfree(ctx->iio);
1261 kfree(ctx);
1262 }
1263
1264 void atom_parse_data_header(struct atom_context *ctx, int index,
1265 uint16_t * size, uint8_t * frev, uint8_t * crev,
1266 uint16_t * data_start)
1267 {
1268 int offset = index * 2 + 4;
1269 int idx = CU16(ctx->data_table + offset);
1270
1271 if (size)
1272 *size = CU16(idx);
1273 if (frev)
1274 *frev = CU8(idx + 2);
1275 if (crev)
1276 *crev = CU8(idx + 3);
1277 *data_start = idx;
1278 return;
1279 }
1280
1281 void atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev,
1282 uint8_t * crev)
1283 {
1284 int offset = index * 2 + 4;
1285 int idx = CU16(ctx->cmd_table + offset);
1286
1287 if (frev)
1288 *frev = CU8(idx + 2);
1289 if (crev)
1290 *crev = CU8(idx + 3);
1291 return;
1292 }
1293
1294 int atom_allocate_fb_scratch(struct atom_context *ctx)
1295 {
1296 int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware);
1297 uint16_t data_offset;
1298 int usage_bytes;
1299 struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage;
1300
1301 atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset);
1302
1303 firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset);
1304
1305 DRM_DEBUG("atom firmware requested %08x %dkb\n",
1306 firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware,
1307 firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb);
1308
1309 usage_bytes = firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb * 1024;
1310 if (usage_bytes == 0)
1311 usage_bytes = 20 * 1024;
1312 /* allocate some scratch memory */
1313 ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL);
1314 if (!ctx->scratch)
1315 return -ENOMEM;
1316 return 0;
1317 }