drivers/gpu/drm/radeon/radeon_dp_mst.c

   1
   2 #include <drm/drmP.h>
   3 #include <drm/drm_dp_mst_helper.h>
   4 #include <drm/drm_fb_helper.h>
   5
   6 #include "radeon.h"
   7 #include "atom.h"
   8 #include "ni_reg.h"
   9
  10 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
  11
  12 static int radeon_atom_set_enc_offset(int id)
  13 {
  14         static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
  15                                        EVERGREEN_CRTC1_REGISTER_OFFSET,
  16                                        EVERGREEN_CRTC2_REGISTER_OFFSET,
  17                                        EVERGREEN_CRTC3_REGISTER_OFFSET,
  18                                        EVERGREEN_CRTC4_REGISTER_OFFSET,
  19                                        EVERGREEN_CRTC5_REGISTER_OFFSET,
  20                                        0x13830 - 0x7030 };
  21
  22         return offsets[id];
  23 }
  24
  25 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
  26                                      struct radeon_encoder_mst *mst_enc,
  27                                      enum radeon_hpd_id hpd, bool enable)
  28 {
  29         struct drm_device *dev = primary->base.dev;
  30         struct radeon_device *rdev = dev->dev_private;
  31         uint32_t reg;
  32         int retries = 0;
  33         uint32_t temp;
  34
  35         reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
  36
  37         /* set MST mode */
  38         reg &= ~NI_DIG_FE_DIG_MODE(7);
  39         reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
  40
  41         if (enable)
  42                 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  43         else
  44                 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  45
  46         reg |= NI_DIG_HPD_SELECT(hpd);
  47         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
  48         WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
  49
  50         if (enable) {
  51                 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
  52
  53                 do {
  54                         temp = RREG32(NI_DIG_FE_CNTL + offset);
  55                 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
  56                 if (retries == 10000)
  57                         DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
  58         }
  59         return 0;
  60 }
  61
  62 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
  63                                            int stream_number,
  64                                            int fe,
  65                                            int slots)
  66 {
  67         struct drm_device *dev = primary->base.dev;
  68         struct radeon_device *rdev = dev->dev_private;
  69         u32 temp, val;
  70         int retries  = 0;
  71         int satreg, satidx;
  72
  73         satreg = stream_number >> 1;
  74         satidx = stream_number & 1;
  75
  76         temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
  77
  78         val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
  79
  80         val <<= (16 * satidx);
  81
  82         temp &= ~(0xffff << (16 * satidx));
  83
  84         temp |= val;
  85
  86         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  87         WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  88
  89         WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
  90
  91         do {
  92                 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
  93         } while ((temp & 0x1) && retries++ < 10000);
  94
  95         if (retries == 10000)
  96                 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
  97
  98         /* MTP 16 ? */
  99         return 0;
 100 }
 101
 102 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
 103                                                struct radeon_encoder *primary)
 104 {
 105         struct drm_device *dev = mst_conn->base.dev;
 106         struct stream_attribs new_attribs[6];
 107         int i;
 108         int idx = 0;
 109         struct radeon_connector *radeon_connector;
 110         struct drm_connector *connector;
 111
 112         memset(new_attribs, 0, sizeof(new_attribs));
 113         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 114                 struct radeon_encoder *subenc;
 115                 struct radeon_encoder_mst *mst_enc;
 116
 117                 radeon_connector = to_radeon_connector(connector);
 118                 if (!radeon_connector->is_mst_connector)
 119                         continue;
 120
 121                 if (radeon_connector->mst_port != mst_conn)
 122                         continue;
 123
 124                 subenc = radeon_connector->mst_encoder;
 125                 mst_enc = subenc->enc_priv;
 126
 127                 if (!mst_enc->enc_active)
 128                         continue;
 129
 130                 new_attribs[idx].fe = mst_enc->fe;
 131                 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
 132                 idx++;
 133         }
 134
 135         for (i = 0; i < idx; i++) {
 136                 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
 137                     new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
 138                         radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
 139                         mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
 140                         mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
 141                 }
 142         }
 143
 144         for (i = idx; i < mst_conn->enabled_attribs; i++) {
 145                 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
 146                 mst_conn->cur_stream_attribs[i].fe = 0;
 147                 mst_conn->cur_stream_attribs[i].slots = 0;
 148         }
 149         mst_conn->enabled_attribs = idx;
 150         return 0;
 151 }
 152
 153 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
 154 {
 155         struct drm_device *dev = mst->base.dev;
 156         struct radeon_device *rdev = dev->dev_private;
 157         struct radeon_encoder_mst *mst_enc = mst->enc_priv;
 158         uint32_t val, temp;
 159         uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
 160         int retries = 0;
 161
 162         val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
 163
 164         WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
 165
 166         do {
 167                 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
 168         } while ((temp & 0x1) && (retries++ < 10000));
 169
 170         if (retries >= 10000)
 171                 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
 172         return 0;
 173 }
 174
 175 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
 176 {
 177         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 178         struct radeon_connector *master = radeon_connector->mst_port;
 179         struct edid *edid;
 180         int ret = 0;
 181
 182         edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
 183         radeon_connector->edid = edid;
 184         DRM_DEBUG_KMS("edid retrieved %p\n", edid);
 185         if (radeon_connector->edid) {
 186                 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
 187                 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
 188                 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
 189                 return ret;
 190         }
 191         drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
 192
 193         return ret;
 194 }
 195
 196 static int radeon_dp_mst_get_modes(struct drm_connector *connector)
 197 {
 198         return radeon_dp_mst_get_ddc_modes(connector);
 199 }
 200
 201 static enum drm_mode_status
 202 radeon_dp_mst_mode_valid(struct drm_connector *connector,
 203                         struct drm_display_mode *mode)
 204 {
 205         /* TODO - validate mode against available PBN for link */
 206         if (mode->clock < 10000)
 207                 return MODE_CLOCK_LOW;
 208
 209         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 210                 return MODE_H_ILLEGAL;
 211
 212         return MODE_OK;
 213 }
 214
 215 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
 216 {
 217         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 218
 219         return &radeon_connector->mst_encoder->base;
 220 }
 221
 222 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
 223         .get_modes = radeon_dp_mst_get_modes,
 224         .mode_valid = radeon_dp_mst_mode_valid,
 225         .best_encoder = radeon_mst_best_encoder,
 226 };
 227
 228 static enum drm_connector_status
 229 radeon_dp_mst_detect(struct drm_connector *connector, bool force)
 230 {
 231         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 232         struct radeon_connector *master = radeon_connector->mst_port;
 233
 234         return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
 235 }
 236
 237 static void
 238 radeon_dp_mst_connector_destroy(struct drm_connector *connector)
 239 {
 240         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 241         struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
 242
 243         drm_encoder_cleanup(&radeon_encoder->base);
 244         kfree(radeon_encoder);
 245         drm_connector_cleanup(connector);
 246         kfree(radeon_connector);
 247 }
 248
 249 static int radeon_connector_dpms(struct drm_connector *connector, int mode)
 250 {
 251         DRM_DEBUG_KMS("\n");
 252         return 0;
 253 }
 254
 255 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
 256         .dpms = radeon_connector_dpms,
 257         .detect = radeon_dp_mst_detect,
 258         .fill_modes = drm_helper_probe_single_connector_modes,
 259         .destroy = radeon_dp_mst_connector_destroy,
 260 };
 261
 262 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 263                                                          struct drm_dp_mst_port *port,
 264                                                          const char *pathprop)
 265 {
 266         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 267         struct drm_device *dev = master->base.dev;
 268         struct radeon_connector *radeon_connector;
 269         struct drm_connector *connector;
 270
 271         radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
 272         if (!radeon_connector)
 273                 return NULL;
 274
 275         radeon_connector->is_mst_connector = true;
 276         connector = &radeon_connector->base;
 277         radeon_connector->port = port;
 278         radeon_connector->mst_port = master;
 279         DRM_DEBUG_KMS("\n");
 280
 281         drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
 282         drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
 283         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
 284
 285         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 286         drm_mode_connector_set_path_property(connector, pathprop);
 287
 288         return connector;
 289 }
 290
 291 static void radeon_dp_register_mst_connector(struct drm_connector *connector)
 292 {
 293         struct drm_device *dev = connector->dev;
 294         struct radeon_device *rdev = dev->dev_private;
 295
 296         drm_modeset_lock_all(dev);
 297         radeon_fb_add_connector(rdev, connector);
 298         drm_modeset_unlock_all(dev);
 299
 300         drm_connector_register(connector);
 301 }
 302
 303 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 304                                             struct drm_connector *connector)
 305 {
 306         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 307         struct drm_device *dev = master->base.dev;
 308         struct radeon_device *rdev = dev->dev_private;
 309
 310         drm_connector_unregister(connector);
 311         /* need to nuke the connector */
 312         drm_modeset_lock_all(dev);
 313         /* dpms off */
 314         radeon_fb_remove_connector(rdev, connector);
 315
 316         drm_connector_cleanup(connector);
 317         drm_modeset_unlock_all(dev);
 318
 319         kfree(connector);
 320         DRM_DEBUG_KMS("\n");
 321 }
 322
 323 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
 324 {
 325         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 326         struct drm_device *dev = master->base.dev;
 327
 328         drm_kms_helper_hotplug_event(dev);
 329 }
 330
 331 struct drm_dp_mst_topology_cbs mst_cbs = {
 332         .add_connector = radeon_dp_add_mst_connector,
 333         .register_connector = radeon_dp_register_mst_connector,
 334         .destroy_connector = radeon_dp_destroy_mst_connector,
 335         .hotplug = radeon_dp_mst_hotplug,
 336 };
 337
 338 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
 339 {
 340         struct drm_device *dev = encoder->dev;
 341         struct drm_connector *connector;
 342
 343         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 344                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 345                 if (!connector->encoder)
 346                         continue;
 347                 if (!radeon_connector->is_mst_connector)
 348                         continue;
 349
 350                 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
 351                 if (connector->encoder == encoder)
 352                         return radeon_connector;
 353         }
 354         return NULL;
 355 }
 356
 357 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
 358 {
 359         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 360         struct drm_device *dev = crtc->dev;
 361         struct radeon_device *rdev = dev->dev_private;
 362         struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
 363         struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
 364         struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
 365         int dp_clock;
 366         struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
 367
 368         if (radeon_connector) {
 369                 radeon_connector->pixelclock_for_modeset = mode->clock;
 370                 if (radeon_connector->base.display_info.bpc)
 371                         radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
 372                 else
 373                         radeon_crtc->bpc = 8;
 374         }
 375
 376         DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
 377         dp_clock = dig_connector->dp_clock;
 378         radeon_crtc->ss_enabled =
 379                 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
 380                                                  ASIC_INTERNAL_SS_ON_DP,
 381                                                  dp_clock);
 382 }
 383
 384 static void
 385 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
 386 {
 387         struct drm_device *dev = encoder->dev;
 388         struct radeon_device *rdev = dev->dev_private;
 389         struct radeon_encoder *radeon_encoder, *primary;
 390         struct radeon_encoder_mst *mst_enc;
 391         struct radeon_encoder_atom_dig *dig_enc;
 392         struct radeon_connector *radeon_connector;
 393         struct drm_crtc *crtc;
 394         struct radeon_crtc *radeon_crtc;
 395         int ret, slots;
 396
 397         if (!ASIC_IS_DCE5(rdev)) {
 398                 DRM_ERROR("got mst dpms on non-DCE5\n");
 399                 return;
 400         }
 401
 402         radeon_connector = radeon_mst_find_connector(encoder);
 403         if (!radeon_connector)
 404                 return;
 405
 406         radeon_encoder = to_radeon_encoder(encoder);
 407
 408         mst_enc = radeon_encoder->enc_priv;
 409
 410         primary = mst_enc->primary;
 411
 412         dig_enc = primary->enc_priv;
 413
 414         crtc = encoder->crtc;
 415         DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
 416
 417         switch (mode) {
 418         case DRM_MODE_DPMS_ON:
 419                 dig_enc->active_mst_links++;
 420
 421                 radeon_crtc = to_radeon_crtc(crtc);
 422
 423                 if (dig_enc->active_mst_links == 1) {
 424                         mst_enc->fe = dig_enc->dig_encoder;
 425                         mst_enc->fe_from_be = true;
 426                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 427
 428                         atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
 429                         atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
 430                                                         0, 0, dig_enc->dig_encoder);
 431
 432                         if (radeon_dp_needs_link_train(mst_enc->connector) ||
 433                             dig_enc->active_mst_links == 1) {
 434                                 radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
 435                         }
 436
 437                 } else {
 438                         mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
 439                         if (mst_enc->fe == -1)
 440                                 DRM_ERROR("failed to get frontend for dig encoder\n");
 441                         mst_enc->fe_from_be = false;
 442                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 443                 }
 444
 445                 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
 446                               dig_enc->linkb, radeon_crtc->crtc_id);
 447
 448                 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
 449                                                radeon_connector->port,
 450                                                mst_enc->pbn, &slots);
 451                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 452
 453                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 454                                           radeon_connector->mst_port->hpd.hpd, true);
 455
 456                 mst_enc->enc_active = true;
 457                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 458                 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
 459
 460                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
 461                                             mst_enc->fe);
 462                 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 463
 464                 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 465
 466                 break;
 467         case DRM_MODE_DPMS_STANDBY:
 468         case DRM_MODE_DPMS_SUSPEND:
 469         case DRM_MODE_DPMS_OFF:
 470                 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
 471
 472                 if (!mst_enc->enc_active)
 473                         return;
 474
 475                 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 476                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 477
 478                 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 479                 /* and this can also fail */
 480                 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 481
 482                 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 483
 484                 mst_enc->enc_active = false;
 485                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 486
 487                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 488                                           radeon_connector->mst_port->hpd.hpd, false);
 489                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
 490                                             mst_enc->fe);
 491
 492                 if (!mst_enc->fe_from_be)
 493                         radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
 494
 495                 mst_enc->fe_from_be = false;
 496                 dig_enc->active_mst_links--;
 497                 if (dig_enc->active_mst_links == 0) {
 498                         /* drop link */
 499                 }
 500
 501                 break;
 502         }
 503
 504 }
 505
 506 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 507                                    const struct drm_display_mode *mode,
 508                                    struct drm_display_mode *adjusted_mode)
 509 {
 510         struct radeon_encoder_mst *mst_enc;
 511         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 512         int bpp = 24;
 513
 514         mst_enc = radeon_encoder->enc_priv;
 515
 516         mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
 517
 518         mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 519         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
 520                       mst_enc->primary->active_device, mst_enc->primary->devices,
 521                       mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
 522
 523
 524         drm_mode_set_crtcinfo(adjusted_mode, 0);
 525         {
 526           struct radeon_connector_atom_dig *dig_connector;
 527
 528           dig_connector = mst_enc->connector->con_priv;
 529           dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
 530           dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
 531                                                                 dig_connector->dpcd);
 532           DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
 533                         dig_connector->dp_lane_count, dig_connector->dp_clock);
 534         }
 535         return true;
 536 }
 537
 538 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
 539 {
 540         struct radeon_connector *radeon_connector;
 541         struct radeon_encoder *radeon_encoder, *primary;
 542         struct radeon_encoder_mst *mst_enc;
 543         struct radeon_encoder_atom_dig *dig_enc;
 544
 545         radeon_connector = radeon_mst_find_connector(encoder);
 546         if (!radeon_connector) {
 547                 DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
 548                 return;
 549         }
 550         radeon_encoder = to_radeon_encoder(encoder);
 551
 552         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 553
 554         mst_enc = radeon_encoder->enc_priv;
 555
 556         primary = mst_enc->primary;
 557
 558         dig_enc = primary->enc_priv;
 559
 560         mst_enc->port = radeon_connector->port;
 561
 562         if (dig_enc->dig_encoder == -1) {
 563                 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
 564                 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
 565                 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
 566
 567
 568         }
 569         DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
 570 }
 571
 572 static void
 573 radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
 574                              struct drm_display_mode *mode,
 575                              struct drm_display_mode *adjusted_mode)
 576 {
 577         DRM_DEBUG_KMS("\n");
 578 }
 579
 580 static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
 581 {
 582         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 583         DRM_DEBUG_KMS("\n");
 584 }
 585
 586 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
 587         .dpms = radeon_mst_encoder_dpms,
 588         .mode_fixup = radeon_mst_mode_fixup,
 589         .prepare = radeon_mst_encoder_prepare,
 590         .mode_set = radeon_mst_encoder_mode_set,
 591         .commit = radeon_mst_encoder_commit,
 592 };
 593
 594 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 595 {
 596         drm_encoder_cleanup(encoder);
 597         kfree(encoder);
 598 }
 599
 600 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
 601         .destroy = radeon_dp_mst_encoder_destroy,
 602 };
 603
 604 static struct radeon_encoder *
 605 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
 606 {
 607         struct drm_device *dev = connector->base.dev;
 608         struct radeon_device *rdev = dev->dev_private;
 609         struct radeon_encoder *radeon_encoder;
 610         struct radeon_encoder_mst *mst_enc;
 611         struct drm_encoder *encoder;
 612         const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
 613         struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
 614
 615         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
 616         radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
 617         if (!radeon_encoder)
 618                 return NULL;
 619
 620         radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
 621         if (!radeon_encoder->enc_priv) {
 622                 kfree(radeon_encoder);
 623                 return NULL;
 624         }
 625         encoder = &radeon_encoder->base;
 626         switch (rdev->num_crtc) {
 627         case 1:
 628                 encoder->possible_crtcs = 0x1;
 629                 break;
 630         case 2:
 631         default:
 632                 encoder->possible_crtcs = 0x3;
 633                 break;
 634         case 4:
 635                 encoder->possible_crtcs = 0xf;
 636                 break;
 637         case 6:
 638                 encoder->possible_crtcs = 0x3f;
 639                 break;
 640         }
 641
 642         drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
 643                          DRM_MODE_ENCODER_DPMST);
 644         drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
 645
 646         mst_enc = radeon_encoder->enc_priv;
 647         mst_enc->connector = connector;
 648         mst_enc->primary = to_radeon_encoder(enc_master);
 649         radeon_encoder->is_mst_encoder = true;
 650         return radeon_encoder;
 651 }
 652
 653 int
 654 radeon_dp_mst_init(struct radeon_connector *radeon_connector)
 655 {
 656         struct drm_device *dev = radeon_connector->base.dev;
 657
 658         if (!radeon_connector->ddc_bus->has_aux)
 659                 return 0;
 660
 661         radeon_connector->mst_mgr.cbs = &mst_cbs;
 662         return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
 663                                             &radeon_connector->ddc_bus->aux, 16, 6,
 664                                             radeon_connector->base.base.id);
 665 }
 666
 667 int
 668 radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
 669 {
 670         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 671         struct drm_device *dev = radeon_connector->base.dev;
 672         struct radeon_device *rdev = dev->dev_private;
 673         int ret;
 674         u8 msg[1];
 675
 676         if (!radeon_mst)
 677                 return 0;
 678
 679         if (!ASIC_IS_DCE5(rdev))
 680                 return 0;
 681
 682         if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
 683                 return 0;
 684
 685         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
 686                                1);
 687         if (ret) {
 688                 if (msg[0] & DP_MST_CAP) {
 689                         DRM_DEBUG_KMS("Sink is MST capable\n");
 690                         dig_connector->is_mst = true;
 691                 } else {
 692                         DRM_DEBUG_KMS("Sink is not MST capable\n");
 693                         dig_connector->is_mst = false;
 694                 }
 695
 696         }
 697         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 698                                         dig_connector->is_mst);
 699         return dig_connector->is_mst;
 700 }
 701
 702 int
 703 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
 704 {
 705         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 706         int retry;
 707
 708         if (dig_connector->is_mst) {
 709                 u8 esi[16] = { 0 };
 710                 int dret;
 711                 int ret = 0;
 712                 bool handled;
 713
 714                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 715                                        DP_SINK_COUNT_ESI, esi, 8);
 716 go_again:
 717                 if (dret == 8) {
 718                         DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 719                         ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
 720
 721                         if (handled) {
 722                                 for (retry = 0; retry < 3; retry++) {
 723                                         int wret;
 724                                         wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
 725                                                                  DP_SINK_COUNT_ESI + 1, &esi[1], 3);
 726                                         if (wret == 3)
 727                                                 break;
 728                                 }
 729
 730                                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 731                                                         DP_SINK_COUNT_ESI, esi, 8);
 732                                 if (dret == 8) {
 733                                         DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 734                                         goto go_again;
 735                                 }
 736                         } else
 737                                 ret = 0;
 738
 739                         return ret;
 740                 } else {
 741                         DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
 742                         dig_connector->is_mst = false;
 743                         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 744                                                         dig_connector->is_mst);
 745                         /* send a hotplug event */
 746                 }
 747         }
 748         return -EINVAL;
 749 }
 750
 751 #if defined(CONFIG_DEBUG_FS)
 752
 753 static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
 754 {
 755         struct drm_info_node *node = (struct drm_info_node *)m->private;
 756         struct drm_device *dev = node->minor->dev;
 757         struct drm_connector *connector;
 758         struct radeon_connector *radeon_connector;
 759         struct radeon_connector_atom_dig *dig_connector;
 760         int i;
 761
 762         drm_modeset_lock_all(dev);
 763         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 764                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 765                         continue;
 766
 767                 radeon_connector = to_radeon_connector(connector);
 768                 dig_connector = radeon_connector->con_priv;
 769                 if (radeon_connector->is_mst_connector)
 770                         continue;
 771                 if (!dig_connector->is_mst)
 772                         continue;
 773                 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
 774
 775                 for (i = 0; i < radeon_connector->enabled_attribs; i++)
 776                         seq_printf(m, "attrib %d: %d %d\n", i,
 777                                    radeon_connector->cur_stream_attribs[i].fe,
 778                                    radeon_connector->cur_stream_attribs[i].slots);
 779         }
 780         drm_modeset_unlock_all(dev);
 781         return 0;
 782 }
 783
 784 static struct drm_info_list radeon_debugfs_mst_list[] = {
 785         {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
 786 };
 787 #endif
 788
 789 int radeon_mst_debugfs_init(struct radeon_device *rdev)
 790 {
 791 #if defined(CONFIG_DEBUG_FS)
 792         return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
 793 #endif
 794         return 0;
 795 }