drivers/gpu/drm/radeon/radeon_fb.c

   1 /*
   2  * Copyright © 2007 David Airlie
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *     David Airlie
  25  */
  26     /*
  27      *  Modularization
  28      */
  29
  30 #include <linux/module.h>
  31 #include <linux/fb.h>
  32
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "drm_crtc.h"
  36 #include "drm_crtc_helper.h"
  37 #include "radeon_drm.h"
  38 #include "radeon.h"
  39
  40 #include "drm_fb_helper.h"
  41
  42 struct radeon_fb_device {
  43         struct drm_fb_helper helper;
  44         struct radeon_framebuffer       *rfb;
  45         struct radeon_device            *rdev;
  46 };
  47
  48 static struct fb_ops radeonfb_ops = {
  49         .owner = THIS_MODULE,
  50         .fb_check_var = drm_fb_helper_check_var,
  51         .fb_set_par = drm_fb_helper_set_par,
  52         .fb_setcolreg = drm_fb_helper_setcolreg,
  53         .fb_fillrect = cfb_fillrect,
  54         .fb_copyarea = cfb_copyarea,
  55         .fb_imageblit = cfb_imageblit,
  56         .fb_pan_display = drm_fb_helper_pan_display,
  57         .fb_blank = drm_fb_helper_blank,
  58         .fb_setcmap = drm_fb_helper_setcmap,
  59 };
  60
  61 /**
  62  * Currently it is assumed that the old framebuffer is reused.
  63  *
  64  * LOCKING
  65  * caller should hold the mode config lock.
  66  *
  67  */
  68 int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
  69 {
  70         struct fb_info *info;
  71         struct drm_framebuffer *fb;
  72         struct drm_display_mode *mode = crtc->desired_mode;
  73
  74         fb = crtc->fb;
  75         if (fb == NULL) {
  76                 return 1;
  77         }
  78         info = fb->fbdev;
  79         if (info == NULL) {
  80                 return 1;
  81         }
  82         if (mode == NULL) {
  83                 return 1;
  84         }
  85         info->var.xres = mode->hdisplay;
  86         info->var.right_margin = mode->hsync_start - mode->hdisplay;
  87         info->var.hsync_len = mode->hsync_end - mode->hsync_start;
  88         info->var.left_margin = mode->htotal - mode->hsync_end;
  89         info->var.yres = mode->vdisplay;
  90         info->var.lower_margin = mode->vsync_start - mode->vdisplay;
  91         info->var.vsync_len = mode->vsync_end - mode->vsync_start;
  92         info->var.upper_margin = mode->vtotal - mode->vsync_end;
  93         info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
  94         /* avoid overflow */
  95         info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
  96
  97         return 0;
  98 }
  99 EXPORT_SYMBOL(radeonfb_resize);
 100
 101 static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
 102 {
 103         int aligned = width;
 104         int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
 105         int pitch_mask = 0;
 106
 107         switch (bpp / 8) {
 108         case 1:
 109                 pitch_mask = align_large ? 255 : 127;
 110                 break;
 111         case 2:
 112                 pitch_mask = align_large ? 127 : 31;
 113                 break;
 114         case 3:
 115         case 4:
 116                 pitch_mask = align_large ? 63 : 15;
 117                 break;
 118         }
 119
 120         aligned += pitch_mask;
 121         aligned &= ~pitch_mask;
 122         return aligned;
 123 }
 124
 125 static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
 126         .gamma_set = radeon_crtc_fb_gamma_set,
 127         .gamma_get = radeon_crtc_fb_gamma_get,
 128 };
 129
 130 int radeonfb_create(struct drm_device *dev,
 131                     uint32_t fb_width, uint32_t fb_height,
 132                     uint32_t surface_width, uint32_t surface_height,
 133                     uint32_t surface_depth, uint32_t surface_bpp,
 134                     struct drm_framebuffer **fb_p)
 135 {
 136         struct radeon_device *rdev = dev->dev_private;
 137         struct fb_info *info;
 138         struct radeon_fb_device *rfbdev;
 139         struct drm_framebuffer *fb = NULL;
 140         struct radeon_framebuffer *rfb;
 141         struct drm_mode_fb_cmd mode_cmd;
 142         struct drm_gem_object *gobj = NULL;
 143         struct radeon_bo *rbo = NULL;
 144         struct device *device = &rdev->pdev->dev;
 145         int size, aligned_size, ret;
 146         u64 fb_gpuaddr;
 147         void *fbptr = NULL;
 148         unsigned long tmp;
 149         bool fb_tiled = false; /* useful for testing */
 150         u32 tiling_flags = 0;
 151
 152         mode_cmd.width = surface_width;
 153         mode_cmd.height = surface_height;
 154
 155         /* avivo can't scanout real 24bpp */
 156         if ((surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
 157                 surface_bpp = 32;
 158
 159         mode_cmd.bpp = surface_bpp;
 160         /* need to align pitch with crtc limits */
 161         mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
 162         mode_cmd.depth = surface_depth;
 163
 164         size = mode_cmd.pitch * mode_cmd.height;
 165         aligned_size = ALIGN(size, PAGE_SIZE);
 166
 167         ret = radeon_gem_object_create(rdev, aligned_size, 0,
 168                         RADEON_GEM_DOMAIN_VRAM,
 169                         false, ttm_bo_type_kernel,
 170                         &gobj);
 171         if (ret) {
 172                 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
 173                        surface_width, surface_height);
 174                 ret = -ENOMEM;
 175                 goto out;
 176         }
 177         rbo = gobj->driver_private;
 178
 179         if (fb_tiled)
 180                 tiling_flags = RADEON_TILING_MACRO;
 181
 182 #ifdef __BIG_ENDIAN
 183         switch (mode_cmd.bpp) {
 184         case 32:
 185                 tiling_flags |= RADEON_TILING_SWAP_32BIT;
 186                 break;
 187         case 16:
 188                 tiling_flags |= RADEON_TILING_SWAP_16BIT;
 189         default:
 190                 break;
 191         }
 192 #endif
 193
 194         if (tiling_flags) {
 195                 ret = radeon_bo_set_tiling_flags(rbo,
 196                                         tiling_flags | RADEON_TILING_SURFACE,
 197                                         mode_cmd.pitch);
 198                 if (ret)
 199                         dev_err(rdev->dev, "FB failed to set tiling flags\n");
 200         }
 201         mutex_lock(&rdev->ddev->struct_mutex);
 202         fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
 203         if (fb == NULL) {
 204                 DRM_ERROR("failed to allocate fb.\n");
 205                 ret = -ENOMEM;
 206                 goto out_unref;
 207         }
 208         ret = radeon_bo_reserve(rbo, false);
 209         if (unlikely(ret != 0))
 210                 goto out_unref;
 211         ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
 212         if (ret) {
 213                 radeon_bo_unreserve(rbo);
 214                 goto out_unref;
 215         }
 216         if (fb_tiled)
 217                 radeon_bo_check_tiling(rbo, 0, 0);
 218         ret = radeon_bo_kmap(rbo, &fbptr);
 219         radeon_bo_unreserve(rbo);
 220         if (ret) {
 221                 goto out_unref;
 222         }
 223
 224         list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
 225
 226         *fb_p = fb;
 227         rfb = to_radeon_framebuffer(fb);
 228         rdev->fbdev_rfb = rfb;
 229         rdev->fbdev_rbo = rbo;
 230
 231         info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
 232         if (info == NULL) {
 233                 ret = -ENOMEM;
 234                 goto out_unref;
 235         }
 236
 237         rdev->fbdev_info = info;
 238         rfbdev = info->par;
 239         rfbdev->helper.funcs = &radeon_fb_helper_funcs;
 240         rfbdev->helper.dev = dev;
 241         ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, rdev->num_crtc,
 242                                             RADEONFB_CONN_LIMIT);
 243         if (ret)
 244                 goto out_unref;
 245
 246         memset_io(fbptr, 0x0, aligned_size);
 247
 248         strcpy(info->fix.id, "radeondrmfb");
 249
 250         drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
 251
 252         info->flags = FBINFO_DEFAULT;
 253         info->fbops = &radeonfb_ops;
 254
 255         tmp = fb_gpuaddr - rdev->mc.vram_start;
 256         info->fix.smem_start = rdev->mc.aper_base + tmp;
 257         info->fix.smem_len = size;
 258         info->screen_base = fbptr;
 259         info->screen_size = size;
 260
 261         drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
 262
 263         /* setup aperture base/size for vesafb takeover */
 264         info->aperture_base = rdev->ddev->mode_config.fb_base;
 265         info->aperture_size = rdev->mc.real_vram_size;
 266
 267         info->fix.mmio_start = 0;
 268         info->fix.mmio_len = 0;
 269         info->pixmap.size = 64*1024;
 270         info->pixmap.buf_align = 8;
 271         info->pixmap.access_align = 32;
 272         info->pixmap.flags = FB_PIXMAP_SYSTEM;
 273         info->pixmap.scan_align = 1;
 274         if (info->screen_base == NULL) {
 275                 ret = -ENOSPC;
 276                 goto out_unref;
 277         }
 278         DRM_INFO("fb mappable at 0x%lX\n",  info->fix.smem_start);
 279         DRM_INFO("vram apper at 0x%lX\n",  (unsigned long)rdev->mc.aper_base);
 280         DRM_INFO("size %lu\n", (unsigned long)size);
 281         DRM_INFO("fb depth is %d\n", fb->depth);
 282         DRM_INFO("   pitch is %d\n", fb->pitch);
 283
 284         fb->fbdev = info;
 285         rfbdev->rfb = rfb;
 286         rfbdev->rdev = rdev;
 287
 288         mutex_unlock(&rdev->ddev->struct_mutex);
 289         return 0;
 290
 291 out_unref:
 292         if (rbo) {
 293                 ret = radeon_bo_reserve(rbo, false);
 294                 if (likely(ret == 0)) {
 295                         radeon_bo_kunmap(rbo);
 296                         radeon_bo_unreserve(rbo);
 297                 }
 298         }
 299         if (fb && ret) {
 300                 list_del(&fb->filp_head);
 301                 drm_gem_object_unreference(gobj);
 302                 drm_framebuffer_cleanup(fb);
 303                 kfree(fb);
 304         }
 305         drm_gem_object_unreference(gobj);
 306         mutex_unlock(&rdev->ddev->struct_mutex);
 307 out:
 308         return ret;
 309 }
 310
 311 static char *mode_option;
 312 int radeon_parse_options(char *options)
 313 {
 314         char *this_opt;
 315
 316         if (!options || !*options)
 317                 return 0;
 318
 319         while ((this_opt = strsep(&options, ",")) != NULL) {
 320                 if (!*this_opt)
 321                         continue;
 322                 mode_option = this_opt;
 323         }
 324         return 0;
 325 }
 326
 327 int radeonfb_probe(struct drm_device *dev)
 328 {
 329         struct radeon_device *rdev = dev->dev_private;
 330         int bpp_sel = 32;
 331
 332         /* select 8 bpp console on RN50 or 16MB cards */
 333         if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
 334                 bpp_sel = 8;
 335
 336         return drm_fb_helper_single_fb_probe(dev, bpp_sel, &radeonfb_create);
 337 }
 338
 339 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 340 {
 341         struct fb_info *info;
 342         struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
 343         struct radeon_bo *rbo;
 344         int r;
 345
 346         if (!fb) {
 347                 return -EINVAL;
 348         }
 349         info = fb->fbdev;
 350         if (info) {
 351                 struct radeon_fb_device *rfbdev = info->par;
 352                 rbo = rfb->obj->driver_private;
 353                 unregister_framebuffer(info);
 354                 r = radeon_bo_reserve(rbo, false);
 355                 if (likely(r == 0)) {
 356                         radeon_bo_kunmap(rbo);
 357                         radeon_bo_unpin(rbo);
 358                         radeon_bo_unreserve(rbo);
 359                 }
 360                 drm_fb_helper_free(&rfbdev->helper);
 361                 framebuffer_release(info);
 362         }
 363
 364         printk(KERN_INFO "unregistered panic notifier\n");
 365
 366         return 0;
 367 }
 368 EXPORT_SYMBOL(radeonfb_remove);
 369 MODULE_LICENSE("GPL");