drivers/gpu/drm/radeon/radeon_kms.c

   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #include <drm/drmP.h>
  29 #include "radeon.h"
  30 #include <drm/radeon_drm.h>
  31 #include "radeon_asic.h"
  32
  33 #include <linux/vga_switcheroo.h>
  34 #include <linux/slab.h>
  35
  36 /**
  37  * radeon_driver_unload_kms - Main unload function for KMS.
  38  *
  39  * @dev: drm dev pointer
  40  *
  41  * This is the main unload function for KMS (all asics).
  42  * It calls radeon_modeset_fini() to tear down the
  43  * displays, and radeon_device_fini() to tear down
  44  * the rest of the device (CP, writeback, etc.).
  45  * Returns 0 on success.
  46  */
  47 int radeon_driver_unload_kms(struct drm_device *dev)
  48 {
  49         struct radeon_device *rdev = dev->dev_private;
  50
  51         if (rdev == NULL)
  52                 return 0;
  53         radeon_modeset_fini(rdev);
  54         radeon_device_fini(rdev);
  55         kfree(rdev);
  56         dev->dev_private = NULL;
  57         return 0;
  58 }
  59
  60 /**
  61  * radeon_driver_load_kms - Main load function for KMS.
  62  *
  63  * @dev: drm dev pointer
  64  * @flags: device flags
  65  *
  66  * This is the main load function for KMS (all asics).
  67  * It calls radeon_device_init() to set up the non-display
  68  * parts of the chip (asic init, CP, writeback, etc.), and
  69  * radeon_modeset_init() to set up the display parts
  70  * (crtcs, encoders, hotplug detect, etc.).
  71  * Returns 0 on success, error on failure.
  72  */
  73 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
  74 {
  75         struct radeon_device *rdev;
  76         int r, acpi_status;
  77
  78         rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
  79         if (rdev == NULL) {
  80                 return -ENOMEM;
  81         }
  82         dev->dev_private = (void *)rdev;
  83
  84         /* update BUS flag */
  85         if (drm_pci_device_is_agp(dev)) {
  86                 flags |= RADEON_IS_AGP;
  87         } else if (pci_is_pcie(dev->pdev)) {
  88                 flags |= RADEON_IS_PCIE;
  89         } else {
  90                 flags |= RADEON_IS_PCI;
  91         }
  92
  93         /* radeon_device_init should report only fatal error
  94          * like memory allocation failure or iomapping failure,
  95          * or memory manager initialization failure, it must
  96          * properly initialize the GPU MC controller and permit
  97          * VRAM allocation
  98          */
  99         r = radeon_device_init(rdev, dev, dev->pdev, flags);
 100         if (r) {
 101                 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
 102                 goto out;
 103         }
 104
 105         /* Call ACPI methods */
 106         acpi_status = radeon_acpi_init(rdev);
 107         if (acpi_status)
 108                 dev_dbg(&dev->pdev->dev, "Error during ACPI methods call\n");
 109
 110         /* Again modeset_init should fail only on fatal error
 111          * otherwise it should provide enough functionalities
 112          * for shadowfb to run
 113          */
 114         r = radeon_modeset_init(rdev);
 115         if (r)
 116                 dev_err(&dev->pdev->dev, "Fatal error during modeset init\n");
 117 out:
 118         if (r)
 119                 radeon_driver_unload_kms(dev);
 120         return r;
 121 }
 122
 123 /**
 124  * radeon_set_filp_rights - Set filp right.
 125  *
 126  * @dev: drm dev pointer
 127  * @owner: drm file
 128  * @applier: drm file
 129  * @value: value
 130  *
 131  * Sets the filp rights for the device (all asics).
 132  */
 133 static void radeon_set_filp_rights(struct drm_device *dev,
 134                                    struct drm_file **owner,
 135                                    struct drm_file *applier,
 136                                    uint32_t *value)
 137 {
 138         mutex_lock(&dev->struct_mutex);
 139         if (*value == 1) {
 140                 /* wants rights */
 141                 if (!*owner)
 142                         *owner = applier;
 143         } else if (*value == 0) {
 144                 /* revokes rights */
 145                 if (*owner == applier)
 146                         *owner = NULL;
 147         }
 148         *value = *owner == applier ? 1 : 0;
 149         mutex_unlock(&dev->struct_mutex);
 150 }
 151
 152 /*
 153  * Userspace get information ioctl
 154  */
 155 /**
 156  * radeon_info_ioctl - answer a device specific request.
 157  *
 158  * @rdev: radeon device pointer
 159  * @data: request object
 160  * @filp: drm filp
 161  *
 162  * This function is used to pass device specific parameters to the userspace
 163  * drivers.  Examples include: pci device id, pipeline parms, tiling params,
 164  * etc. (all asics).
 165  * Returns 0 on success, -EINVAL on failure.
 166  */
 167 int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
 168 {
 169         struct radeon_device *rdev = dev->dev_private;
 170         struct drm_radeon_info *info = data;
 171         struct radeon_mode_info *minfo = &rdev->mode_info;
 172         uint32_t value, *value_ptr;
 173         uint64_t value64, *value_ptr64;
 174         struct drm_crtc *crtc;
 175         int i, found;
 176
 177         /* TIMESTAMP is a 64-bit value, needs special handling. */
 178         if (info->request == RADEON_INFO_TIMESTAMP) {
 179                 if (rdev->family >= CHIP_R600) {
 180                         value_ptr64 = (uint64_t*)((unsigned long)info->value);
 181                         if (rdev->family >= CHIP_TAHITI) {
 182                                 value64 = si_get_gpu_clock(rdev);
 183                         } else {
 184                                 value64 = r600_get_gpu_clock(rdev);
 185                         }
 186
 187                         if (DRM_COPY_TO_USER(value_ptr64, &value64, sizeof(value64))) {
 188                                 DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);
 189                                 return -EFAULT;
 190                         }
 191                         return 0;
 192                 } else {
 193                         DRM_DEBUG_KMS("timestamp is r6xx+ only!\n");
 194                         return -EINVAL;
 195                 }
 196         }
 197
 198         value_ptr = (uint32_t *)((unsigned long)info->value);
 199         if (DRM_COPY_FROM_USER(&value, value_ptr, sizeof(value))) {
 200                 DRM_ERROR("copy_from_user %s:%u\n", __func__, __LINE__);
 201                 return -EFAULT;
 202         }
 203
 204         switch (info->request) {
 205         case RADEON_INFO_DEVICE_ID:
 206                 value = dev->pci_device;
 207                 break;
 208         case RADEON_INFO_NUM_GB_PIPES:
 209                 value = rdev->num_gb_pipes;
 210                 break;
 211         case RADEON_INFO_NUM_Z_PIPES:
 212                 value = rdev->num_z_pipes;
 213                 break;
 214         case RADEON_INFO_ACCEL_WORKING:
 215                 /* xf86-video-ati 6.13.0 relies on this being false for evergreen */
 216                 if ((rdev->family >= CHIP_CEDAR) && (rdev->family <= CHIP_HEMLOCK))
 217                         value = false;
 218                 else
 219                         value = rdev->accel_working;
 220                 break;
 221         case RADEON_INFO_CRTC_FROM_ID:
 222                 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
 223                         crtc = (struct drm_crtc *)minfo->crtcs[i];
 224                         if (crtc && crtc->base.id == value) {
 225                                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 226                                 value = radeon_crtc->crtc_id;
 227                                 found = 1;
 228                                 break;
 229                         }
 230                 }
 231                 if (!found) {
 232                         DRM_DEBUG_KMS("unknown crtc id %d\n", value);
 233                         return -EINVAL;
 234                 }
 235                 break;
 236         case RADEON_INFO_ACCEL_WORKING2:
 237                 value = rdev->accel_working;
 238                 break;
 239         case RADEON_INFO_TILING_CONFIG:
 240                 if (rdev->family >= CHIP_TAHITI)
 241                         value = rdev->config.si.tile_config;
 242                 else if (rdev->family >= CHIP_CAYMAN)
 243                         value = rdev->config.cayman.tile_config;
 244                 else if (rdev->family >= CHIP_CEDAR)
 245                         value = rdev->config.evergreen.tile_config;
 246                 else if (rdev->family >= CHIP_RV770)
 247                         value = rdev->config.rv770.tile_config;
 248                 else if (rdev->family >= CHIP_R600)
 249                         value = rdev->config.r600.tile_config;
 250                 else {
 251                         DRM_DEBUG_KMS("tiling config is r6xx+ only!\n");
 252                         return -EINVAL;
 253                 }
 254                 break;
 255         case RADEON_INFO_WANT_HYPERZ:
 256                 /* The "value" here is both an input and output parameter.
 257                  * If the input value is 1, filp requests hyper-z access.
 258                  * If the input value is 0, filp revokes its hyper-z access.
 259                  *
 260                  * When returning, the value is 1 if filp owns hyper-z access,
 261                  * 0 otherwise. */
 262                 if (value >= 2) {
 263                         DRM_DEBUG_KMS("WANT_HYPERZ: invalid value %d\n", value);
 264                         return -EINVAL;
 265                 }
 266                 radeon_set_filp_rights(dev, &rdev->hyperz_filp, filp, &value);
 267                 break;
 268         case RADEON_INFO_WANT_CMASK:
 269                 /* The same logic as Hyper-Z. */
 270                 if (value >= 2) {
 271                         DRM_DEBUG_KMS("WANT_CMASK: invalid value %d\n", value);
 272                         return -EINVAL;
 273                 }
 274                 radeon_set_filp_rights(dev, &rdev->cmask_filp, filp, &value);
 275                 break;
 276         case RADEON_INFO_CLOCK_CRYSTAL_FREQ:
 277                 /* return clock value in KHz */
 278                 value = rdev->clock.spll.reference_freq * 10;
 279                 break;
 280         case RADEON_INFO_NUM_BACKENDS:
 281                 if (rdev->family >= CHIP_TAHITI)
 282                         value = rdev->config.si.max_backends_per_se *
 283                                 rdev->config.si.max_shader_engines;
 284                 else if (rdev->family >= CHIP_CAYMAN)
 285                         value = rdev->config.cayman.max_backends_per_se *
 286                                 rdev->config.cayman.max_shader_engines;
 287                 else if (rdev->family >= CHIP_CEDAR)
 288                         value = rdev->config.evergreen.max_backends;
 289                 else if (rdev->family >= CHIP_RV770)
 290                         value = rdev->config.rv770.max_backends;
 291                 else if (rdev->family >= CHIP_R600)
 292                         value = rdev->config.r600.max_backends;
 293                 else {
 294                         return -EINVAL;
 295                 }
 296                 break;
 297         case RADEON_INFO_NUM_TILE_PIPES:
 298                 if (rdev->family >= CHIP_TAHITI)
 299                         value = rdev->config.si.max_tile_pipes;
 300                 else if (rdev->family >= CHIP_CAYMAN)
 301                         value = rdev->config.cayman.max_tile_pipes;
 302                 else if (rdev->family >= CHIP_CEDAR)
 303                         value = rdev->config.evergreen.max_tile_pipes;
 304                 else if (rdev->family >= CHIP_RV770)
 305                         value = rdev->config.rv770.max_tile_pipes;
 306                 else if (rdev->family >= CHIP_R600)
 307                         value = rdev->config.r600.max_tile_pipes;
 308                 else {
 309                         return -EINVAL;
 310                 }
 311                 break;
 312         case RADEON_INFO_FUSION_GART_WORKING:
 313                 value = 1;
 314                 break;
 315         case RADEON_INFO_BACKEND_MAP:
 316                 if (rdev->family >= CHIP_TAHITI)
 317                         value = rdev->config.si.backend_map;
 318                 else if (rdev->family >= CHIP_CAYMAN)
 319                         value = rdev->config.cayman.backend_map;
 320                 else if (rdev->family >= CHIP_CEDAR)
 321                         value = rdev->config.evergreen.backend_map;
 322                 else if (rdev->family >= CHIP_RV770)
 323                         value = rdev->config.rv770.backend_map;
 324                 else if (rdev->family >= CHIP_R600)
 325                         value = rdev->config.r600.backend_map;
 326                 else {
 327                         return -EINVAL;
 328                 }
 329                 break;
 330         case RADEON_INFO_VA_START:
 331                 /* this is where we report if vm is supported or not */
 332                 if (rdev->family < CHIP_CAYMAN)
 333                         return -EINVAL;
 334                 value = RADEON_VA_RESERVED_SIZE;
 335                 break;
 336         case RADEON_INFO_IB_VM_MAX_SIZE:
 337                 /* this is where we report if vm is supported or not */
 338                 if (rdev->family < CHIP_CAYMAN)
 339                         return -EINVAL;
 340                 value = RADEON_IB_VM_MAX_SIZE;
 341                 break;
 342         case RADEON_INFO_MAX_PIPES:
 343                 if (rdev->family >= CHIP_TAHITI)
 344                         value = rdev->config.si.max_cu_per_sh;
 345                 else if (rdev->family >= CHIP_CAYMAN)
 346                         value = rdev->config.cayman.max_pipes_per_simd;
 347                 else if (rdev->family >= CHIP_CEDAR)
 348                         value = rdev->config.evergreen.max_pipes;
 349                 else if (rdev->family >= CHIP_RV770)
 350                         value = rdev->config.rv770.max_pipes;
 351                 else if (rdev->family >= CHIP_R600)
 352                         value = rdev->config.r600.max_pipes;
 353                 else {
 354                         return -EINVAL;
 355                 }
 356                 break;
 357         default:
 358                 DRM_DEBUG_KMS("Invalid request %d\n", info->request);
 359                 return -EINVAL;
 360         }
 361         if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) {
 362                 DRM_ERROR("copy_to_user %s:%u\n", __func__, __LINE__);
 363                 return -EFAULT;
 364         }
 365         return 0;
 366 }
 367
 368
 369 /*
 370  * Outdated mess for old drm with Xorg being in charge (void function now).
 371  */
 372 /**
 373  * radeon_driver_firstopen_kms - drm callback for first open
 374  *
 375  * @dev: drm dev pointer
 376  *
 377  * Nothing to be done for KMS (all asics).
 378  * Returns 0 on success.
 379  */
 380 int radeon_driver_firstopen_kms(struct drm_device *dev)
 381 {
 382         return 0;
 383 }
 384
 385 /**
 386  * radeon_driver_firstopen_kms - drm callback for last close
 387  *
 388  * @dev: drm dev pointer
 389  *
 390  * Switch vga switcheroo state after last close (all asics).
 391  */
 392 void radeon_driver_lastclose_kms(struct drm_device *dev)
 393 {
 394         vga_switcheroo_process_delayed_switch();
 395 }
 396
 397 /**
 398  * radeon_driver_open_kms - drm callback for open
 399  *
 400  * @dev: drm dev pointer
 401  * @file_priv: drm file
 402  *
 403  * On device open, init vm on cayman+ (all asics).
 404  * Returns 0 on success, error on failure.
 405  */
 406 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv)
 407 {
 408         struct radeon_device *rdev = dev->dev_private;
 409
 410         file_priv->driver_priv = NULL;
 411
 412         /* new gpu have virtual address space support */
 413         if (rdev->family >= CHIP_CAYMAN) {
 414                 struct radeon_fpriv *fpriv;
 415                 int r;
 416
 417                 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
 418                 if (unlikely(!fpriv)) {
 419                         return -ENOMEM;
 420                 }
 421
 422                 r = radeon_vm_init(rdev, &fpriv->vm);
 423                 if (r) {
 424                         radeon_vm_fini(rdev, &fpriv->vm);
 425                         kfree(fpriv);
 426                         return r;
 427                 }
 428
 429                 file_priv->driver_priv = fpriv;
 430         }
 431         return 0;
 432 }
 433
 434 /**
 435  * radeon_driver_postclose_kms - drm callback for post close
 436  *
 437  * @dev: drm dev pointer
 438  * @file_priv: drm file
 439  *
 440  * On device post close, tear down vm on cayman+ (all asics).
 441  */
 442 void radeon_driver_postclose_kms(struct drm_device *dev,
 443                                  struct drm_file *file_priv)
 444 {
 445         struct radeon_device *rdev = dev->dev_private;
 446
 447         /* new gpu have virtual address space support */
 448         if (rdev->family >= CHIP_CAYMAN && file_priv->driver_priv) {
 449                 struct radeon_fpriv *fpriv = file_priv->driver_priv;
 450
 451                 radeon_vm_fini(rdev, &fpriv->vm);
 452                 kfree(fpriv);
 453                 file_priv->driver_priv = NULL;
 454         }
 455 }
 456
 457 /**
 458  * radeon_driver_preclose_kms - drm callback for pre close
 459  *
 460  * @dev: drm dev pointer
 461  * @file_priv: drm file
 462  *
 463  * On device pre close, tear down hyperz and cmask filps on r1xx-r5xx
 464  * (all asics).
 465  */
 466 void radeon_driver_preclose_kms(struct drm_device *dev,
 467                                 struct drm_file *file_priv)
 468 {
 469         struct radeon_device *rdev = dev->dev_private;
 470         if (rdev->hyperz_filp == file_priv)
 471                 rdev->hyperz_filp = NULL;
 472         if (rdev->cmask_filp == file_priv)
 473                 rdev->cmask_filp = NULL;
 474 }
 475
 476 /*
 477  * VBlank related functions.
 478  */
 479 /**
 480  * radeon_get_vblank_counter_kms - get frame count
 481  *
 482  * @dev: drm dev pointer
 483  * @crtc: crtc to get the frame count from
 484  *
 485  * Gets the frame count on the requested crtc (all asics).
 486  * Returns frame count on success, -EINVAL on failure.
 487  */
 488 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc)
 489 {
 490         struct radeon_device *rdev = dev->dev_private;
 491
 492         if (crtc < 0 || crtc >= rdev->num_crtc) {
 493                 DRM_ERROR("Invalid crtc %d\n", crtc);
 494                 return -EINVAL;
 495         }
 496
 497         return radeon_get_vblank_counter(rdev, crtc);
 498 }
 499
 500 /**
 501  * radeon_enable_vblank_kms - enable vblank interrupt
 502  *
 503  * @dev: drm dev pointer
 504  * @crtc: crtc to enable vblank interrupt for
 505  *
 506  * Enable the interrupt on the requested crtc (all asics).
 507  * Returns 0 on success, -EINVAL on failure.
 508  */
 509 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc)
 510 {
 511         struct radeon_device *rdev = dev->dev_private;
 512         unsigned long irqflags;
 513         int r;
 514
 515         if (crtc < 0 || crtc >= rdev->num_crtc) {
 516                 DRM_ERROR("Invalid crtc %d\n", crtc);
 517                 return -EINVAL;
 518         }
 519
 520         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 521         rdev->irq.crtc_vblank_int[crtc] = true;
 522         r = radeon_irq_set(rdev);
 523         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 524         return r;
 525 }
 526
 527 /**
 528  * radeon_disable_vblank_kms - disable vblank interrupt
 529  *
 530  * @dev: drm dev pointer
 531  * @crtc: crtc to disable vblank interrupt for
 532  *
 533  * Disable the interrupt on the requested crtc (all asics).
 534  */
 535 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc)
 536 {
 537         struct radeon_device *rdev = dev->dev_private;
 538         unsigned long irqflags;
 539
 540         if (crtc < 0 || crtc >= rdev->num_crtc) {
 541                 DRM_ERROR("Invalid crtc %d\n", crtc);
 542                 return;
 543         }
 544
 545         spin_lock_irqsave(&rdev->irq.lock, irqflags);
 546         rdev->irq.crtc_vblank_int[crtc] = false;
 547         radeon_irq_set(rdev);
 548         spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
 549 }
 550
 551 /**
 552  * radeon_get_vblank_timestamp_kms - get vblank timestamp
 553  *
 554  * @dev: drm dev pointer
 555  * @crtc: crtc to get the timestamp for
 556  * @max_error: max error
 557  * @vblank_time: time value
 558  * @flags: flags passed to the driver
 559  *
 560  * Gets the timestamp on the requested crtc based on the
 561  * scanout position.  (all asics).
 562  * Returns postive status flags on success, negative error on failure.
 563  */
 564 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
 565                                     int *max_error,
 566                                     struct timeval *vblank_time,
 567                                     unsigned flags)
 568 {
 569         struct drm_crtc *drmcrtc;
 570         struct radeon_device *rdev = dev->dev_private;
 571
 572         if (crtc < 0 || crtc >= dev->num_crtcs) {
 573                 DRM_ERROR("Invalid crtc %d\n", crtc);
 574                 return -EINVAL;
 575         }
 576
 577         /* Get associated drm_crtc: */
 578         drmcrtc = &rdev->mode_info.crtcs[crtc]->base;
 579
 580         /* Helper routine in DRM core does all the work: */
 581         return drm_calc_vbltimestamp_from_scanoutpos(dev, crtc, max_error,
 582                                                      vblank_time, flags,
 583                                                      drmcrtc);
 584 }
 585
 586 /*
 587  * IOCTL.
 588  */
 589 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
 590                          struct drm_file *file_priv)
 591 {
 592         /* Not valid in KMS. */
 593         return -EINVAL;
 594 }
 595
 596 #define KMS_INVALID_IOCTL(name)                                         \
 597 int name(struct drm_device *dev, void *data, struct drm_file *file_priv)\
 598 {                                                                       \
 599         DRM_ERROR("invalid ioctl with kms %s\n", __func__);             \
 600         return -EINVAL;                                                 \
 601 }
 602
 603 /*
 604  * All these ioctls are invalid in kms world.
 605  */
 606 KMS_INVALID_IOCTL(radeon_cp_init_kms)
 607 KMS_INVALID_IOCTL(radeon_cp_start_kms)
 608 KMS_INVALID_IOCTL(radeon_cp_stop_kms)
 609 KMS_INVALID_IOCTL(radeon_cp_reset_kms)
 610 KMS_INVALID_IOCTL(radeon_cp_idle_kms)
 611 KMS_INVALID_IOCTL(radeon_cp_resume_kms)
 612 KMS_INVALID_IOCTL(radeon_engine_reset_kms)
 613 KMS_INVALID_IOCTL(radeon_fullscreen_kms)
 614 KMS_INVALID_IOCTL(radeon_cp_swap_kms)
 615 KMS_INVALID_IOCTL(radeon_cp_clear_kms)
 616 KMS_INVALID_IOCTL(radeon_cp_vertex_kms)
 617 KMS_INVALID_IOCTL(radeon_cp_indices_kms)
 618 KMS_INVALID_IOCTL(radeon_cp_texture_kms)
 619 KMS_INVALID_IOCTL(radeon_cp_stipple_kms)
 620 KMS_INVALID_IOCTL(radeon_cp_indirect_kms)
 621 KMS_INVALID_IOCTL(radeon_cp_vertex2_kms)
 622 KMS_INVALID_IOCTL(radeon_cp_cmdbuf_kms)
 623 KMS_INVALID_IOCTL(radeon_cp_getparam_kms)
 624 KMS_INVALID_IOCTL(radeon_cp_flip_kms)
 625 KMS_INVALID_IOCTL(radeon_mem_alloc_kms)
 626 KMS_INVALID_IOCTL(radeon_mem_free_kms)
 627 KMS_INVALID_IOCTL(radeon_mem_init_heap_kms)
 628 KMS_INVALID_IOCTL(radeon_irq_emit_kms)
 629 KMS_INVALID_IOCTL(radeon_irq_wait_kms)
 630 KMS_INVALID_IOCTL(radeon_cp_setparam_kms)
 631 KMS_INVALID_IOCTL(radeon_surface_alloc_kms)
 632 KMS_INVALID_IOCTL(radeon_surface_free_kms)
 633
 634
 635 struct drm_ioctl_desc radeon_ioctls_kms[] = {
 636         DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 637         DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 638         DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 639         DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 640         DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH),
 641         DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH),
 642         DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH),
 643         DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH),
 644         DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH),
 645         DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH),
 646         DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH),
 647         DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH),
 648         DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH),
 649         DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH),
 650         DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 651         DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH),
 652         DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH),
 653         DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH),
 654         DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH),
 655         DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH),
 656         DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH),
 657         DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 658         DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH),
 659         DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH),
 660         DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH),
 661         DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH),
 662         DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH),
 663         /* KMS */
 664         DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 665         DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED),
 666         DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED),
 667         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED),
 668         DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED),
 669         DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED),
 670         DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED),
 671         DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED),
 672         DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED),
 673         DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 674         DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED),
 675         DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED),
 676         DRM_IOCTL_DEF_DRV(RADEON_GEM_VA, radeon_gem_va_ioctl, DRM_AUTH|DRM_UNLOCKED),
 677 };
 678 int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);