drivers/gpu/drm/rcar-du/rcar_du_kms.c

   1 /*
   2  * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
   3  *
   4  * Copyright (C) 2013-2015 Renesas Electronics Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <drm/drm_atomic.h>
  16 #include <drm/drm_atomic_helper.h>
  17 #include <drm/drm_crtc.h>
  18 #include <drm/drm_crtc_helper.h>
  19 #include <drm/drm_fb_cma_helper.h>
  20 #include <drm/drm_gem_cma_helper.h>
  21 #include <drm/drm_gem_framebuffer_helper.h>
  22
  23 #include <linux/of_graph.h>
  24 #include <linux/wait.h>
  25
  26 #include "rcar_du_crtc.h"
  27 #include "rcar_du_drv.h"
  28 #include "rcar_du_encoder.h"
  29 #include "rcar_du_kms.h"
  30 #include "rcar_du_lvdsenc.h"
  31 #include "rcar_du_regs.h"
  32 #include "rcar_du_vsp.h"
  33
  34 /* -----------------------------------------------------------------------------
  35  * Format helpers
  36  */
  37
  38 static const struct rcar_du_format_info rcar_du_format_infos[] = {
  39         {
  40                 .fourcc = DRM_FORMAT_RGB565,
  41                 .bpp = 16,
  42                 .planes = 1,
  43                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  44                 .edf = PnDDCR4_EDF_NONE,
  45         }, {
  46                 .fourcc = DRM_FORMAT_ARGB1555,
  47                 .bpp = 16,
  48                 .planes = 1,
  49                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  50                 .edf = PnDDCR4_EDF_NONE,
  51         }, {
  52                 .fourcc = DRM_FORMAT_XRGB1555,
  53                 .bpp = 16,
  54                 .planes = 1,
  55                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  56                 .edf = PnDDCR4_EDF_NONE,
  57         }, {
  58                 .fourcc = DRM_FORMAT_XRGB8888,
  59                 .bpp = 32,
  60                 .planes = 1,
  61                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  62                 .edf = PnDDCR4_EDF_RGB888,
  63         }, {
  64                 .fourcc = DRM_FORMAT_ARGB8888,
  65                 .bpp = 32,
  66                 .planes = 1,
  67                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  68                 .edf = PnDDCR4_EDF_ARGB8888,
  69         }, {
  70                 .fourcc = DRM_FORMAT_UYVY,
  71                 .bpp = 16,
  72                 .planes = 1,
  73                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  74                 .edf = PnDDCR4_EDF_NONE,
  75         }, {
  76                 .fourcc = DRM_FORMAT_YUYV,
  77                 .bpp = 16,
  78                 .planes = 1,
  79                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  80                 .edf = PnDDCR4_EDF_NONE,
  81         }, {
  82                 .fourcc = DRM_FORMAT_NV12,
  83                 .bpp = 12,
  84                 .planes = 2,
  85                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  86                 .edf = PnDDCR4_EDF_NONE,
  87         }, {
  88                 .fourcc = DRM_FORMAT_NV21,
  89                 .bpp = 12,
  90                 .planes = 2,
  91                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  92                 .edf = PnDDCR4_EDF_NONE,
  93         }, {
  94                 .fourcc = DRM_FORMAT_NV16,
  95                 .bpp = 16,
  96                 .planes = 2,
  97                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  98                 .edf = PnDDCR4_EDF_NONE,
  99         },
 100         /*
 101          * The following formats are not supported on Gen2 and thus have no
 102          * associated .pnmr or .edf settings.
 103          */
 104         {
 105                 .fourcc = DRM_FORMAT_NV61,
 106                 .bpp = 16,
 107                 .planes = 2,
 108         }, {
 109                 .fourcc = DRM_FORMAT_YUV420,
 110                 .bpp = 12,
 111                 .planes = 3,
 112         }, {
 113                 .fourcc = DRM_FORMAT_YVU420,
 114                 .bpp = 12,
 115                 .planes = 3,
 116         }, {
 117                 .fourcc = DRM_FORMAT_YUV422,
 118                 .bpp = 16,
 119                 .planes = 3,
 120         }, {
 121                 .fourcc = DRM_FORMAT_YVU422,
 122                 .bpp = 16,
 123                 .planes = 3,
 124         }, {
 125                 .fourcc = DRM_FORMAT_YUV444,
 126                 .bpp = 24,
 127                 .planes = 3,
 128         }, {
 129                 .fourcc = DRM_FORMAT_YVU444,
 130                 .bpp = 24,
 131                 .planes = 3,
 132         },
 133 };
 134
 135 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
 136 {
 137         unsigned int i;
 138
 139         for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
 140                 if (rcar_du_format_infos[i].fourcc == fourcc)
 141                         return &rcar_du_format_infos[i];
 142         }
 143
 144         return NULL;
 145 }
 146
 147 /* -----------------------------------------------------------------------------
 148  * Frame buffer
 149  */
 150
 151 int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
 152                         struct drm_mode_create_dumb *args)
 153 {
 154         struct rcar_du_device *rcdu = dev->dev_private;
 155         unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
 156         unsigned int align;
 157
 158         /*
 159          * The R8A7779 DU requires a 16 pixels pitch alignment as documented,
 160          * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
 161          */
 162         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 163                 align = 128;
 164         else
 165                 align = 16 * args->bpp / 8;
 166
 167         args->pitch = roundup(min_pitch, align);
 168
 169         return drm_gem_cma_dumb_create_internal(file, dev, args);
 170 }
 171
 172 static struct drm_framebuffer *
 173 rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 174                   const struct drm_mode_fb_cmd2 *mode_cmd)
 175 {
 176         struct rcar_du_device *rcdu = dev->dev_private;
 177         const struct rcar_du_format_info *format;
 178         unsigned int max_pitch;
 179         unsigned int align;
 180         unsigned int bpp;
 181         unsigned int i;
 182
 183         format = rcar_du_format_info(mode_cmd->pixel_format);
 184         if (format == NULL) {
 185                 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
 186                         mode_cmd->pixel_format);
 187                 return ERR_PTR(-EINVAL);
 188         }
 189
 190         /*
 191          * The pitch and alignment constraints are expressed in pixels on the
 192          * hardware side and in bytes in the DRM API.
 193          */
 194         bpp = format->planes == 1 ? format->bpp / 8 : 1;
 195         max_pitch =  4096 * bpp;
 196
 197         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 198                 align = 128;
 199         else
 200                 align = 16 * bpp;
 201
 202         if (mode_cmd->pitches[0] & (align - 1) ||
 203             mode_cmd->pitches[0] >= max_pitch) {
 204                 dev_dbg(dev->dev, "invalid pitch value %u\n",
 205                         mode_cmd->pitches[0]);
 206                 return ERR_PTR(-EINVAL);
 207         }
 208
 209         for (i = 1; i < format->planes; ++i) {
 210                 if (mode_cmd->pitches[i] != mode_cmd->pitches[0]) {
 211                         dev_dbg(dev->dev,
 212                                 "luma and chroma pitches do not match\n");
 213                         return ERR_PTR(-EINVAL);
 214                 }
 215         }
 216
 217         return drm_gem_fb_create(dev, file_priv, mode_cmd);
 218 }
 219
 220 static void rcar_du_output_poll_changed(struct drm_device *dev)
 221 {
 222         struct rcar_du_device *rcdu = dev->dev_private;
 223
 224         drm_fbdev_cma_hotplug_event(rcdu->fbdev);
 225 }
 226
 227 /* -----------------------------------------------------------------------------
 228  * Atomic Check and Update
 229  */
 230
 231 static int rcar_du_atomic_check(struct drm_device *dev,
 232                                 struct drm_atomic_state *state)
 233 {
 234         struct rcar_du_device *rcdu = dev->dev_private;
 235         int ret;
 236
 237         ret = drm_atomic_helper_check_modeset(dev, state);
 238         if (ret)
 239                 return ret;
 240
 241         ret = drm_atomic_normalize_zpos(dev, state);
 242         if (ret)
 243                 return ret;
 244
 245         ret = drm_atomic_helper_check_planes(dev, state);
 246         if (ret)
 247                 return ret;
 248
 249         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE))
 250                 return 0;
 251
 252         return rcar_du_atomic_check_planes(dev, state);
 253 }
 254
 255 static void rcar_du_atomic_commit_tail(struct drm_atomic_state *old_state)
 256 {
 257         struct drm_device *dev = old_state->dev;
 258
 259         /* Apply the atomic update. */
 260         drm_atomic_helper_commit_modeset_disables(dev, old_state);
 261         drm_atomic_helper_commit_planes(dev, old_state,
 262                                         DRM_PLANE_COMMIT_ACTIVE_ONLY);
 263         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 264
 265         drm_atomic_helper_commit_hw_done(old_state);
 266         drm_atomic_helper_wait_for_flip_done(dev, old_state);
 267
 268         drm_atomic_helper_cleanup_planes(dev, old_state);
 269 }
 270
 271 /* -----------------------------------------------------------------------------
 272  * Initialization
 273  */
 274
 275 static const struct drm_mode_config_helper_funcs rcar_du_mode_config_helper = {
 276         .atomic_commit_tail = rcar_du_atomic_commit_tail,
 277 };
 278
 279 static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
 280         .fb_create = rcar_du_fb_create,
 281         .output_poll_changed = rcar_du_output_poll_changed,
 282         .atomic_check = rcar_du_atomic_check,
 283         .atomic_commit = drm_atomic_helper_commit,
 284 };
 285
 286 static int rcar_du_encoders_init_one(struct rcar_du_device *rcdu,
 287                                      enum rcar_du_output output,
 288                                      struct of_endpoint *ep)
 289 {
 290         struct device_node *connector = NULL;
 291         struct device_node *encoder = NULL;
 292         struct device_node *ep_node = NULL;
 293         struct device_node *entity_ep_node;
 294         struct device_node *entity;
 295         int ret;
 296
 297         /*
 298          * Locate the connected entity and infer its type from the number of
 299          * endpoints.
 300          */
 301         entity = of_graph_get_remote_port_parent(ep->local_node);
 302         if (!entity) {
 303                 dev_dbg(rcdu->dev, "unconnected endpoint %pOF, skipping\n",
 304                         ep->local_node);
 305                 return -ENODEV;
 306         }
 307
 308         if (!of_device_is_available(entity)) {
 309                 dev_dbg(rcdu->dev,
 310                         "connected entity %pOF is disabled, skipping\n",
 311                         entity);
 312                 return -ENODEV;
 313         }
 314
 315         entity_ep_node = of_graph_get_remote_endpoint(ep->local_node);
 316
 317         for_each_endpoint_of_node(entity, ep_node) {
 318                 if (ep_node == entity_ep_node)
 319                         continue;
 320
 321                 /*
 322                  * We've found one endpoint other than the input, this must
 323                  * be an encoder. Locate the connector.
 324                  */
 325                 encoder = entity;
 326                 connector = of_graph_get_remote_port_parent(ep_node);
 327                 of_node_put(ep_node);
 328
 329                 if (!connector) {
 330                         dev_warn(rcdu->dev,
 331                                  "no connector for encoder %pOF, skipping\n",
 332                                  encoder);
 333                         of_node_put(entity_ep_node);
 334                         of_node_put(encoder);
 335                         return -ENODEV;
 336                 }
 337
 338                 break;
 339         }
 340
 341         of_node_put(entity_ep_node);
 342
 343         if (!encoder) {
 344                 /*
 345                  * If no encoder has been found the entity must be the
 346                  * connector.
 347                  */
 348                 connector = entity;
 349         }
 350
 351         ret = rcar_du_encoder_init(rcdu, output, encoder, connector);
 352         if (ret && ret != -EPROBE_DEFER)
 353                 dev_warn(rcdu->dev,
 354                          "failed to initialize encoder %pOF on output %u (%d), skipping\n",
 355                          encoder, output, ret);
 356
 357         of_node_put(encoder);
 358         of_node_put(connector);
 359
 360         return ret;
 361 }
 362
 363 static int rcar_du_encoders_init(struct rcar_du_device *rcdu)
 364 {
 365         struct device_node *np = rcdu->dev->of_node;
 366         struct device_node *ep_node;
 367         unsigned int num_encoders = 0;
 368
 369         /*
 370          * Iterate over the endpoints and create one encoder for each output
 371          * pipeline.
 372          */
 373         for_each_endpoint_of_node(np, ep_node) {
 374                 enum rcar_du_output output;
 375                 struct of_endpoint ep;
 376                 unsigned int i;
 377                 int ret;
 378
 379                 ret = of_graph_parse_endpoint(ep_node, &ep);
 380                 if (ret < 0) {
 381                         of_node_put(ep_node);
 382                         return ret;
 383                 }
 384
 385                 /* Find the output route corresponding to the port number. */
 386                 for (i = 0; i < RCAR_DU_OUTPUT_MAX; ++i) {
 387                         if (rcdu->info->routes[i].possible_crtcs &&
 388                             rcdu->info->routes[i].port == ep.port) {
 389                                 output = i;
 390                                 break;
 391                         }
 392                 }
 393
 394                 if (i == RCAR_DU_OUTPUT_MAX) {
 395                         dev_warn(rcdu->dev,
 396                                  "port %u references unexisting output, skipping\n",
 397                                  ep.port);
 398                         continue;
 399                 }
 400
 401                 /* Process the output pipeline. */
 402                 ret = rcar_du_encoders_init_one(rcdu, output, &ep);
 403                 if (ret < 0) {
 404                         if (ret == -EPROBE_DEFER) {
 405                                 of_node_put(ep_node);
 406                                 return ret;
 407                         }
 408
 409                         continue;
 410                 }
 411
 412                 num_encoders++;
 413         }
 414
 415         return num_encoders;
 416 }
 417
 418 static int rcar_du_properties_init(struct rcar_du_device *rcdu)
 419 {
 420         rcdu->props.alpha =
 421                 drm_property_create_range(rcdu->ddev, 0, "alpha", 0, 255);
 422         if (rcdu->props.alpha == NULL)
 423                 return -ENOMEM;
 424
 425         /*
 426          * The color key is expressed as an RGB888 triplet stored in a 32-bit
 427          * integer in XRGB8888 format. Bit 24 is used as a flag to disable (0)
 428          * or enable source color keying (1).
 429          */
 430         rcdu->props.colorkey =
 431                 drm_property_create_range(rcdu->ddev, 0, "colorkey",
 432                                           0, 0x01ffffff);
 433         if (rcdu->props.colorkey == NULL)
 434                 return -ENOMEM;
 435
 436         return 0;
 437 }
 438
 439 static int rcar_du_vsps_init(struct rcar_du_device *rcdu)
 440 {
 441         const struct device_node *np = rcdu->dev->of_node;
 442         struct of_phandle_args args;
 443         struct {
 444                 struct device_node *np;
 445                 unsigned int crtcs_mask;
 446         } vsps[RCAR_DU_MAX_VSPS] = { { 0, }, };
 447         unsigned int vsps_count = 0;
 448         unsigned int cells;
 449         unsigned int i;
 450         int ret;
 451
 452         /*
 453          * First parse the DT vsps property to populate the list of VSPs. Each
 454          * entry contains a pointer to the VSP DT node and a bitmask of the
 455          * connected DU CRTCs.
 456          */
 457         cells = of_property_count_u32_elems(np, "vsps") / rcdu->num_crtcs - 1;
 458         if (cells > 1)
 459                 return -EINVAL;
 460
 461         for (i = 0; i < rcdu->num_crtcs; ++i) {
 462                 unsigned int j;
 463
 464                 ret = of_parse_phandle_with_fixed_args(np, "vsps", cells, i,
 465                                                        &args);
 466                 if (ret < 0)
 467                         goto error;
 468
 469                 /*
 470                  * Add the VSP to the list or update the corresponding existing
 471                  * entry if the VSP has already been added.
 472                  */
 473                 for (j = 0; j < vsps_count; ++j) {
 474                         if (vsps[j].np == args.np)
 475                                 break;
 476                 }
 477
 478                 if (j < vsps_count)
 479                         of_node_put(args.np);
 480                 else
 481                         vsps[vsps_count++].np = args.np;
 482
 483                 vsps[j].crtcs_mask |= BIT(i);
 484
 485                 /* Store the VSP pointer and pipe index in the CRTC. */
 486                 rcdu->crtcs[i].vsp = &rcdu->vsps[j];
 487                 rcdu->crtcs[i].vsp_pipe = cells >= 1 ? args.args[0] : 0;
 488         }
 489
 490         /*
 491          * Then initialize all the VSPs from the node pointers and CRTCs bitmask
 492          * computed previously.
 493          */
 494         for (i = 0; i < vsps_count; ++i) {
 495                 struct rcar_du_vsp *vsp = &rcdu->vsps[i];
 496
 497                 vsp->index = i;
 498                 vsp->dev = rcdu;
 499
 500                 ret = rcar_du_vsp_init(vsp, vsps[i].np, vsps[i].crtcs_mask);
 501                 if (ret < 0)
 502                         goto error;
 503         }
 504
 505         return 0;
 506
 507 error:
 508         for (i = 0; i < ARRAY_SIZE(vsps); ++i)
 509                 of_node_put(vsps[i].np);
 510
 511         return ret;
 512 }
 513
 514 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 515 {
 516         static const unsigned int mmio_offsets[] = {
 517                 DU0_REG_OFFSET, DU2_REG_OFFSET
 518         };
 519
 520         struct drm_device *dev = rcdu->ddev;
 521         struct drm_encoder *encoder;
 522         struct drm_fbdev_cma *fbdev;
 523         unsigned int num_encoders;
 524         unsigned int num_groups;
 525         unsigned int i;
 526         int ret;
 527
 528         drm_mode_config_init(dev);
 529
 530         dev->mode_config.min_width = 0;
 531         dev->mode_config.min_height = 0;
 532         dev->mode_config.max_width = 4095;
 533         dev->mode_config.max_height = 2047;
 534         dev->mode_config.funcs = &rcar_du_mode_config_funcs;
 535         dev->mode_config.helper_private = &rcar_du_mode_config_helper;
 536
 537         rcdu->num_crtcs = rcdu->info->num_crtcs;
 538
 539         ret = rcar_du_properties_init(rcdu);
 540         if (ret < 0)
 541                 return ret;
 542
 543         /*
 544          * Initialize vertical blanking interrupts handling. Start with vblank
 545          * disabled for all CRTCs.
 546          */
 547         ret = drm_vblank_init(dev, (1 << rcdu->info->num_crtcs) - 1);
 548         if (ret < 0)
 549                 return ret;
 550
 551         /* Initialize the groups. */
 552         num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
 553
 554         for (i = 0; i < num_groups; ++i) {
 555                 struct rcar_du_group *rgrp = &rcdu->groups[i];
 556
 557                 mutex_init(&rgrp->lock);
 558
 559                 rgrp->dev = rcdu;
 560                 rgrp->mmio_offset = mmio_offsets[i];
 561                 rgrp->index = i;
 562                 rgrp->num_crtcs = min(rcdu->num_crtcs - 2 * i, 2U);
 563
 564                 /*
 565                  * If we have more than one CRTCs in this group pre-associate
 566                  * the low-order planes with CRTC 0 and the high-order planes
 567                  * with CRTC 1 to minimize flicker occurring when the
 568                  * association is changed.
 569                  */
 570                 rgrp->dptsr_planes = rgrp->num_crtcs > 1
 571                                    ? (rcdu->info->gen >= 3 ? 0x04 : 0xf0)
 572                                    : 0;
 573
 574                 if (!rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 575                         ret = rcar_du_planes_init(rgrp);
 576                         if (ret < 0)
 577                                 return ret;
 578                 }
 579         }
 580
 581         /* Initialize the compositors. */
 582         if (rcar_du_has(rcdu, RCAR_DU_FEATURE_VSP1_SOURCE)) {
 583                 ret = rcar_du_vsps_init(rcdu);
 584                 if (ret < 0)
 585                         return ret;
 586         }
 587
 588         /* Create the CRTCs. */
 589         for (i = 0; i < rcdu->num_crtcs; ++i) {
 590                 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
 591
 592                 ret = rcar_du_crtc_create(rgrp, i);
 593                 if (ret < 0)
 594                         return ret;
 595         }
 596
 597         /* Initialize the encoders. */
 598         ret = rcar_du_lvdsenc_init(rcdu);
 599         if (ret < 0)
 600                 return ret;
 601
 602         ret = rcar_du_encoders_init(rcdu);
 603         if (ret < 0)
 604                 return ret;
 605
 606         if (ret == 0) {
 607                 dev_err(rcdu->dev, "error: no encoder could be initialized\n");
 608                 return -EINVAL;
 609         }
 610
 611         num_encoders = ret;
 612
 613         /*
 614          * Set the possible CRTCs and possible clones. There's always at least
 615          * one way for all encoders to clone each other, set all bits in the
 616          * possible clones field.
 617          */
 618         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 619                 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
 620                 const struct rcar_du_output_routing *route =
 621                         &rcdu->info->routes[renc->output];
 622
 623                 encoder->possible_crtcs = route->possible_crtcs;
 624                 encoder->possible_clones = (1 << num_encoders) - 1;
 625         }
 626
 627         drm_mode_config_reset(dev);
 628
 629         drm_kms_helper_poll_init(dev);
 630
 631         if (dev->mode_config.num_connector) {
 632                 fbdev = drm_fbdev_cma_init(dev, 32,
 633                                            dev->mode_config.num_connector);
 634                 if (IS_ERR(fbdev))
 635                         return PTR_ERR(fbdev);
 636
 637                 rcdu->fbdev = fbdev;
 638         } else {
 639                 dev_info(rcdu->dev,
 640                          "no connector found, disabling fbdev emulation\n");
 641         }
 642
 643         return 0;
 644 }