drivers/gpu/drm/rcar-du/rcar_du_kms.c

   1 /*
   2  * rcar_du_kms.c  --  R-Car Display Unit Mode Setting
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <drm/drmP.h>
  15 #include <drm/drm_crtc.h>
  16 #include <drm/drm_crtc_helper.h>
  17 #include <drm/drm_fb_cma_helper.h>
  18 #include <drm/drm_gem_cma_helper.h>
  19
  20 #include "rcar_du_crtc.h"
  21 #include "rcar_du_drv.h"
  22 #include "rcar_du_encoder.h"
  23 #include "rcar_du_kms.h"
  24 #include "rcar_du_lvdsenc.h"
  25 #include "rcar_du_regs.h"
  26
  27 /* -----------------------------------------------------------------------------
  28  * Format helpers
  29  */
  30
  31 static const struct rcar_du_format_info rcar_du_format_infos[] = {
  32         {
  33                 .fourcc = DRM_FORMAT_RGB565,
  34                 .bpp = 16,
  35                 .planes = 1,
  36                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  37                 .edf = PnDDCR4_EDF_NONE,
  38         }, {
  39                 .fourcc = DRM_FORMAT_ARGB1555,
  40                 .bpp = 16,
  41                 .planes = 1,
  42                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  43                 .edf = PnDDCR4_EDF_NONE,
  44         }, {
  45                 .fourcc = DRM_FORMAT_XRGB1555,
  46                 .bpp = 16,
  47                 .planes = 1,
  48                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_ARGB,
  49                 .edf = PnDDCR4_EDF_NONE,
  50         }, {
  51                 .fourcc = DRM_FORMAT_XRGB8888,
  52                 .bpp = 32,
  53                 .planes = 1,
  54                 .pnmr = PnMR_SPIM_TP | PnMR_DDDF_16BPP,
  55                 .edf = PnDDCR4_EDF_RGB888,
  56         }, {
  57                 .fourcc = DRM_FORMAT_ARGB8888,
  58                 .bpp = 32,
  59                 .planes = 1,
  60                 .pnmr = PnMR_SPIM_ALP | PnMR_DDDF_16BPP,
  61                 .edf = PnDDCR4_EDF_ARGB8888,
  62         }, {
  63                 .fourcc = DRM_FORMAT_UYVY,
  64                 .bpp = 16,
  65                 .planes = 1,
  66                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  67                 .edf = PnDDCR4_EDF_NONE,
  68         }, {
  69                 .fourcc = DRM_FORMAT_YUYV,
  70                 .bpp = 16,
  71                 .planes = 1,
  72                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  73                 .edf = PnDDCR4_EDF_NONE,
  74         }, {
  75                 .fourcc = DRM_FORMAT_NV12,
  76                 .bpp = 12,
  77                 .planes = 2,
  78                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  79                 .edf = PnDDCR4_EDF_NONE,
  80         }, {
  81                 .fourcc = DRM_FORMAT_NV21,
  82                 .bpp = 12,
  83                 .planes = 2,
  84                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  85                 .edf = PnDDCR4_EDF_NONE,
  86         }, {
  87                 /* In YUV 4:2:2, only NV16 is supported (NV61 isn't) */
  88                 .fourcc = DRM_FORMAT_NV16,
  89                 .bpp = 16,
  90                 .planes = 2,
  91                 .pnmr = PnMR_SPIM_TP_OFF | PnMR_DDDF_YC,
  92                 .edf = PnDDCR4_EDF_NONE,
  93         },
  94 };
  95
  96 const struct rcar_du_format_info *rcar_du_format_info(u32 fourcc)
  97 {
  98         unsigned int i;
  99
 100         for (i = 0; i < ARRAY_SIZE(rcar_du_format_infos); ++i) {
 101                 if (rcar_du_format_infos[i].fourcc == fourcc)
 102                         return &rcar_du_format_infos[i];
 103         }
 104
 105         return NULL;
 106 }
 107
 108 /* -----------------------------------------------------------------------------
 109  * Frame buffer
 110  */
 111
 112 int rcar_du_dumb_create(struct drm_file *file, struct drm_device *dev,
 113                         struct drm_mode_create_dumb *args)
 114 {
 115         struct rcar_du_device *rcdu = dev->dev_private;
 116         unsigned int min_pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
 117         unsigned int align;
 118
 119         /* The R8A7779 DU requires a 16 pixels pitch alignment as documented,
 120          * but the R8A7790 DU seems to require a 128 bytes pitch alignment.
 121          */
 122         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 123                 align = 128;
 124         else
 125                 align = 16 * args->bpp / 8;
 126
 127         args->pitch = roundup(max(args->pitch, min_pitch), align);
 128
 129         return drm_gem_cma_dumb_create(file, dev, args);
 130 }
 131
 132 static struct drm_framebuffer *
 133 rcar_du_fb_create(struct drm_device *dev, struct drm_file *file_priv,
 134                   struct drm_mode_fb_cmd2 *mode_cmd)
 135 {
 136         struct rcar_du_device *rcdu = dev->dev_private;
 137         const struct rcar_du_format_info *format;
 138         unsigned int align;
 139
 140         format = rcar_du_format_info(mode_cmd->pixel_format);
 141         if (format == NULL) {
 142                 dev_dbg(dev->dev, "unsupported pixel format %08x\n",
 143                         mode_cmd->pixel_format);
 144                 return ERR_PTR(-EINVAL);
 145         }
 146
 147         if (rcar_du_needs(rcdu, RCAR_DU_QUIRK_ALIGN_128B))
 148                 align = 128;
 149         else
 150                 align = 16 * format->bpp / 8;
 151
 152         if (mode_cmd->pitches[0] & (align - 1) ||
 153             mode_cmd->pitches[0] >= 8192) {
 154                 dev_dbg(dev->dev, "invalid pitch value %u\n",
 155                         mode_cmd->pitches[0]);
 156                 return ERR_PTR(-EINVAL);
 157         }
 158
 159         if (format->planes == 2) {
 160                 if (mode_cmd->pitches[1] != mode_cmd->pitches[0]) {
 161                         dev_dbg(dev->dev,
 162                                 "luma and chroma pitches do not match\n");
 163                         return ERR_PTR(-EINVAL);
 164                 }
 165         }
 166
 167         return drm_fb_cma_create(dev, file_priv, mode_cmd);
 168 }
 169
 170 static void rcar_du_output_poll_changed(struct drm_device *dev)
 171 {
 172         struct rcar_du_device *rcdu = dev->dev_private;
 173
 174         drm_fbdev_cma_hotplug_event(rcdu->fbdev);
 175 }
 176
 177 static const struct drm_mode_config_funcs rcar_du_mode_config_funcs = {
 178         .fb_create = rcar_du_fb_create,
 179         .output_poll_changed = rcar_du_output_poll_changed,
 180 };
 181
 182 int rcar_du_modeset_init(struct rcar_du_device *rcdu)
 183 {
 184         static const unsigned int mmio_offsets[] = {
 185                 DU0_REG_OFFSET, DU2_REG_OFFSET
 186         };
 187
 188         struct drm_device *dev = rcdu->ddev;
 189         struct drm_encoder *encoder;
 190         struct drm_fbdev_cma *fbdev;
 191         unsigned int num_groups;
 192         unsigned int i;
 193         int ret;
 194
 195         drm_mode_config_init(dev);
 196
 197         dev->mode_config.min_width = 0;
 198         dev->mode_config.min_height = 0;
 199         dev->mode_config.max_width = 4095;
 200         dev->mode_config.max_height = 2047;
 201         dev->mode_config.funcs = &rcar_du_mode_config_funcs;
 202
 203         rcdu->num_crtcs = rcdu->info->num_crtcs;
 204
 205         /* Initialize the groups. */
 206         num_groups = DIV_ROUND_UP(rcdu->num_crtcs, 2);
 207
 208         for (i = 0; i < num_groups; ++i) {
 209                 struct rcar_du_group *rgrp = &rcdu->groups[i];
 210
 211                 rgrp->dev = rcdu;
 212                 rgrp->mmio_offset = mmio_offsets[i];
 213                 rgrp->index = i;
 214
 215                 ret = rcar_du_planes_init(rgrp);
 216                 if (ret < 0)
 217                         return ret;
 218         }
 219
 220         /* Create the CRTCs. */
 221         for (i = 0; i < rcdu->num_crtcs; ++i) {
 222                 struct rcar_du_group *rgrp = &rcdu->groups[i / 2];
 223
 224                 ret = rcar_du_crtc_create(rgrp, i);
 225                 if (ret < 0)
 226                         return ret;
 227         }
 228
 229         /* Initialize the encoders. */
 230         ret = rcar_du_lvdsenc_init(rcdu);
 231         if (ret < 0)
 232                 return ret;
 233
 234         for (i = 0; i < rcdu->pdata->num_encoders; ++i) {
 235                 const struct rcar_du_encoder_data *pdata =
 236                         &rcdu->pdata->encoders[i];
 237                 const struct rcar_du_output_routing *route =
 238                         &rcdu->info->routes[pdata->output];
 239
 240                 if (pdata->type == RCAR_DU_ENCODER_UNUSED)
 241                         continue;
 242
 243                 if (pdata->output >= RCAR_DU_OUTPUT_MAX ||
 244                     route->possible_crtcs == 0) {
 245                         dev_warn(rcdu->dev,
 246                                  "encoder %u references unexisting output %u, skipping\n",
 247                                  i, pdata->output);
 248                         continue;
 249                 }
 250
 251                 rcar_du_encoder_init(rcdu, pdata->type, pdata->output, pdata);
 252         }
 253
 254         /* Set the possible CRTCs and possible clones. There's always at least
 255          * one way for all encoders to clone each other, set all bits in the
 256          * possible clones field.
 257          */
 258         list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
 259                 struct rcar_du_encoder *renc = to_rcar_encoder(encoder);
 260                 const struct rcar_du_output_routing *route =
 261                         &rcdu->info->routes[renc->output];
 262
 263                 encoder->possible_crtcs = route->possible_crtcs;
 264                 encoder->possible_clones = (1 << rcdu->pdata->num_encoders) - 1;
 265         }
 266
 267         /* Now that the CRTCs have been initialized register the planes. */
 268         for (i = 0; i < num_groups; ++i) {
 269                 ret = rcar_du_planes_register(&rcdu->groups[i]);
 270                 if (ret < 0)
 271                         return ret;
 272         }
 273
 274         drm_kms_helper_poll_init(dev);
 275
 276         drm_helper_disable_unused_functions(dev);
 277
 278         fbdev = drm_fbdev_cma_init(dev, 32, dev->mode_config.num_crtc,
 279                                    dev->mode_config.num_connector);
 280         if (IS_ERR(fbdev))
 281                 return PTR_ERR(fbdev);
 282
 283 #ifndef CONFIG_FRAMEBUFFER_CONSOLE
 284         drm_fbdev_cma_restore_mode(fbdev);
 285 #endif
 286
 287         rcdu->fbdev = fbdev;
 288
 289         return 0;
 290 }