]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/gpu/drm/sti/sti_mixer.c
Merge branch 'tc_action-fixes'
[mirror_ubuntu-artful-kernel.git] / drivers / gpu / drm / sti / sti_mixer.c
1 /*
2 * Copyright (C) STMicroelectronics SA 2014
3 * Authors: Benjamin Gaignard <benjamin.gaignard@st.com>
4 * Fabien Dessenne <fabien.dessenne@st.com>
5 * for STMicroelectronics.
6 * License terms: GNU General Public License (GPL), version 2
7 */
8 #include <linux/seq_file.h>
9
10 #include "sti_compositor.h"
11 #include "sti_mixer.h"
12 #include "sti_vtg.h"
13
14 /* Module parameter to set the background color of the mixer */
15 static unsigned int bkg_color = 0x000000;
16 MODULE_PARM_DESC(bkgcolor, "Value of the background color 0xRRGGBB");
17 module_param_named(bkgcolor, bkg_color, int, 0644);
18
19 /* Identity: G=Y , B=Cb , R=Cr */
20 static const u32 mixerColorSpaceMatIdentity[] = {
21 0x10000000, 0x00000000, 0x10000000, 0x00001000,
22 0x00000000, 0x00000000, 0x00000000, 0x00000000
23 };
24
25 /* regs offset */
26 #define GAM_MIXER_CTL 0x00
27 #define GAM_MIXER_BKC 0x04
28 #define GAM_MIXER_BCO 0x0C
29 #define GAM_MIXER_BCS 0x10
30 #define GAM_MIXER_AVO 0x28
31 #define GAM_MIXER_AVS 0x2C
32 #define GAM_MIXER_CRB 0x34
33 #define GAM_MIXER_ACT 0x38
34 #define GAM_MIXER_MBP 0x3C
35 #define GAM_MIXER_MX0 0x80
36
37 /* id for depth of CRB reg */
38 #define GAM_DEPTH_VID0_ID 1
39 #define GAM_DEPTH_VID1_ID 2
40 #define GAM_DEPTH_GDP0_ID 3
41 #define GAM_DEPTH_GDP1_ID 4
42 #define GAM_DEPTH_GDP2_ID 5
43 #define GAM_DEPTH_GDP3_ID 6
44 #define GAM_DEPTH_MASK_ID 7
45
46 /* mask in CTL reg */
47 #define GAM_CTL_BACK_MASK BIT(0)
48 #define GAM_CTL_VID0_MASK BIT(1)
49 #define GAM_CTL_VID1_MASK BIT(2)
50 #define GAM_CTL_GDP0_MASK BIT(3)
51 #define GAM_CTL_GDP1_MASK BIT(4)
52 #define GAM_CTL_GDP2_MASK BIT(5)
53 #define GAM_CTL_GDP3_MASK BIT(6)
54 #define GAM_CTL_CURSOR_MASK BIT(9)
55
56 const char *sti_mixer_to_str(struct sti_mixer *mixer)
57 {
58 switch (mixer->id) {
59 case STI_MIXER_MAIN:
60 return "MAIN_MIXER";
61 case STI_MIXER_AUX:
62 return "AUX_MIXER";
63 default:
64 return "<UNKNOWN MIXER>";
65 }
66 }
67
68 static inline u32 sti_mixer_reg_read(struct sti_mixer *mixer, u32 reg_id)
69 {
70 return readl(mixer->regs + reg_id);
71 }
72
73 static inline void sti_mixer_reg_write(struct sti_mixer *mixer,
74 u32 reg_id, u32 val)
75 {
76 writel(val, mixer->regs + reg_id);
77 }
78
79 #define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
80 sti_mixer_reg_read(mixer, reg))
81
82 static void mixer_dbg_ctl(struct seq_file *s, int val)
83 {
84 unsigned int i;
85 int count = 0;
86 char *const disp_layer[] = {"BKG", "VID0", "VID1", "GDP0",
87 "GDP1", "GDP2", "GDP3"};
88
89 seq_puts(s, "\tEnabled: ");
90 for (i = 0; i < 7; i++) {
91 if (val & 1) {
92 seq_printf(s, "%s ", disp_layer[i]);
93 count++;
94 }
95 val = val >> 1;
96 }
97
98 val = val >> 2;
99 if (val & 1) {
100 seq_puts(s, "CURS ");
101 count++;
102 }
103 if (!count)
104 seq_puts(s, "Nothing");
105 }
106
107 static void mixer_dbg_crb(struct seq_file *s, int val)
108 {
109 int i;
110
111 seq_puts(s, "\tDepth: ");
112 for (i = 0; i < GAM_MIXER_NB_DEPTH_LEVEL; i++) {
113 switch (val & GAM_DEPTH_MASK_ID) {
114 case GAM_DEPTH_VID0_ID:
115 seq_puts(s, "VID0");
116 break;
117 case GAM_DEPTH_VID1_ID:
118 seq_puts(s, "VID1");
119 break;
120 case GAM_DEPTH_GDP0_ID:
121 seq_puts(s, "GDP0");
122 break;
123 case GAM_DEPTH_GDP1_ID:
124 seq_puts(s, "GDP1");
125 break;
126 case GAM_DEPTH_GDP2_ID:
127 seq_puts(s, "GDP2");
128 break;
129 case GAM_DEPTH_GDP3_ID:
130 seq_puts(s, "GDP3");
131 break;
132 default:
133 seq_puts(s, "---");
134 }
135
136 if (i < GAM_MIXER_NB_DEPTH_LEVEL - 1)
137 seq_puts(s, " < ");
138 val = val >> 3;
139 }
140 }
141
142 static void mixer_dbg_mxn(struct seq_file *s, void *addr)
143 {
144 int i;
145
146 for (i = 1; i < 8; i++)
147 seq_printf(s, "-0x%08X", (int)readl(addr + i * 4));
148 }
149
150 static int mixer_dbg_show(struct seq_file *s, void *arg)
151 {
152 struct drm_info_node *node = s->private;
153 struct sti_mixer *mixer = (struct sti_mixer *)node->info_ent->data;
154
155 seq_printf(s, "%s: (vaddr = 0x%p)",
156 sti_mixer_to_str(mixer), mixer->regs);
157
158 DBGFS_DUMP(GAM_MIXER_CTL);
159 mixer_dbg_ctl(s, sti_mixer_reg_read(mixer, GAM_MIXER_CTL));
160 DBGFS_DUMP(GAM_MIXER_BKC);
161 DBGFS_DUMP(GAM_MIXER_BCO);
162 DBGFS_DUMP(GAM_MIXER_BCS);
163 DBGFS_DUMP(GAM_MIXER_AVO);
164 DBGFS_DUMP(GAM_MIXER_AVS);
165 DBGFS_DUMP(GAM_MIXER_CRB);
166 mixer_dbg_crb(s, sti_mixer_reg_read(mixer, GAM_MIXER_CRB));
167 DBGFS_DUMP(GAM_MIXER_ACT);
168 DBGFS_DUMP(GAM_MIXER_MBP);
169 DBGFS_DUMP(GAM_MIXER_MX0);
170 mixer_dbg_mxn(s, mixer->regs + GAM_MIXER_MX0);
171 seq_puts(s, "\n");
172
173 return 0;
174 }
175
176 static struct drm_info_list mixer0_debugfs_files[] = {
177 { "mixer_main", mixer_dbg_show, 0, NULL },
178 };
179
180 static struct drm_info_list mixer1_debugfs_files[] = {
181 { "mixer_aux", mixer_dbg_show, 0, NULL },
182 };
183
184 int sti_mixer_debugfs_init(struct sti_mixer *mixer, struct drm_minor *minor)
185 {
186 unsigned int i;
187 struct drm_info_list *mixer_debugfs_files;
188 int nb_files;
189
190 switch (mixer->id) {
191 case STI_MIXER_MAIN:
192 mixer_debugfs_files = mixer0_debugfs_files;
193 nb_files = ARRAY_SIZE(mixer0_debugfs_files);
194 break;
195 case STI_MIXER_AUX:
196 mixer_debugfs_files = mixer1_debugfs_files;
197 nb_files = ARRAY_SIZE(mixer1_debugfs_files);
198 break;
199 default:
200 return -EINVAL;
201 }
202
203 for (i = 0; i < nb_files; i++)
204 mixer_debugfs_files[i].data = mixer;
205
206 return drm_debugfs_create_files(mixer_debugfs_files,
207 nb_files,
208 minor->debugfs_root, minor);
209 }
210
211 void sti_mixer_set_background_status(struct sti_mixer *mixer, bool enable)
212 {
213 u32 val = sti_mixer_reg_read(mixer, GAM_MIXER_CTL);
214
215 val &= ~GAM_CTL_BACK_MASK;
216 val |= enable;
217 sti_mixer_reg_write(mixer, GAM_MIXER_CTL, val);
218 }
219
220 static void sti_mixer_set_background_color(struct sti_mixer *mixer,
221 unsigned int rgb)
222 {
223 sti_mixer_reg_write(mixer, GAM_MIXER_BKC, rgb);
224 }
225
226 static void sti_mixer_set_background_area(struct sti_mixer *mixer,
227 struct drm_display_mode *mode)
228 {
229 u32 ydo, xdo, yds, xds;
230
231 ydo = sti_vtg_get_line_number(*mode, 0);
232 yds = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
233 xdo = sti_vtg_get_pixel_number(*mode, 0);
234 xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
235
236 sti_mixer_reg_write(mixer, GAM_MIXER_BCO, ydo << 16 | xdo);
237 sti_mixer_reg_write(mixer, GAM_MIXER_BCS, yds << 16 | xds);
238 }
239
240 int sti_mixer_set_plane_depth(struct sti_mixer *mixer, struct sti_plane *plane)
241 {
242 int plane_id, depth = plane->zorder;
243 unsigned int i;
244 u32 mask, val;
245
246 if ((depth < 1) || (depth > GAM_MIXER_NB_DEPTH_LEVEL))
247 return 1;
248
249 switch (plane->desc) {
250 case STI_GDP_0:
251 plane_id = GAM_DEPTH_GDP0_ID;
252 break;
253 case STI_GDP_1:
254 plane_id = GAM_DEPTH_GDP1_ID;
255 break;
256 case STI_GDP_2:
257 plane_id = GAM_DEPTH_GDP2_ID;
258 break;
259 case STI_GDP_3:
260 plane_id = GAM_DEPTH_GDP3_ID;
261 break;
262 case STI_HQVDP_0:
263 plane_id = GAM_DEPTH_VID0_ID;
264 break;
265 case STI_CURSOR:
266 /* no need to set depth for cursor */
267 return 0;
268 default:
269 DRM_ERROR("Unknown plane %d\n", plane->desc);
270 return 1;
271 }
272
273 /* Search if a previous depth was already assigned to the plane */
274 val = sti_mixer_reg_read(mixer, GAM_MIXER_CRB);
275 for (i = 0; i < GAM_MIXER_NB_DEPTH_LEVEL; i++) {
276 mask = GAM_DEPTH_MASK_ID << (3 * i);
277 if ((val & mask) == plane_id << (3 * i))
278 break;
279 }
280
281 mask |= GAM_DEPTH_MASK_ID << (3 * (depth - 1));
282 plane_id = plane_id << (3 * (depth - 1));
283
284 DRM_DEBUG_DRIVER("%s %s depth=%d\n", sti_mixer_to_str(mixer),
285 sti_plane_to_str(plane), depth);
286 dev_dbg(mixer->dev, "GAM_MIXER_CRB val 0x%x mask 0x%x\n",
287 plane_id, mask);
288
289 val &= ~mask;
290 val |= plane_id;
291 sti_mixer_reg_write(mixer, GAM_MIXER_CRB, val);
292
293 dev_dbg(mixer->dev, "Read GAM_MIXER_CRB 0x%x\n",
294 sti_mixer_reg_read(mixer, GAM_MIXER_CRB));
295 return 0;
296 }
297
298 int sti_mixer_active_video_area(struct sti_mixer *mixer,
299 struct drm_display_mode *mode)
300 {
301 u32 ydo, xdo, yds, xds;
302
303 ydo = sti_vtg_get_line_number(*mode, 0);
304 yds = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
305 xdo = sti_vtg_get_pixel_number(*mode, 0);
306 xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
307
308 DRM_DEBUG_DRIVER("%s active video area xdo:%d ydo:%d xds:%d yds:%d\n",
309 sti_mixer_to_str(mixer), xdo, ydo, xds, yds);
310 sti_mixer_reg_write(mixer, GAM_MIXER_AVO, ydo << 16 | xdo);
311 sti_mixer_reg_write(mixer, GAM_MIXER_AVS, yds << 16 | xds);
312
313 sti_mixer_set_background_color(mixer, bkg_color);
314
315 sti_mixer_set_background_area(mixer, mode);
316 sti_mixer_set_background_status(mixer, true);
317 return 0;
318 }
319
320 static u32 sti_mixer_get_plane_mask(struct sti_plane *plane)
321 {
322 switch (plane->desc) {
323 case STI_BACK:
324 return GAM_CTL_BACK_MASK;
325 case STI_GDP_0:
326 return GAM_CTL_GDP0_MASK;
327 case STI_GDP_1:
328 return GAM_CTL_GDP1_MASK;
329 case STI_GDP_2:
330 return GAM_CTL_GDP2_MASK;
331 case STI_GDP_3:
332 return GAM_CTL_GDP3_MASK;
333 case STI_HQVDP_0:
334 return GAM_CTL_VID0_MASK;
335 case STI_CURSOR:
336 return GAM_CTL_CURSOR_MASK;
337 default:
338 return 0;
339 }
340 }
341
342 int sti_mixer_set_plane_status(struct sti_mixer *mixer,
343 struct sti_plane *plane, bool status)
344 {
345 u32 mask, val;
346
347 DRM_DEBUG_DRIVER("%s %s %s\n", status ? "enable" : "disable",
348 sti_mixer_to_str(mixer), sti_plane_to_str(plane));
349
350 mask = sti_mixer_get_plane_mask(plane);
351 if (!mask) {
352 DRM_ERROR("Can't find layer mask\n");
353 return -EINVAL;
354 }
355
356 val = sti_mixer_reg_read(mixer, GAM_MIXER_CTL);
357 val &= ~mask;
358 val |= status ? mask : 0;
359 sti_mixer_reg_write(mixer, GAM_MIXER_CTL, val);
360
361 return 0;
362 }
363
364 void sti_mixer_set_matrix(struct sti_mixer *mixer)
365 {
366 unsigned int i;
367
368 for (i = 0; i < ARRAY_SIZE(mixerColorSpaceMatIdentity); i++)
369 sti_mixer_reg_write(mixer, GAM_MIXER_MX0 + (i * 4),
370 mixerColorSpaceMatIdentity[i]);
371 }
372
373 struct sti_mixer *sti_mixer_create(struct device *dev,
374 struct drm_device *drm_dev,
375 int id,
376 void __iomem *baseaddr)
377 {
378 struct sti_mixer *mixer = devm_kzalloc(dev, sizeof(*mixer), GFP_KERNEL);
379 struct device_node *np = dev->of_node;
380
381 dev_dbg(dev, "%s\n", __func__);
382 if (!mixer) {
383 DRM_ERROR("Failed to allocated memory for mixer\n");
384 return NULL;
385 }
386 mixer->regs = baseaddr;
387 mixer->dev = dev;
388 mixer->id = id;
389
390 if (of_device_is_compatible(np, "st,stih416-compositor"))
391 sti_mixer_set_matrix(mixer);
392
393 DRM_DEBUG_DRIVER("%s created. Regs=%p\n",
394 sti_mixer_to_str(mixer), mixer->regs);
395
396 return mixer;
397 }