1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Avionic Design GmbH
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
7 #include <linux/bitops.h>
8 #include <linux/host1x.h>
10 #include <linux/iommu.h>
12 #include <drm/drm_atomic.h>
13 #include <drm/drm_atomic_helper.h>
15 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
16 #include <asm/dma-iommu.h>
22 #define DRIVER_NAME "tegra"
23 #define DRIVER_DESC "NVIDIA Tegra graphics"
24 #define DRIVER_DATE "20120330"
25 #define DRIVER_MAJOR 0
26 #define DRIVER_MINOR 0
27 #define DRIVER_PATCHLEVEL 0
29 #define CARVEOUT_SZ SZ_64M
30 #define CDMA_GATHER_FETCHES_MAX_NB 16383
32 struct tegra_drm_file
{
37 static int tegra_atomic_check(struct drm_device
*drm
,
38 struct drm_atomic_state
*state
)
42 err
= drm_atomic_helper_check(drm
, state
);
46 return tegra_display_hub_atomic_check(drm
, state
);
49 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs
= {
50 .fb_create
= tegra_fb_create
,
51 #ifdef CONFIG_DRM_FBDEV_EMULATION
52 .output_poll_changed
= drm_fb_helper_output_poll_changed
,
54 .atomic_check
= tegra_atomic_check
,
55 .atomic_commit
= drm_atomic_helper_commit
,
58 static void tegra_atomic_commit_tail(struct drm_atomic_state
*old_state
)
60 struct drm_device
*drm
= old_state
->dev
;
61 struct tegra_drm
*tegra
= drm
->dev_private
;
64 drm_atomic_helper_commit_modeset_disables(drm
, old_state
);
65 tegra_display_hub_atomic_commit(drm
, old_state
);
66 drm_atomic_helper_commit_planes(drm
, old_state
, 0);
67 drm_atomic_helper_commit_modeset_enables(drm
, old_state
);
68 drm_atomic_helper_commit_hw_done(old_state
);
69 drm_atomic_helper_wait_for_vblanks(drm
, old_state
);
70 drm_atomic_helper_cleanup_planes(drm
, old_state
);
72 drm_atomic_helper_commit_tail_rpm(old_state
);
76 static const struct drm_mode_config_helper_funcs
77 tegra_drm_mode_config_helpers
= {
78 .atomic_commit_tail
= tegra_atomic_commit_tail
,
81 static int tegra_drm_load(struct drm_device
*drm
, unsigned long flags
)
83 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
84 struct tegra_drm
*tegra
;
87 tegra
= kzalloc(sizeof(*tegra
), GFP_KERNEL
);
91 if (iommu_present(&platform_bus_type
)) {
92 tegra
->domain
= iommu_domain_alloc(&platform_bus_type
);
98 err
= iova_cache_get();
103 mutex_init(&tegra
->clients_lock
);
104 INIT_LIST_HEAD(&tegra
->clients
);
106 drm
->dev_private
= tegra
;
109 drm_mode_config_init(drm
);
111 drm
->mode_config
.min_width
= 0;
112 drm
->mode_config
.min_height
= 0;
114 drm
->mode_config
.max_width
= 4096;
115 drm
->mode_config
.max_height
= 4096;
117 drm
->mode_config
.allow_fb_modifiers
= true;
119 drm
->mode_config
.normalize_zpos
= true;
121 drm
->mode_config
.funcs
= &tegra_drm_mode_config_funcs
;
122 drm
->mode_config
.helper_private
= &tegra_drm_mode_config_helpers
;
124 err
= tegra_drm_fb_prepare(drm
);
128 drm_kms_helper_poll_init(drm
);
130 err
= host1x_device_init(device
);
135 u64 carveout_start
, carveout_end
, gem_start
, gem_end
;
136 u64 dma_mask
= dma_get_mask(&device
->dev
);
137 dma_addr_t start
, end
;
140 start
= tegra
->domain
->geometry
.aperture_start
& dma_mask
;
141 end
= tegra
->domain
->geometry
.aperture_end
& dma_mask
;
144 gem_end
= end
- CARVEOUT_SZ
;
145 carveout_start
= gem_end
+ 1;
148 order
= __ffs(tegra
->domain
->pgsize_bitmap
);
149 init_iova_domain(&tegra
->carveout
.domain
, 1UL << order
,
150 carveout_start
>> order
);
152 tegra
->carveout
.shift
= iova_shift(&tegra
->carveout
.domain
);
153 tegra
->carveout
.limit
= carveout_end
>> tegra
->carveout
.shift
;
155 drm_mm_init(&tegra
->mm
, gem_start
, gem_end
- gem_start
+ 1);
156 mutex_init(&tegra
->mm_lock
);
158 DRM_DEBUG("IOMMU apertures:\n");
159 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start
, gem_end
);
160 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start
,
165 err
= tegra_display_hub_prepare(tegra
->hub
);
171 * We don't use the drm_irq_install() helpers provided by the DRM
172 * core, so we need to set this manually in order to allow the
173 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
175 drm
->irq_enabled
= true;
177 /* syncpoints are used for full 32-bit hardware VBLANK counters */
178 drm
->max_vblank_count
= 0xffffffff;
180 err
= drm_vblank_init(drm
, drm
->mode_config
.num_crtc
);
184 drm_mode_config_reset(drm
);
186 err
= tegra_drm_fb_init(drm
);
194 tegra_display_hub_cleanup(tegra
->hub
);
196 host1x_device_exit(device
);
198 drm_kms_helper_poll_fini(drm
);
199 tegra_drm_fb_free(drm
);
201 drm_mode_config_cleanup(drm
);
204 mutex_destroy(&tegra
->mm_lock
);
205 drm_mm_takedown(&tegra
->mm
);
206 put_iova_domain(&tegra
->carveout
.domain
);
211 iommu_domain_free(tegra
->domain
);
217 static void tegra_drm_unload(struct drm_device
*drm
)
219 struct host1x_device
*device
= to_host1x_device(drm
->dev
);
220 struct tegra_drm
*tegra
= drm
->dev_private
;
223 drm_kms_helper_poll_fini(drm
);
224 tegra_drm_fb_exit(drm
);
225 drm_atomic_helper_shutdown(drm
);
226 drm_mode_config_cleanup(drm
);
228 err
= host1x_device_exit(device
);
233 mutex_destroy(&tegra
->mm_lock
);
234 drm_mm_takedown(&tegra
->mm
);
235 put_iova_domain(&tegra
->carveout
.domain
);
237 iommu_domain_free(tegra
->domain
);
243 static int tegra_drm_open(struct drm_device
*drm
, struct drm_file
*filp
)
245 struct tegra_drm_file
*fpriv
;
247 fpriv
= kzalloc(sizeof(*fpriv
), GFP_KERNEL
);
251 idr_init(&fpriv
->contexts
);
252 mutex_init(&fpriv
->lock
);
253 filp
->driver_priv
= fpriv
;
258 static void tegra_drm_context_free(struct tegra_drm_context
*context
)
260 context
->client
->ops
->close_channel(context
);
264 static struct host1x_bo
*
265 host1x_bo_lookup(struct drm_file
*file
, u32 handle
)
267 struct drm_gem_object
*gem
;
270 gem
= drm_gem_object_lookup(file
, handle
);
274 bo
= to_tegra_bo(gem
);
278 static int host1x_reloc_copy_from_user(struct host1x_reloc
*dest
,
279 struct drm_tegra_reloc __user
*src
,
280 struct drm_device
*drm
,
281 struct drm_file
*file
)
286 err
= get_user(cmdbuf
, &src
->cmdbuf
.handle
);
290 err
= get_user(dest
->cmdbuf
.offset
, &src
->cmdbuf
.offset
);
294 err
= get_user(target
, &src
->target
.handle
);
298 err
= get_user(dest
->target
.offset
, &src
->target
.offset
);
302 err
= get_user(dest
->shift
, &src
->shift
);
306 dest
->cmdbuf
.bo
= host1x_bo_lookup(file
, cmdbuf
);
307 if (!dest
->cmdbuf
.bo
)
310 dest
->target
.bo
= host1x_bo_lookup(file
, target
);
311 if (!dest
->target
.bo
)
317 int tegra_drm_submit(struct tegra_drm_context
*context
,
318 struct drm_tegra_submit
*args
, struct drm_device
*drm
,
319 struct drm_file
*file
)
321 struct host1x_client
*client
= &context
->client
->base
;
322 unsigned int num_cmdbufs
= args
->num_cmdbufs
;
323 unsigned int num_relocs
= args
->num_relocs
;
324 struct drm_tegra_cmdbuf __user
*user_cmdbufs
;
325 struct drm_tegra_reloc __user
*user_relocs
;
326 struct drm_tegra_syncpt __user
*user_syncpt
;
327 struct drm_tegra_syncpt syncpt
;
328 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
329 struct drm_gem_object
**refs
;
330 struct host1x_syncpt
*sp
;
331 struct host1x_job
*job
;
332 unsigned int num_refs
;
335 user_cmdbufs
= u64_to_user_ptr(args
->cmdbufs
);
336 user_relocs
= u64_to_user_ptr(args
->relocs
);
337 user_syncpt
= u64_to_user_ptr(args
->syncpts
);
339 /* We don't yet support other than one syncpt_incr struct per submit */
340 if (args
->num_syncpts
!= 1)
343 /* We don't yet support waitchks */
344 if (args
->num_waitchks
!= 0)
347 job
= host1x_job_alloc(context
->channel
, args
->num_cmdbufs
,
352 job
->num_relocs
= args
->num_relocs
;
353 job
->client
= client
;
354 job
->class = client
->class;
355 job
->serialize
= true;
358 * Track referenced BOs so that they can be unreferenced after the
359 * submission is complete.
361 num_refs
= num_cmdbufs
+ num_relocs
* 2;
363 refs
= kmalloc_array(num_refs
, sizeof(*refs
), GFP_KERNEL
);
369 /* reuse as an iterator later */
372 while (num_cmdbufs
) {
373 struct drm_tegra_cmdbuf cmdbuf
;
374 struct host1x_bo
*bo
;
375 struct tegra_bo
*obj
;
378 if (copy_from_user(&cmdbuf
, user_cmdbufs
, sizeof(cmdbuf
))) {
384 * The maximum number of CDMA gather fetches is 16383, a higher
385 * value means the words count is malformed.
387 if (cmdbuf
.words
> CDMA_GATHER_FETCHES_MAX_NB
) {
392 bo
= host1x_bo_lookup(file
, cmdbuf
.handle
);
398 offset
= (u64
)cmdbuf
.offset
+ (u64
)cmdbuf
.words
* sizeof(u32
);
399 obj
= host1x_to_tegra_bo(bo
);
400 refs
[num_refs
++] = &obj
->gem
;
403 * Gather buffer base address must be 4-bytes aligned,
404 * unaligned offset is malformed and cause commands stream
405 * corruption on the buffer address relocation.
407 if (offset
& 3 || offset
> obj
->gem
.size
) {
412 host1x_job_add_gather(job
, bo
, cmdbuf
.words
, cmdbuf
.offset
);
417 /* copy and resolve relocations from submit */
418 while (num_relocs
--) {
419 struct host1x_reloc
*reloc
;
420 struct tegra_bo
*obj
;
422 err
= host1x_reloc_copy_from_user(&job
->relocs
[num_relocs
],
423 &user_relocs
[num_relocs
], drm
,
428 reloc
= &job
->relocs
[num_relocs
];
429 obj
= host1x_to_tegra_bo(reloc
->cmdbuf
.bo
);
430 refs
[num_refs
++] = &obj
->gem
;
433 * The unaligned cmdbuf offset will cause an unaligned write
434 * during of the relocations patching, corrupting the commands
437 if (reloc
->cmdbuf
.offset
& 3 ||
438 reloc
->cmdbuf
.offset
>= obj
->gem
.size
) {
443 obj
= host1x_to_tegra_bo(reloc
->target
.bo
);
444 refs
[num_refs
++] = &obj
->gem
;
446 if (reloc
->target
.offset
>= obj
->gem
.size
) {
452 if (copy_from_user(&syncpt
, user_syncpt
, sizeof(syncpt
))) {
457 /* check whether syncpoint ID is valid */
458 sp
= host1x_syncpt_get(host1x
, syncpt
.id
);
464 job
->is_addr_reg
= context
->client
->ops
->is_addr_reg
;
465 job
->is_valid_class
= context
->client
->ops
->is_valid_class
;
466 job
->syncpt_incrs
= syncpt
.incrs
;
467 job
->syncpt_id
= syncpt
.id
;
468 job
->timeout
= 10000;
470 if (args
->timeout
&& args
->timeout
< 10000)
471 job
->timeout
= args
->timeout
;
473 err
= host1x_job_pin(job
, context
->client
->base
.dev
);
477 err
= host1x_job_submit(job
);
479 host1x_job_unpin(job
);
483 args
->fence
= job
->syncpt_end
;
487 drm_gem_object_put_unlocked(refs
[num_refs
]);
497 #ifdef CONFIG_DRM_TEGRA_STAGING
498 static int tegra_gem_create(struct drm_device
*drm
, void *data
,
499 struct drm_file
*file
)
501 struct drm_tegra_gem_create
*args
= data
;
504 bo
= tegra_bo_create_with_handle(file
, drm
, args
->size
, args
->flags
,
512 static int tegra_gem_mmap(struct drm_device
*drm
, void *data
,
513 struct drm_file
*file
)
515 struct drm_tegra_gem_mmap
*args
= data
;
516 struct drm_gem_object
*gem
;
519 gem
= drm_gem_object_lookup(file
, args
->handle
);
523 bo
= to_tegra_bo(gem
);
525 args
->offset
= drm_vma_node_offset_addr(&bo
->gem
.vma_node
);
527 drm_gem_object_put_unlocked(gem
);
532 static int tegra_syncpt_read(struct drm_device
*drm
, void *data
,
533 struct drm_file
*file
)
535 struct host1x
*host
= dev_get_drvdata(drm
->dev
->parent
);
536 struct drm_tegra_syncpt_read
*args
= data
;
537 struct host1x_syncpt
*sp
;
539 sp
= host1x_syncpt_get(host
, args
->id
);
543 args
->value
= host1x_syncpt_read_min(sp
);
547 static int tegra_syncpt_incr(struct drm_device
*drm
, void *data
,
548 struct drm_file
*file
)
550 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
551 struct drm_tegra_syncpt_incr
*args
= data
;
552 struct host1x_syncpt
*sp
;
554 sp
= host1x_syncpt_get(host1x
, args
->id
);
558 return host1x_syncpt_incr(sp
);
561 static int tegra_syncpt_wait(struct drm_device
*drm
, void *data
,
562 struct drm_file
*file
)
564 struct host1x
*host1x
= dev_get_drvdata(drm
->dev
->parent
);
565 struct drm_tegra_syncpt_wait
*args
= data
;
566 struct host1x_syncpt
*sp
;
568 sp
= host1x_syncpt_get(host1x
, args
->id
);
572 return host1x_syncpt_wait(sp
, args
->thresh
,
573 msecs_to_jiffies(args
->timeout
),
577 static int tegra_client_open(struct tegra_drm_file
*fpriv
,
578 struct tegra_drm_client
*client
,
579 struct tegra_drm_context
*context
)
583 err
= client
->ops
->open_channel(client
, context
);
587 err
= idr_alloc(&fpriv
->contexts
, context
, 1, 0, GFP_KERNEL
);
589 client
->ops
->close_channel(context
);
593 context
->client
= client
;
599 static int tegra_open_channel(struct drm_device
*drm
, void *data
,
600 struct drm_file
*file
)
602 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
603 struct tegra_drm
*tegra
= drm
->dev_private
;
604 struct drm_tegra_open_channel
*args
= data
;
605 struct tegra_drm_context
*context
;
606 struct tegra_drm_client
*client
;
609 context
= kzalloc(sizeof(*context
), GFP_KERNEL
);
613 mutex_lock(&fpriv
->lock
);
615 list_for_each_entry(client
, &tegra
->clients
, list
)
616 if (client
->base
.class == args
->client
) {
617 err
= tegra_client_open(fpriv
, client
, context
);
621 args
->context
= context
->id
;
628 mutex_unlock(&fpriv
->lock
);
632 static int tegra_close_channel(struct drm_device
*drm
, void *data
,
633 struct drm_file
*file
)
635 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
636 struct drm_tegra_close_channel
*args
= data
;
637 struct tegra_drm_context
*context
;
640 mutex_lock(&fpriv
->lock
);
642 context
= idr_find(&fpriv
->contexts
, args
->context
);
648 idr_remove(&fpriv
->contexts
, context
->id
);
649 tegra_drm_context_free(context
);
652 mutex_unlock(&fpriv
->lock
);
656 static int tegra_get_syncpt(struct drm_device
*drm
, void *data
,
657 struct drm_file
*file
)
659 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
660 struct drm_tegra_get_syncpt
*args
= data
;
661 struct tegra_drm_context
*context
;
662 struct host1x_syncpt
*syncpt
;
665 mutex_lock(&fpriv
->lock
);
667 context
= idr_find(&fpriv
->contexts
, args
->context
);
673 if (args
->index
>= context
->client
->base
.num_syncpts
) {
678 syncpt
= context
->client
->base
.syncpts
[args
->index
];
679 args
->id
= host1x_syncpt_id(syncpt
);
682 mutex_unlock(&fpriv
->lock
);
686 static int tegra_submit(struct drm_device
*drm
, void *data
,
687 struct drm_file
*file
)
689 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
690 struct drm_tegra_submit
*args
= data
;
691 struct tegra_drm_context
*context
;
694 mutex_lock(&fpriv
->lock
);
696 context
= idr_find(&fpriv
->contexts
, args
->context
);
702 err
= context
->client
->ops
->submit(context
, args
, drm
, file
);
705 mutex_unlock(&fpriv
->lock
);
709 static int tegra_get_syncpt_base(struct drm_device
*drm
, void *data
,
710 struct drm_file
*file
)
712 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
713 struct drm_tegra_get_syncpt_base
*args
= data
;
714 struct tegra_drm_context
*context
;
715 struct host1x_syncpt_base
*base
;
716 struct host1x_syncpt
*syncpt
;
719 mutex_lock(&fpriv
->lock
);
721 context
= idr_find(&fpriv
->contexts
, args
->context
);
727 if (args
->syncpt
>= context
->client
->base
.num_syncpts
) {
732 syncpt
= context
->client
->base
.syncpts
[args
->syncpt
];
734 base
= host1x_syncpt_get_base(syncpt
);
740 args
->id
= host1x_syncpt_base_id(base
);
743 mutex_unlock(&fpriv
->lock
);
747 static int tegra_gem_set_tiling(struct drm_device
*drm
, void *data
,
748 struct drm_file
*file
)
750 struct drm_tegra_gem_set_tiling
*args
= data
;
751 enum tegra_bo_tiling_mode mode
;
752 struct drm_gem_object
*gem
;
753 unsigned long value
= 0;
756 switch (args
->mode
) {
757 case DRM_TEGRA_GEM_TILING_MODE_PITCH
:
758 mode
= TEGRA_BO_TILING_MODE_PITCH
;
760 if (args
->value
!= 0)
765 case DRM_TEGRA_GEM_TILING_MODE_TILED
:
766 mode
= TEGRA_BO_TILING_MODE_TILED
;
768 if (args
->value
!= 0)
773 case DRM_TEGRA_GEM_TILING_MODE_BLOCK
:
774 mode
= TEGRA_BO_TILING_MODE_BLOCK
;
786 gem
= drm_gem_object_lookup(file
, args
->handle
);
790 bo
= to_tegra_bo(gem
);
792 bo
->tiling
.mode
= mode
;
793 bo
->tiling
.value
= value
;
795 drm_gem_object_put_unlocked(gem
);
800 static int tegra_gem_get_tiling(struct drm_device
*drm
, void *data
,
801 struct drm_file
*file
)
803 struct drm_tegra_gem_get_tiling
*args
= data
;
804 struct drm_gem_object
*gem
;
808 gem
= drm_gem_object_lookup(file
, args
->handle
);
812 bo
= to_tegra_bo(gem
);
814 switch (bo
->tiling
.mode
) {
815 case TEGRA_BO_TILING_MODE_PITCH
:
816 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_PITCH
;
820 case TEGRA_BO_TILING_MODE_TILED
:
821 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_TILED
;
825 case TEGRA_BO_TILING_MODE_BLOCK
:
826 args
->mode
= DRM_TEGRA_GEM_TILING_MODE_BLOCK
;
827 args
->value
= bo
->tiling
.value
;
835 drm_gem_object_put_unlocked(gem
);
840 static int tegra_gem_set_flags(struct drm_device
*drm
, void *data
,
841 struct drm_file
*file
)
843 struct drm_tegra_gem_set_flags
*args
= data
;
844 struct drm_gem_object
*gem
;
847 if (args
->flags
& ~DRM_TEGRA_GEM_FLAGS
)
850 gem
= drm_gem_object_lookup(file
, args
->handle
);
854 bo
= to_tegra_bo(gem
);
857 if (args
->flags
& DRM_TEGRA_GEM_BOTTOM_UP
)
858 bo
->flags
|= TEGRA_BO_BOTTOM_UP
;
860 drm_gem_object_put_unlocked(gem
);
865 static int tegra_gem_get_flags(struct drm_device
*drm
, void *data
,
866 struct drm_file
*file
)
868 struct drm_tegra_gem_get_flags
*args
= data
;
869 struct drm_gem_object
*gem
;
872 gem
= drm_gem_object_lookup(file
, args
->handle
);
876 bo
= to_tegra_bo(gem
);
879 if (bo
->flags
& TEGRA_BO_BOTTOM_UP
)
880 args
->flags
|= DRM_TEGRA_GEM_BOTTOM_UP
;
882 drm_gem_object_put_unlocked(gem
);
888 static const struct drm_ioctl_desc tegra_drm_ioctls
[] = {
889 #ifdef CONFIG_DRM_TEGRA_STAGING
890 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE
, tegra_gem_create
,
892 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP
, tegra_gem_mmap
,
894 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ
, tegra_syncpt_read
,
896 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR
, tegra_syncpt_incr
,
898 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT
, tegra_syncpt_wait
,
900 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL
, tegra_open_channel
,
902 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL
, tegra_close_channel
,
904 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT
, tegra_get_syncpt
,
906 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT
, tegra_submit
,
908 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE
, tegra_get_syncpt_base
,
910 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING
, tegra_gem_set_tiling
,
912 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING
, tegra_gem_get_tiling
,
914 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS
, tegra_gem_set_flags
,
916 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS
, tegra_gem_get_flags
,
921 static const struct file_operations tegra_drm_fops
= {
922 .owner
= THIS_MODULE
,
924 .release
= drm_release
,
925 .unlocked_ioctl
= drm_ioctl
,
926 .mmap
= tegra_drm_mmap
,
929 .compat_ioctl
= drm_compat_ioctl
,
930 .llseek
= noop_llseek
,
933 static int tegra_drm_context_cleanup(int id
, void *p
, void *data
)
935 struct tegra_drm_context
*context
= p
;
937 tegra_drm_context_free(context
);
942 static void tegra_drm_postclose(struct drm_device
*drm
, struct drm_file
*file
)
944 struct tegra_drm_file
*fpriv
= file
->driver_priv
;
946 mutex_lock(&fpriv
->lock
);
947 idr_for_each(&fpriv
->contexts
, tegra_drm_context_cleanup
, NULL
);
948 mutex_unlock(&fpriv
->lock
);
950 idr_destroy(&fpriv
->contexts
);
951 mutex_destroy(&fpriv
->lock
);
955 #ifdef CONFIG_DEBUG_FS
956 static int tegra_debugfs_framebuffers(struct seq_file
*s
, void *data
)
958 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
959 struct drm_device
*drm
= node
->minor
->dev
;
960 struct drm_framebuffer
*fb
;
962 mutex_lock(&drm
->mode_config
.fb_lock
);
964 list_for_each_entry(fb
, &drm
->mode_config
.fb_list
, head
) {
965 seq_printf(s
, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
966 fb
->base
.id
, fb
->width
, fb
->height
,
968 fb
->format
->cpp
[0] * 8,
969 drm_framebuffer_read_refcount(fb
));
972 mutex_unlock(&drm
->mode_config
.fb_lock
);
977 static int tegra_debugfs_iova(struct seq_file
*s
, void *data
)
979 struct drm_info_node
*node
= (struct drm_info_node
*)s
->private;
980 struct drm_device
*drm
= node
->minor
->dev
;
981 struct tegra_drm
*tegra
= drm
->dev_private
;
982 struct drm_printer p
= drm_seq_file_printer(s
);
985 mutex_lock(&tegra
->mm_lock
);
986 drm_mm_print(&tegra
->mm
, &p
);
987 mutex_unlock(&tegra
->mm_lock
);
993 static struct drm_info_list tegra_debugfs_list
[] = {
994 { "framebuffers", tegra_debugfs_framebuffers
, 0 },
995 { "iova", tegra_debugfs_iova
, 0 },
998 static int tegra_debugfs_init(struct drm_minor
*minor
)
1000 return drm_debugfs_create_files(tegra_debugfs_list
,
1001 ARRAY_SIZE(tegra_debugfs_list
),
1002 minor
->debugfs_root
, minor
);
1006 static struct drm_driver tegra_drm_driver
= {
1007 .driver_features
= DRIVER_MODESET
| DRIVER_GEM
|
1008 DRIVER_ATOMIC
| DRIVER_RENDER
,
1009 .load
= tegra_drm_load
,
1010 .unload
= tegra_drm_unload
,
1011 .open
= tegra_drm_open
,
1012 .postclose
= tegra_drm_postclose
,
1013 .lastclose
= drm_fb_helper_lastclose
,
1015 #if defined(CONFIG_DEBUG_FS)
1016 .debugfs_init
= tegra_debugfs_init
,
1019 .gem_free_object_unlocked
= tegra_bo_free_object
,
1020 .gem_vm_ops
= &tegra_bo_vm_ops
,
1022 .prime_handle_to_fd
= drm_gem_prime_handle_to_fd
,
1023 .prime_fd_to_handle
= drm_gem_prime_fd_to_handle
,
1024 .gem_prime_export
= tegra_gem_prime_export
,
1025 .gem_prime_import
= tegra_gem_prime_import
,
1027 .dumb_create
= tegra_bo_dumb_create
,
1029 .ioctls
= tegra_drm_ioctls
,
1030 .num_ioctls
= ARRAY_SIZE(tegra_drm_ioctls
),
1031 .fops
= &tegra_drm_fops
,
1033 .name
= DRIVER_NAME
,
1034 .desc
= DRIVER_DESC
,
1035 .date
= DRIVER_DATE
,
1036 .major
= DRIVER_MAJOR
,
1037 .minor
= DRIVER_MINOR
,
1038 .patchlevel
= DRIVER_PATCHLEVEL
,
1041 int tegra_drm_register_client(struct tegra_drm
*tegra
,
1042 struct tegra_drm_client
*client
)
1044 mutex_lock(&tegra
->clients_lock
);
1045 list_add_tail(&client
->list
, &tegra
->clients
);
1046 client
->drm
= tegra
;
1047 mutex_unlock(&tegra
->clients_lock
);
1052 int tegra_drm_unregister_client(struct tegra_drm
*tegra
,
1053 struct tegra_drm_client
*client
)
1055 mutex_lock(&tegra
->clients_lock
);
1056 list_del_init(&client
->list
);
1058 mutex_unlock(&tegra
->clients_lock
);
1063 struct iommu_group
*host1x_client_iommu_attach(struct host1x_client
*client
,
1066 struct drm_device
*drm
= dev_get_drvdata(client
->parent
);
1067 struct tegra_drm
*tegra
= drm
->dev_private
;
1068 struct iommu_group
*group
= NULL
;
1071 if (tegra
->domain
) {
1072 group
= iommu_group_get(client
->dev
);
1074 dev_err(client
->dev
, "failed to get IOMMU group\n");
1075 return ERR_PTR(-ENODEV
);
1078 if (!shared
|| (shared
&& (group
!= tegra
->group
))) {
1079 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
1080 if (client
->dev
->archdata
.mapping
) {
1081 struct dma_iommu_mapping
*mapping
=
1082 to_dma_iommu_mapping(client
->dev
);
1083 arm_iommu_detach_device(client
->dev
);
1084 arm_iommu_release_mapping(mapping
);
1087 err
= iommu_attach_group(tegra
->domain
, group
);
1089 iommu_group_put(group
);
1090 return ERR_PTR(err
);
1093 if (shared
&& !tegra
->group
)
1094 tegra
->group
= group
;
1101 void host1x_client_iommu_detach(struct host1x_client
*client
,
1102 struct iommu_group
*group
)
1104 struct drm_device
*drm
= dev_get_drvdata(client
->parent
);
1105 struct tegra_drm
*tegra
= drm
->dev_private
;
1108 if (group
== tegra
->group
) {
1109 iommu_detach_group(tegra
->domain
, group
);
1110 tegra
->group
= NULL
;
1113 iommu_group_put(group
);
1117 void *tegra_drm_alloc(struct tegra_drm
*tegra
, size_t size
, dma_addr_t
*dma
)
1125 size
= iova_align(&tegra
->carveout
.domain
, size
);
1127 size
= PAGE_ALIGN(size
);
1129 gfp
= GFP_KERNEL
| __GFP_ZERO
;
1130 if (!tegra
->domain
) {
1132 * Many units only support 32-bit addresses, even on 64-bit
1133 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1134 * virtual address space, force allocations to be in the
1135 * lower 32-bit range.
1140 virt
= (void *)__get_free_pages(gfp
, get_order(size
));
1142 return ERR_PTR(-ENOMEM
);
1144 if (!tegra
->domain
) {
1146 * If IOMMU is disabled, devices address physical memory
1149 *dma
= virt_to_phys(virt
);
1153 alloc
= alloc_iova(&tegra
->carveout
.domain
,
1154 size
>> tegra
->carveout
.shift
,
1155 tegra
->carveout
.limit
, true);
1161 *dma
= iova_dma_addr(&tegra
->carveout
.domain
, alloc
);
1162 err
= iommu_map(tegra
->domain
, *dma
, virt_to_phys(virt
),
1163 size
, IOMMU_READ
| IOMMU_WRITE
);
1170 __free_iova(&tegra
->carveout
.domain
, alloc
);
1172 free_pages((unsigned long)virt
, get_order(size
));
1174 return ERR_PTR(err
);
1177 void tegra_drm_free(struct tegra_drm
*tegra
, size_t size
, void *virt
,
1181 size
= iova_align(&tegra
->carveout
.domain
, size
);
1183 size
= PAGE_ALIGN(size
);
1185 if (tegra
->domain
) {
1186 iommu_unmap(tegra
->domain
, dma
, size
);
1187 free_iova(&tegra
->carveout
.domain
,
1188 iova_pfn(&tegra
->carveout
.domain
, dma
));
1191 free_pages((unsigned long)virt
, get_order(size
));
1194 static int host1x_drm_probe(struct host1x_device
*dev
)
1196 struct drm_driver
*driver
= &tegra_drm_driver
;
1197 struct drm_device
*drm
;
1200 drm
= drm_dev_alloc(driver
, &dev
->dev
);
1202 return PTR_ERR(drm
);
1204 dev_set_drvdata(&dev
->dev
, drm
);
1206 err
= drm_fb_helper_remove_conflicting_framebuffers(NULL
, "tegradrmfb", false);
1210 err
= drm_dev_register(drm
, 0);
1221 static int host1x_drm_remove(struct host1x_device
*dev
)
1223 struct drm_device
*drm
= dev_get_drvdata(&dev
->dev
);
1225 drm_dev_unregister(drm
);
1231 #ifdef CONFIG_PM_SLEEP
1232 static int host1x_drm_suspend(struct device
*dev
)
1234 struct drm_device
*drm
= dev_get_drvdata(dev
);
1236 return drm_mode_config_helper_suspend(drm
);
1239 static int host1x_drm_resume(struct device
*dev
)
1241 struct drm_device
*drm
= dev_get_drvdata(dev
);
1243 return drm_mode_config_helper_resume(drm
);
1247 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops
, host1x_drm_suspend
,
1250 static const struct of_device_id host1x_drm_subdevs
[] = {
1251 { .compatible
= "nvidia,tegra20-dc", },
1252 { .compatible
= "nvidia,tegra20-hdmi", },
1253 { .compatible
= "nvidia,tegra20-gr2d", },
1254 { .compatible
= "nvidia,tegra20-gr3d", },
1255 { .compatible
= "nvidia,tegra30-dc", },
1256 { .compatible
= "nvidia,tegra30-hdmi", },
1257 { .compatible
= "nvidia,tegra30-gr2d", },
1258 { .compatible
= "nvidia,tegra30-gr3d", },
1259 { .compatible
= "nvidia,tegra114-dsi", },
1260 { .compatible
= "nvidia,tegra114-hdmi", },
1261 { .compatible
= "nvidia,tegra114-gr3d", },
1262 { .compatible
= "nvidia,tegra124-dc", },
1263 { .compatible
= "nvidia,tegra124-sor", },
1264 { .compatible
= "nvidia,tegra124-hdmi", },
1265 { .compatible
= "nvidia,tegra124-dsi", },
1266 { .compatible
= "nvidia,tegra124-vic", },
1267 { .compatible
= "nvidia,tegra132-dsi", },
1268 { .compatible
= "nvidia,tegra210-dc", },
1269 { .compatible
= "nvidia,tegra210-dsi", },
1270 { .compatible
= "nvidia,tegra210-sor", },
1271 { .compatible
= "nvidia,tegra210-sor1", },
1272 { .compatible
= "nvidia,tegra210-vic", },
1273 { .compatible
= "nvidia,tegra186-display", },
1274 { .compatible
= "nvidia,tegra186-dc", },
1275 { .compatible
= "nvidia,tegra186-sor", },
1276 { .compatible
= "nvidia,tegra186-sor1", },
1277 { .compatible
= "nvidia,tegra186-vic", },
1278 { .compatible
= "nvidia,tegra194-display", },
1279 { .compatible
= "nvidia,tegra194-dc", },
1280 { .compatible
= "nvidia,tegra194-sor", },
1281 { .compatible
= "nvidia,tegra194-vic", },
1285 static struct host1x_driver host1x_drm_driver
= {
1288 .pm
= &host1x_drm_pm_ops
,
1290 .probe
= host1x_drm_probe
,
1291 .remove
= host1x_drm_remove
,
1292 .subdevs
= host1x_drm_subdevs
,
1295 static struct platform_driver
* const drivers
[] = {
1296 &tegra_display_hub_driver
,
1300 &tegra_dpaux_driver
,
1307 static int __init
host1x_drm_init(void)
1311 err
= host1x_driver_register(&host1x_drm_driver
);
1315 err
= platform_register_drivers(drivers
, ARRAY_SIZE(drivers
));
1317 goto unregister_host1x
;
1322 host1x_driver_unregister(&host1x_drm_driver
);
1325 module_init(host1x_drm_init
);
1327 static void __exit
host1x_drm_exit(void)
1329 platform_unregister_drivers(drivers
, ARRAY_SIZE(drivers
));
1330 host1x_driver_unregister(&host1x_drm_driver
);
1332 module_exit(host1x_drm_exit
);
1334 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1335 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1336 MODULE_LICENSE("GPL v2");