2 * Copyright 2016 Linaro Ltd.
3 * Copyright 2016 ZTE Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/component.h>
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/hdmi.h>
16 #include <linux/irq.h>
17 #include <linux/mfd/syscon.h>
18 #include <linux/module.h>
19 #include <linux/mutex.h>
20 #include <linux/of_device.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc_helper.h>
24 #include <drm/drm_edid.h>
25 #include <drm/drm_of.h>
28 #include <sound/hdmi-codec.h>
30 #include "zx_hdmi_regs.h"
33 #define ZX_HDMI_INFOFRAME_SIZE 31
34 #define DDC_SEGMENT_ADDR 0x30
37 struct i2c_adapter adap
;
42 struct drm_connector connector
;
43 struct drm_encoder encoder
;
44 struct zx_hdmi_i2c
*ddc
;
46 struct drm_device
*drm
;
53 const struct vou_inf
*inf
;
54 struct platform_device
*audio_pdev
;
57 #define to_zx_hdmi(x) container_of(x, struct zx_hdmi, x)
59 static inline u8
hdmi_readb(struct zx_hdmi
*hdmi
, u16 offset
)
61 return readl_relaxed(hdmi
->mmio
+ offset
* 4);
64 static inline void hdmi_writeb(struct zx_hdmi
*hdmi
, u16 offset
, u8 val
)
66 writel_relaxed(val
, hdmi
->mmio
+ offset
* 4);
69 static inline void hdmi_writeb_mask(struct zx_hdmi
*hdmi
, u16 offset
,
74 tmp
= hdmi_readb(hdmi
, offset
);
75 tmp
= (tmp
& ~mask
) | (val
& mask
);
76 hdmi_writeb(hdmi
, offset
, tmp
);
79 static int zx_hdmi_infoframe_trans(struct zx_hdmi
*hdmi
,
80 union hdmi_infoframe
*frame
, u8 fsel
)
82 u8 buffer
[ZX_HDMI_INFOFRAME_SIZE
];
86 hdmi_writeb(hdmi
, TPI_INFO_FSEL
, fsel
);
88 num
= hdmi_infoframe_pack(frame
, buffer
, ZX_HDMI_INFOFRAME_SIZE
);
90 DRM_DEV_ERROR(hdmi
->dev
, "failed to pack infoframe: %d\n", num
);
94 for (i
= 0; i
< num
; i
++)
95 hdmi_writeb(hdmi
, TPI_INFO_B0
+ i
, buffer
[i
]);
97 hdmi_writeb_mask(hdmi
, TPI_INFO_EN
, TPI_INFO_TRANS_RPT
,
99 hdmi_writeb_mask(hdmi
, TPI_INFO_EN
, TPI_INFO_TRANS_EN
,
105 static int zx_hdmi_config_video_vsi(struct zx_hdmi
*hdmi
,
106 struct drm_display_mode
*mode
)
108 union hdmi_infoframe frame
;
111 ret
= drm_hdmi_vendor_infoframe_from_display_mode(&frame
.vendor
.hdmi
,
114 DRM_DEV_ERROR(hdmi
->dev
, "failed to get vendor infoframe: %d\n",
119 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_VSIF
);
122 static int zx_hdmi_config_video_avi(struct zx_hdmi
*hdmi
,
123 struct drm_display_mode
*mode
)
125 union hdmi_infoframe frame
;
128 ret
= drm_hdmi_avi_infoframe_from_display_mode(&frame
.avi
, mode
);
130 DRM_DEV_ERROR(hdmi
->dev
, "failed to get avi infoframe: %d\n",
135 /* We always use YUV444 for HDMI output. */
136 frame
.avi
.colorspace
= HDMI_COLORSPACE_YUV444
;
138 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_AVI
);
141 static void zx_hdmi_encoder_mode_set(struct drm_encoder
*encoder
,
142 struct drm_display_mode
*mode
,
143 struct drm_display_mode
*adj_mode
)
145 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
147 if (hdmi
->sink_is_hdmi
) {
148 zx_hdmi_config_video_avi(hdmi
, mode
);
149 zx_hdmi_config_video_vsi(hdmi
, mode
);
153 static void zx_hdmi_phy_start(struct zx_hdmi
*hdmi
)
155 /* Copy from ZTE BSP code */
156 hdmi_writeb(hdmi
, 0x222, 0x0);
157 hdmi_writeb(hdmi
, 0x224, 0x4);
158 hdmi_writeb(hdmi
, 0x909, 0x0);
159 hdmi_writeb(hdmi
, 0x7b0, 0x90);
160 hdmi_writeb(hdmi
, 0x7b1, 0x00);
161 hdmi_writeb(hdmi
, 0x7b2, 0xa7);
162 hdmi_writeb(hdmi
, 0x7b8, 0xaa);
163 hdmi_writeb(hdmi
, 0x7b2, 0xa7);
164 hdmi_writeb(hdmi
, 0x7b3, 0x0f);
165 hdmi_writeb(hdmi
, 0x7b4, 0x0f);
166 hdmi_writeb(hdmi
, 0x7b5, 0x55);
167 hdmi_writeb(hdmi
, 0x7b7, 0x03);
168 hdmi_writeb(hdmi
, 0x7b9, 0x12);
169 hdmi_writeb(hdmi
, 0x7ba, 0x32);
170 hdmi_writeb(hdmi
, 0x7bc, 0x68);
171 hdmi_writeb(hdmi
, 0x7be, 0x40);
172 hdmi_writeb(hdmi
, 0x7bf, 0x84);
173 hdmi_writeb(hdmi
, 0x7c1, 0x0f);
174 hdmi_writeb(hdmi
, 0x7c8, 0x02);
175 hdmi_writeb(hdmi
, 0x7c9, 0x03);
176 hdmi_writeb(hdmi
, 0x7ca, 0x40);
177 hdmi_writeb(hdmi
, 0x7dc, 0x31);
178 hdmi_writeb(hdmi
, 0x7e2, 0x04);
179 hdmi_writeb(hdmi
, 0x7e0, 0x06);
180 hdmi_writeb(hdmi
, 0x7cb, 0x68);
181 hdmi_writeb(hdmi
, 0x7f9, 0x02);
182 hdmi_writeb(hdmi
, 0x7b6, 0x02);
183 hdmi_writeb(hdmi
, 0x7f3, 0x0);
186 static void zx_hdmi_hw_enable(struct zx_hdmi
*hdmi
)
189 hdmi_writeb_mask(hdmi
, CLKPWD
, CLKPWD_PDIDCK
, CLKPWD_PDIDCK
);
191 /* Enable HDMI for TX */
192 hdmi_writeb_mask(hdmi
, FUNC_SEL
, FUNC_HDMI_EN
, FUNC_HDMI_EN
);
194 /* Enable deep color packet */
195 hdmi_writeb_mask(hdmi
, P2T_CTRL
, P2T_DC_PKT_EN
, P2T_DC_PKT_EN
);
197 /* Enable HDMI/MHL mode for output */
198 hdmi_writeb_mask(hdmi
, TEST_TXCTRL
, TEST_TXCTRL_HDMI_MODE
,
199 TEST_TXCTRL_HDMI_MODE
);
201 /* Configure reg_qc_sel */
202 hdmi_writeb(hdmi
, HDMICTL4
, 0x3);
204 /* Enable interrupt */
205 hdmi_writeb_mask(hdmi
, INTR1_MASK
, INTR1_MONITOR_DETECT
,
206 INTR1_MONITOR_DETECT
);
209 zx_hdmi_phy_start(hdmi
);
212 static void zx_hdmi_hw_disable(struct zx_hdmi
*hdmi
)
214 /* Disable interrupt */
215 hdmi_writeb_mask(hdmi
, INTR1_MASK
, INTR1_MONITOR_DETECT
, 0);
217 /* Disable deep color packet */
218 hdmi_writeb_mask(hdmi
, P2T_CTRL
, P2T_DC_PKT_EN
, P2T_DC_PKT_EN
);
220 /* Disable HDMI for TX */
221 hdmi_writeb_mask(hdmi
, FUNC_SEL
, FUNC_HDMI_EN
, 0);
224 hdmi_writeb_mask(hdmi
, CLKPWD
, CLKPWD_PDIDCK
, 0);
227 static void zx_hdmi_encoder_enable(struct drm_encoder
*encoder
)
229 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
231 clk_prepare_enable(hdmi
->cec_clk
);
232 clk_prepare_enable(hdmi
->osc_clk
);
233 clk_prepare_enable(hdmi
->xclk
);
235 zx_hdmi_hw_enable(hdmi
);
237 vou_inf_enable(VOU_HDMI
, encoder
->crtc
);
240 static void zx_hdmi_encoder_disable(struct drm_encoder
*encoder
)
242 struct zx_hdmi
*hdmi
= to_zx_hdmi(encoder
);
244 vou_inf_disable(VOU_HDMI
, encoder
->crtc
);
246 zx_hdmi_hw_disable(hdmi
);
248 clk_disable_unprepare(hdmi
->xclk
);
249 clk_disable_unprepare(hdmi
->osc_clk
);
250 clk_disable_unprepare(hdmi
->cec_clk
);
253 static const struct drm_encoder_helper_funcs zx_hdmi_encoder_helper_funcs
= {
254 .enable
= zx_hdmi_encoder_enable
,
255 .disable
= zx_hdmi_encoder_disable
,
256 .mode_set
= zx_hdmi_encoder_mode_set
,
259 static const struct drm_encoder_funcs zx_hdmi_encoder_funcs
= {
260 .destroy
= drm_encoder_cleanup
,
263 static int zx_hdmi_connector_get_modes(struct drm_connector
*connector
)
265 struct zx_hdmi
*hdmi
= to_zx_hdmi(connector
);
269 edid
= drm_get_edid(connector
, &hdmi
->ddc
->adap
);
273 hdmi
->sink_is_hdmi
= drm_detect_hdmi_monitor(edid
);
274 hdmi
->sink_has_audio
= drm_detect_monitor_audio(edid
);
275 drm_mode_connector_update_edid_property(connector
, edid
);
276 ret
= drm_add_edid_modes(connector
, edid
);
282 static enum drm_mode_status
283 zx_hdmi_connector_mode_valid(struct drm_connector
*connector
,
284 struct drm_display_mode
*mode
)
289 static struct drm_connector_helper_funcs zx_hdmi_connector_helper_funcs
= {
290 .get_modes
= zx_hdmi_connector_get_modes
,
291 .mode_valid
= zx_hdmi_connector_mode_valid
,
294 static enum drm_connector_status
295 zx_hdmi_connector_detect(struct drm_connector
*connector
, bool force
)
297 struct zx_hdmi
*hdmi
= to_zx_hdmi(connector
);
299 return (hdmi_readb(hdmi
, TPI_HPD_RSEN
) & TPI_HPD_CONNECTION
) ?
300 connector_status_connected
: connector_status_disconnected
;
303 static const struct drm_connector_funcs zx_hdmi_connector_funcs
= {
304 .dpms
= drm_atomic_helper_connector_dpms
,
305 .fill_modes
= drm_helper_probe_single_connector_modes
,
306 .detect
= zx_hdmi_connector_detect
,
307 .destroy
= drm_connector_cleanup
,
308 .reset
= drm_atomic_helper_connector_reset
,
309 .atomic_duplicate_state
= drm_atomic_helper_connector_duplicate_state
,
310 .atomic_destroy_state
= drm_atomic_helper_connector_destroy_state
,
313 static int zx_hdmi_register(struct drm_device
*drm
, struct zx_hdmi
*hdmi
)
315 struct drm_encoder
*encoder
= &hdmi
->encoder
;
317 encoder
->possible_crtcs
= VOU_CRTC_MASK
;
319 drm_encoder_init(drm
, encoder
, &zx_hdmi_encoder_funcs
,
320 DRM_MODE_ENCODER_TMDS
, NULL
);
321 drm_encoder_helper_add(encoder
, &zx_hdmi_encoder_helper_funcs
);
323 hdmi
->connector
.polled
= DRM_CONNECTOR_POLL_HPD
;
325 drm_connector_init(drm
, &hdmi
->connector
, &zx_hdmi_connector_funcs
,
326 DRM_MODE_CONNECTOR_HDMIA
);
327 drm_connector_helper_add(&hdmi
->connector
,
328 &zx_hdmi_connector_helper_funcs
);
330 drm_mode_connector_attach_encoder(&hdmi
->connector
, encoder
);
335 static irqreturn_t
zx_hdmi_irq_thread(int irq
, void *dev_id
)
337 struct zx_hdmi
*hdmi
= dev_id
;
339 drm_helper_hpd_irq_event(hdmi
->connector
.dev
);
344 static irqreturn_t
zx_hdmi_irq_handler(int irq
, void *dev_id
)
346 struct zx_hdmi
*hdmi
= dev_id
;
349 lstat
= hdmi_readb(hdmi
, L1_INTR_STAT
);
351 /* Monitor detect/HPD interrupt */
352 if (lstat
& L1_INTR_STAT_INTR1
) {
355 stat
= hdmi_readb(hdmi
, INTR1_STAT
);
356 hdmi_writeb(hdmi
, INTR1_STAT
, stat
);
358 if (stat
& INTR1_MONITOR_DETECT
)
359 return IRQ_WAKE_THREAD
;
365 static int zx_hdmi_audio_startup(struct device
*dev
, void *data
)
367 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
368 struct drm_encoder
*encoder
= &hdmi
->encoder
;
370 vou_inf_hdmi_audio_sel(encoder
->crtc
, VOU_HDMI_AUD_SPDIF
);
375 static void zx_hdmi_audio_shutdown(struct device
*dev
, void *data
)
377 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
379 /* Disable audio input */
380 hdmi_writeb_mask(hdmi
, AUD_EN
, AUD_IN_EN
, 0);
383 static inline int zx_hdmi_audio_get_n(unsigned int fs
)
387 if (fs
&& (fs
% 44100) == 0)
388 n
= 6272 * (fs
/ 44100);
395 static int zx_hdmi_audio_hw_params(struct device
*dev
,
397 struct hdmi_codec_daifmt
*daifmt
,
398 struct hdmi_codec_params
*params
)
400 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
401 struct hdmi_audio_infoframe
*cea
= ¶ms
->cea
;
402 union hdmi_infoframe frame
;
405 /* We only support spdif for now */
406 if (daifmt
->fmt
!= HDMI_SPDIF
) {
407 DRM_DEV_ERROR(hdmi
->dev
, "invalid daifmt %d\n", daifmt
->fmt
);
411 switch (params
->sample_width
) {
413 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
414 SPDIF_SAMPLE_SIZE_16BIT
);
417 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
418 SPDIF_SAMPLE_SIZE_20BIT
);
421 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, SPDIF_SAMPLE_SIZE_MASK
,
422 SPDIF_SAMPLE_SIZE_24BIT
);
425 DRM_DEV_ERROR(hdmi
->dev
, "invalid sample width %d\n",
426 params
->sample_width
);
430 /* CTS is calculated by hardware, and we only need to take care of N */
431 n
= zx_hdmi_audio_get_n(params
->sample_rate
);
432 hdmi_writeb(hdmi
, N_SVAL1
, n
& 0xff);
433 hdmi_writeb(hdmi
, N_SVAL2
, (n
>> 8) & 0xff);
434 hdmi_writeb(hdmi
, N_SVAL3
, (n
>> 16) & 0xf);
436 /* Enable spdif mode */
437 hdmi_writeb_mask(hdmi
, AUD_MODE
, SPDIF_EN
, SPDIF_EN
);
439 /* Enable audio input */
440 hdmi_writeb_mask(hdmi
, AUD_EN
, AUD_IN_EN
, AUD_IN_EN
);
442 memcpy(&frame
.audio
, cea
, sizeof(*cea
));
444 return zx_hdmi_infoframe_trans(hdmi
, &frame
, FSEL_AUDIO
);
447 static int zx_hdmi_audio_digital_mute(struct device
*dev
, void *data
,
450 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
453 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, TPI_AUD_MUTE
,
456 hdmi_writeb_mask(hdmi
, TPI_AUD_CONFIG
, TPI_AUD_MUTE
, 0);
461 static int zx_hdmi_audio_get_eld(struct device
*dev
, void *data
,
462 uint8_t *buf
, size_t len
)
464 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
465 struct drm_connector
*connector
= &hdmi
->connector
;
467 memcpy(buf
, connector
->eld
, min(sizeof(connector
->eld
), len
));
472 static const struct hdmi_codec_ops zx_hdmi_codec_ops
= {
473 .audio_startup
= zx_hdmi_audio_startup
,
474 .hw_params
= zx_hdmi_audio_hw_params
,
475 .audio_shutdown
= zx_hdmi_audio_shutdown
,
476 .digital_mute
= zx_hdmi_audio_digital_mute
,
477 .get_eld
= zx_hdmi_audio_get_eld
,
480 static struct hdmi_codec_pdata zx_hdmi_codec_pdata
= {
481 .ops
= &zx_hdmi_codec_ops
,
485 static int zx_hdmi_audio_register(struct zx_hdmi
*hdmi
)
487 struct platform_device
*pdev
;
489 pdev
= platform_device_register_data(hdmi
->dev
, HDMI_CODEC_DRV_NAME
,
491 &zx_hdmi_codec_pdata
,
492 sizeof(zx_hdmi_codec_pdata
));
494 return PTR_ERR(pdev
);
496 hdmi
->audio_pdev
= pdev
;
501 static int zx_hdmi_i2c_read(struct zx_hdmi
*hdmi
, struct i2c_msg
*msg
)
508 /* Bits [9:8] of bytes */
509 hdmi_writeb(hdmi
, ZX_DDC_DIN_CNT2
, (len
>> 8) & 0xff);
510 /* Bits [7:0] of bytes */
511 hdmi_writeb(hdmi
, ZX_DDC_DIN_CNT1
, len
& 0xff);
514 hdmi_writeb_mask(hdmi
, ZX_DDC_CMD
, DDC_CMD_MASK
, DDC_CMD_CLEAR_FIFO
);
516 /* Kick off the read */
517 hdmi_writeb_mask(hdmi
, ZX_DDC_CMD
, DDC_CMD_MASK
,
518 DDC_CMD_SEQUENTIAL_READ
);
523 /* FIFO needs some time to get ready */
524 usleep_range(500, 1000);
526 cnt
= hdmi_readb(hdmi
, ZX_DDC_DOUT_CNT
) & DDC_DOUT_CNT_MASK
;
529 DRM_DEV_ERROR(hdmi
->dev
,
530 "DDC FIFO read timed out!");
536 for (i
= 0; i
< cnt
; i
++)
537 *buf
++ = hdmi_readb(hdmi
, ZX_DDC_DATA
);
544 static int zx_hdmi_i2c_write(struct zx_hdmi
*hdmi
, struct i2c_msg
*msg
)
547 * The DDC I2C adapter is only for reading EDID data, so we assume
548 * that the write to this adapter must be the EDID data offset.
550 if ((msg
->len
!= 1) ||
551 ((msg
->addr
!= DDC_ADDR
) && (msg
->addr
!= DDC_SEGMENT_ADDR
)))
554 if (msg
->addr
== DDC_SEGMENT_ADDR
)
555 hdmi_writeb(hdmi
, ZX_DDC_SEGM
, msg
->addr
<< 1);
556 else if (msg
->addr
== DDC_ADDR
)
557 hdmi_writeb(hdmi
, ZX_DDC_ADDR
, msg
->addr
<< 1);
559 hdmi_writeb(hdmi
, ZX_DDC_OFFSET
, msg
->buf
[0]);
564 static int zx_hdmi_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
,
567 struct zx_hdmi
*hdmi
= i2c_get_adapdata(adap
);
568 struct zx_hdmi_i2c
*ddc
= hdmi
->ddc
;
571 mutex_lock(&ddc
->lock
);
573 /* Enable DDC master access */
574 hdmi_writeb_mask(hdmi
, TPI_DDC_MASTER_EN
, HW_DDC_MASTER
, HW_DDC_MASTER
);
576 for (i
= 0; i
< num
; i
++) {
577 DRM_DEV_DEBUG(hdmi
->dev
,
578 "xfer: num: %d/%d, len: %d, flags: %#x\n",
579 i
+ 1, num
, msgs
[i
].len
, msgs
[i
].flags
);
581 if (msgs
[i
].flags
& I2C_M_RD
)
582 ret
= zx_hdmi_i2c_read(hdmi
, &msgs
[i
]);
584 ret
= zx_hdmi_i2c_write(hdmi
, &msgs
[i
]);
593 /* Disable DDC master access */
594 hdmi_writeb_mask(hdmi
, TPI_DDC_MASTER_EN
, HW_DDC_MASTER
, 0);
596 mutex_unlock(&ddc
->lock
);
601 static u32
zx_hdmi_i2c_func(struct i2c_adapter
*adapter
)
603 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
606 static const struct i2c_algorithm zx_hdmi_algorithm
= {
607 .master_xfer
= zx_hdmi_i2c_xfer
,
608 .functionality
= zx_hdmi_i2c_func
,
611 static int zx_hdmi_ddc_register(struct zx_hdmi
*hdmi
)
613 struct i2c_adapter
*adap
;
614 struct zx_hdmi_i2c
*ddc
;
617 ddc
= devm_kzalloc(hdmi
->dev
, sizeof(*ddc
), GFP_KERNEL
);
622 mutex_init(&ddc
->lock
);
625 adap
->owner
= THIS_MODULE
;
626 adap
->class = I2C_CLASS_DDC
;
627 adap
->dev
.parent
= hdmi
->dev
;
628 adap
->algo
= &zx_hdmi_algorithm
;
629 snprintf(adap
->name
, sizeof(adap
->name
), "zx hdmi i2c");
631 ret
= i2c_add_adapter(adap
);
633 DRM_DEV_ERROR(hdmi
->dev
, "failed to add I2C adapter: %d\n",
638 i2c_set_adapdata(adap
, hdmi
);
643 static int zx_hdmi_bind(struct device
*dev
, struct device
*master
, void *data
)
645 struct platform_device
*pdev
= to_platform_device(dev
);
646 struct drm_device
*drm
= data
;
647 struct resource
*res
;
648 struct zx_hdmi
*hdmi
;
652 hdmi
= devm_kzalloc(dev
, sizeof(*hdmi
), GFP_KERNEL
);
659 dev_set_drvdata(dev
, hdmi
);
661 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
662 hdmi
->mmio
= devm_ioremap_resource(dev
, res
);
663 if (IS_ERR(hdmi
->mmio
)) {
664 ret
= PTR_ERR(hdmi
->mmio
);
665 DRM_DEV_ERROR(dev
, "failed to remap hdmi region: %d\n", ret
);
669 irq
= platform_get_irq(pdev
, 0);
673 hdmi
->cec_clk
= devm_clk_get(hdmi
->dev
, "osc_cec");
674 if (IS_ERR(hdmi
->cec_clk
)) {
675 ret
= PTR_ERR(hdmi
->cec_clk
);
676 DRM_DEV_ERROR(dev
, "failed to get cec_clk: %d\n", ret
);
680 hdmi
->osc_clk
= devm_clk_get(hdmi
->dev
, "osc_clk");
681 if (IS_ERR(hdmi
->osc_clk
)) {
682 ret
= PTR_ERR(hdmi
->osc_clk
);
683 DRM_DEV_ERROR(dev
, "failed to get osc_clk: %d\n", ret
);
687 hdmi
->xclk
= devm_clk_get(hdmi
->dev
, "xclk");
688 if (IS_ERR(hdmi
->xclk
)) {
689 ret
= PTR_ERR(hdmi
->xclk
);
690 DRM_DEV_ERROR(dev
, "failed to get xclk: %d\n", ret
);
694 ret
= zx_hdmi_ddc_register(hdmi
);
696 DRM_DEV_ERROR(dev
, "failed to register ddc: %d\n", ret
);
700 ret
= zx_hdmi_audio_register(hdmi
);
702 DRM_DEV_ERROR(dev
, "failed to register audio: %d\n", ret
);
706 ret
= zx_hdmi_register(drm
, hdmi
);
708 DRM_DEV_ERROR(dev
, "failed to register hdmi: %d\n", ret
);
712 ret
= devm_request_threaded_irq(dev
, irq
, zx_hdmi_irq_handler
,
713 zx_hdmi_irq_thread
, IRQF_SHARED
,
714 dev_name(dev
), hdmi
);
716 DRM_DEV_ERROR(dev
, "failed to request threaded irq: %d\n", ret
);
723 static void zx_hdmi_unbind(struct device
*dev
, struct device
*master
,
726 struct zx_hdmi
*hdmi
= dev_get_drvdata(dev
);
728 hdmi
->connector
.funcs
->destroy(&hdmi
->connector
);
729 hdmi
->encoder
.funcs
->destroy(&hdmi
->encoder
);
731 if (hdmi
->audio_pdev
)
732 platform_device_unregister(hdmi
->audio_pdev
);
735 static const struct component_ops zx_hdmi_component_ops
= {
736 .bind
= zx_hdmi_bind
,
737 .unbind
= zx_hdmi_unbind
,
740 static int zx_hdmi_probe(struct platform_device
*pdev
)
742 return component_add(&pdev
->dev
, &zx_hdmi_component_ops
);
745 static int zx_hdmi_remove(struct platform_device
*pdev
)
747 component_del(&pdev
->dev
, &zx_hdmi_component_ops
);
751 static const struct of_device_id zx_hdmi_of_match
[] = {
752 { .compatible
= "zte,zx296718-hdmi", },
755 MODULE_DEVICE_TABLE(of
, zx_hdmi_of_match
);
757 struct platform_driver zx_hdmi_driver
= {
758 .probe
= zx_hdmi_probe
,
759 .remove
= zx_hdmi_remove
,
762 .of_match_table
= zx_hdmi_of_match
,