drivers/hid/intel-ish-hid/ipc/ipc.c

   1 /*
   2  * H/W layer of ISHTP provider device (ISH)
   3  *
   4  * Copyright (c) 2014-2016, Intel Corporation.
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms and conditions of the GNU General Public License,
   8  * version 2, as published by the Free Software Foundation.
   9  *
  10  * This program is distributed in the hope it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13  * more details.
  14  */
  15
  16 #include <linux/sched.h>
  17 #include <linux/spinlock.h>
  18 #include <linux/delay.h>
  19 #include <linux/jiffies.h>
  20 #include "client.h"
  21 #include "hw-ish.h"
  22 #include "utils.h"
  23 #include "hbm.h"
  24
  25 /* For FW reset flow */
  26 static struct work_struct fw_reset_work;
  27 static struct ishtp_device *ishtp_dev;
  28
  29 /**
  30  * ish_reg_read() - Read register
  31  * @dev: ISHTP device pointer
  32  * @offset: Register offset
  33  *
  34  * Read 32 bit register at a given offset
  35  *
  36  * Return: Read register value
  37  */
  38 static inline uint32_t ish_reg_read(const struct ishtp_device *dev,
  39         unsigned long offset)
  40 {
  41         struct ish_hw *hw = to_ish_hw(dev);
  42
  43         return readl(hw->mem_addr + offset);
  44 }
  45
  46 /**
  47  * ish_reg_write() - Write register
  48  * @dev: ISHTP device pointer
  49  * @offset: Register offset
  50  * @value: Value to write
  51  *
  52  * Writes 32 bit register at a give offset
  53  */
  54 static inline void ish_reg_write(struct ishtp_device *dev,
  55                                  unsigned long offset,
  56                                  uint32_t value)
  57 {
  58         struct ish_hw *hw = to_ish_hw(dev);
  59
  60         writel(value, hw->mem_addr + offset);
  61 }
  62
  63 /**
  64  * _ish_read_fw_sts_reg() - Read FW status register
  65  * @dev: ISHTP device pointer
  66  *
  67  * Read FW status register
  68  *
  69  * Return: Read register value
  70  */
  71 static inline uint32_t _ish_read_fw_sts_reg(struct ishtp_device *dev)
  72 {
  73         return ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
  74 }
  75
  76 /**
  77  * check_generated_interrupt() - Check if ISH interrupt
  78  * @dev: ISHTP device pointer
  79  *
  80  * Check if an interrupt was generated for ISH
  81  *
  82  * Return: Read true or false
  83  */
  84 static bool check_generated_interrupt(struct ishtp_device *dev)
  85 {
  86         bool interrupt_generated = true;
  87         uint32_t pisr_val = 0;
  88
  89         if (dev->pdev->device == CHV_DEVICE_ID) {
  90                 pisr_val = ish_reg_read(dev, IPC_REG_PISR_CHV_AB);
  91                 interrupt_generated =
  92                         IPC_INT_FROM_ISH_TO_HOST_CHV_AB(pisr_val);
  93         } else {
  94                 pisr_val = ish_reg_read(dev, IPC_REG_PISR_BXT);
  95                 interrupt_generated = IPC_INT_FROM_ISH_TO_HOST_BXT(pisr_val);
  96         }
  97
  98         return interrupt_generated;
  99 }
 100
 101 /**
 102  * ish_is_input_ready() - Check if FW ready for RX
 103  * @dev: ISHTP device pointer
 104  *
 105  * Check if ISH FW is ready for receiving data
 106  *
 107  * Return: Read true or false
 108  */
 109 static bool ish_is_input_ready(struct ishtp_device *dev)
 110 {
 111         uint32_t doorbell_val;
 112
 113         doorbell_val = ish_reg_read(dev, IPC_REG_HOST2ISH_DRBL);
 114         return !IPC_IS_BUSY(doorbell_val);
 115 }
 116
 117 /**
 118  * set_host_ready() - Indicate host ready
 119  * @dev: ISHTP device pointer
 120  *
 121  * Set host ready indication to FW
 122  */
 123 static void set_host_ready(struct ishtp_device *dev)
 124 {
 125         if (dev->pdev->device == CHV_DEVICE_ID) {
 126                 if (dev->pdev->revision == REVISION_ID_CHT_A0 ||
 127                                 (dev->pdev->revision & REVISION_ID_SI_MASK) ==
 128                                 REVISION_ID_CHT_Ax_SI)
 129                         ish_reg_write(dev, IPC_REG_HOST_COMM, 0x81);
 130                 else if (dev->pdev->revision == REVISION_ID_CHT_B0 ||
 131                                 (dev->pdev->revision & REVISION_ID_SI_MASK) ==
 132                                 REVISION_ID_CHT_Bx_SI ||
 133                                 (dev->pdev->revision & REVISION_ID_SI_MASK) ==
 134                                 REVISION_ID_CHT_Kx_SI ||
 135                                 (dev->pdev->revision & REVISION_ID_SI_MASK) ==
 136                                 REVISION_ID_CHT_Dx_SI) {
 137                         uint32_t host_comm_val;
 138
 139                         host_comm_val = ish_reg_read(dev, IPC_REG_HOST_COMM);
 140                         host_comm_val |= IPC_HOSTCOMM_INT_EN_BIT_CHV_AB | 0x81;
 141                         ish_reg_write(dev, IPC_REG_HOST_COMM, host_comm_val);
 142                 }
 143         } else {
 144                         uint32_t host_pimr_val;
 145
 146                         host_pimr_val = ish_reg_read(dev, IPC_REG_PIMR_BXT);
 147                         host_pimr_val |= IPC_PIMR_INT_EN_BIT_BXT;
 148                         /*
 149                          * disable interrupt generated instead of
 150                          * RX_complete_msg
 151                          */
 152                         host_pimr_val &= ~IPC_HOST2ISH_BUSYCLEAR_MASK_BIT;
 153
 154                         ish_reg_write(dev, IPC_REG_PIMR_BXT, host_pimr_val);
 155         }
 156 }
 157
 158 /**
 159  * ishtp_fw_is_ready() - Check if FW ready
 160  * @dev: ISHTP device pointer
 161  *
 162  * Check if ISH FW is ready
 163  *
 164  * Return: Read true or false
 165  */
 166 static bool ishtp_fw_is_ready(struct ishtp_device *dev)
 167 {
 168         uint32_t ish_status = _ish_read_fw_sts_reg(dev);
 169
 170         return IPC_IS_ISH_ILUP(ish_status) &&
 171                 IPC_IS_ISH_ISHTP_READY(ish_status);
 172 }
 173
 174 /**
 175  * ish_set_host_rdy() - Indicate host ready
 176  * @dev: ISHTP device pointer
 177  *
 178  * Set host ready indication to FW
 179  */
 180 static void ish_set_host_rdy(struct ishtp_device *dev)
 181 {
 182         uint32_t host_status = ish_reg_read(dev, IPC_REG_HOST_COMM);
 183
 184         IPC_SET_HOST_READY(host_status);
 185         ish_reg_write(dev, IPC_REG_HOST_COMM, host_status);
 186 }
 187
 188 /**
 189  * ish_clr_host_rdy() - Indicate host not ready
 190  * @dev: ISHTP device pointer
 191  *
 192  * Send host not ready indication to FW
 193  */
 194 static void ish_clr_host_rdy(struct ishtp_device *dev)
 195 {
 196         uint32_t host_status = ish_reg_read(dev, IPC_REG_HOST_COMM);
 197
 198         IPC_CLEAR_HOST_READY(host_status);
 199         ish_reg_write(dev, IPC_REG_HOST_COMM, host_status);
 200 }
 201
 202 /**
 203  * _ishtp_read_hdr() - Read message header
 204  * @dev: ISHTP device pointer
 205  *
 206  * Read header of 32bit length
 207  *
 208  * Return: Read register value
 209  */
 210 static uint32_t _ishtp_read_hdr(const struct ishtp_device *dev)
 211 {
 212         return ish_reg_read(dev, IPC_REG_ISH2HOST_MSG);
 213 }
 214
 215 /**
 216  * _ishtp_read - Read message
 217  * @dev: ISHTP device pointer
 218  * @buffer: message buffer
 219  * @buffer_length: length of message buffer
 220  *
 221  * Read message from FW
 222  *
 223  * Return: Always 0
 224  */
 225 static int _ishtp_read(struct ishtp_device *dev, unsigned char *buffer,
 226         unsigned long buffer_length)
 227 {
 228         uint32_t        i;
 229         uint32_t        *r_buf = (uint32_t *)buffer;
 230         uint32_t        msg_offs;
 231
 232         msg_offs = IPC_REG_ISH2HOST_MSG + sizeof(struct ishtp_msg_hdr);
 233         for (i = 0; i < buffer_length; i += sizeof(uint32_t))
 234                 *r_buf++ = ish_reg_read(dev, msg_offs + i);
 235
 236         return 0;
 237 }
 238
 239 /**
 240  * write_ipc_from_queue() - try to write ipc msg from Tx queue to device
 241  * @dev: ishtp device pointer
 242  *
 243  * Check if DRBL is cleared. if it is - write the first IPC msg,  then call
 244  * the callback function (unless it's NULL)
 245  *
 246  * Return: 0 for success else failure code
 247  */
 248 static int write_ipc_from_queue(struct ishtp_device *dev)
 249 {
 250         struct wr_msg_ctl_info  *ipc_link;
 251         unsigned long   length;
 252         unsigned long   rem;
 253         unsigned long   flags;
 254         uint32_t        doorbell_val;
 255         uint32_t        *r_buf;
 256         uint32_t        reg_addr;
 257         int     i;
 258         void    (*ipc_send_compl)(void *);
 259         void    *ipc_send_compl_prm;
 260         static int      out_ipc_locked;
 261         unsigned long   out_ipc_flags;
 262
 263         if (dev->dev_state == ISHTP_DEV_DISABLED)
 264                 return  -EINVAL;
 265
 266         spin_lock_irqsave(&dev->out_ipc_spinlock, out_ipc_flags);
 267         if (out_ipc_locked) {
 268                 spin_unlock_irqrestore(&dev->out_ipc_spinlock, out_ipc_flags);
 269                 return -EBUSY;
 270         }
 271         out_ipc_locked = 1;
 272         if (!ish_is_input_ready(dev)) {
 273                 out_ipc_locked = 0;
 274                 spin_unlock_irqrestore(&dev->out_ipc_spinlock, out_ipc_flags);
 275                 return -EBUSY;
 276         }
 277         spin_unlock_irqrestore(&dev->out_ipc_spinlock, out_ipc_flags);
 278
 279         spin_lock_irqsave(&dev->wr_processing_spinlock, flags);
 280         /*
 281          * if tx send list is empty - return 0;
 282          * may happen, as RX_COMPLETE handler doesn't check list emptiness.
 283          */
 284         if (list_empty(&dev->wr_processing_list_head.link)) {
 285                 spin_unlock_irqrestore(&dev->wr_processing_spinlock, flags);
 286                 out_ipc_locked = 0;
 287                 return  0;
 288         }
 289
 290         ipc_link = list_entry(dev->wr_processing_list_head.link.next,
 291                               struct wr_msg_ctl_info, link);
 292         /* first 4 bytes of the data is the doorbell value (IPC header) */
 293         length = ipc_link->length - sizeof(uint32_t);
 294         doorbell_val = *(uint32_t *)ipc_link->inline_data;
 295         r_buf = (uint32_t *)(ipc_link->inline_data + sizeof(uint32_t));
 296
 297         /* If sending MNG_SYNC_FW_CLOCK, update clock again */
 298         if (IPC_HEADER_GET_PROTOCOL(doorbell_val) == IPC_PROTOCOL_MNG &&
 299                 IPC_HEADER_GET_MNG_CMD(doorbell_val) == MNG_SYNC_FW_CLOCK) {
 300                 struct timespec ts_system;
 301                 struct timeval tv_utc;
 302                 uint64_t        usec_system, usec_utc;
 303                 struct ipc_time_update_msg time_update;
 304                 struct time_sync_format ts_format;
 305
 306                 get_monotonic_boottime(&ts_system);
 307                 do_gettimeofday(&tv_utc);
 308                 usec_system = (timespec_to_ns(&ts_system)) / NSEC_PER_USEC;
 309                 usec_utc = (uint64_t)tv_utc.tv_sec * 1000000 +
 310                                                 ((uint32_t)tv_utc.tv_usec);
 311                 ts_format.ts1_source = HOST_SYSTEM_TIME_USEC;
 312                 ts_format.ts2_source = HOST_UTC_TIME_USEC;
 313                 ts_format.reserved = 0;
 314
 315                 time_update.primary_host_time = usec_system;
 316                 time_update.secondary_host_time = usec_utc;
 317                 time_update.sync_info = ts_format;
 318
 319                 memcpy(r_buf, &time_update,
 320                        sizeof(struct ipc_time_update_msg));
 321         }
 322
 323         for (i = 0, reg_addr = IPC_REG_HOST2ISH_MSG; i < length >> 2; i++,
 324                         reg_addr += 4)
 325                 ish_reg_write(dev, reg_addr, r_buf[i]);
 326
 327         rem = length & 0x3;
 328         if (rem > 0) {
 329                 uint32_t reg = 0;
 330
 331                 memcpy(&reg, &r_buf[length >> 2], rem);
 332                 ish_reg_write(dev, reg_addr, reg);
 333         }
 334         /* Flush writes to msg registers and doorbell */
 335         ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
 336
 337         /* Update IPC counters */
 338         ++dev->ipc_tx_cnt;
 339         dev->ipc_tx_bytes_cnt += IPC_HEADER_GET_LENGTH(doorbell_val);
 340
 341         ish_reg_write(dev, IPC_REG_HOST2ISH_DRBL, doorbell_val);
 342         out_ipc_locked = 0;
 343
 344         ipc_send_compl = ipc_link->ipc_send_compl;
 345         ipc_send_compl_prm = ipc_link->ipc_send_compl_prm;
 346         list_del_init(&ipc_link->link);
 347         list_add_tail(&ipc_link->link, &dev->wr_free_list_head.link);
 348         spin_unlock_irqrestore(&dev->wr_processing_spinlock, flags);
 349
 350         /*
 351          * callback will be called out of spinlock,
 352          * after ipc_link returned to free list
 353          */
 354         if (ipc_send_compl)
 355                 ipc_send_compl(ipc_send_compl_prm);
 356
 357         return 0;
 358 }
 359
 360 /**
 361  * write_ipc_to_queue() - write ipc msg to Tx queue
 362  * @dev: ishtp device instance
 363  * @ipc_send_compl: Send complete callback
 364  * @ipc_send_compl_prm: Parameter to send in complete callback
 365  * @msg: Pointer to message
 366  * @length: Length of message
 367  *
 368  * Recived msg with IPC (and upper protocol) header  and add it to the device
 369  *  Tx-to-write list then try to send the first IPC waiting msg
 370  *  (if DRBL is cleared)
 371  * This function returns negative value for failure (means free list
 372  *  is empty, or msg too long) and 0 for success.
 373  *
 374  * Return: 0 for success else failure code
 375  */
 376 static int write_ipc_to_queue(struct ishtp_device *dev,
 377         void (*ipc_send_compl)(void *), void *ipc_send_compl_prm,
 378         unsigned char *msg, int length)
 379 {
 380         struct wr_msg_ctl_info *ipc_link;
 381         unsigned long   flags;
 382
 383         if (length > IPC_FULL_MSG_SIZE)
 384                 return -EMSGSIZE;
 385
 386         spin_lock_irqsave(&dev->wr_processing_spinlock, flags);
 387         if (list_empty(&dev->wr_free_list_head.link)) {
 388                 spin_unlock_irqrestore(&dev->wr_processing_spinlock, flags);
 389                 return -ENOMEM;
 390         }
 391         ipc_link = list_entry(dev->wr_free_list_head.link.next,
 392                 struct wr_msg_ctl_info, link);
 393         list_del_init(&ipc_link->link);
 394
 395         ipc_link->ipc_send_compl = ipc_send_compl;
 396         ipc_link->ipc_send_compl_prm = ipc_send_compl_prm;
 397         ipc_link->length = length;
 398         memcpy(ipc_link->inline_data, msg, length);
 399
 400         list_add_tail(&ipc_link->link, &dev->wr_processing_list_head.link);
 401         spin_unlock_irqrestore(&dev->wr_processing_spinlock, flags);
 402
 403         write_ipc_from_queue(dev);
 404
 405         return 0;
 406 }
 407
 408 /**
 409  * ipc_send_mng_msg() - Send management message
 410  * @dev: ishtp device instance
 411  * @msg_code: Message code
 412  * @msg: Pointer to message
 413  * @size: Length of message
 414  *
 415  * Send management message to FW
 416  *
 417  * Return: 0 for success else failure code
 418  */
 419 static int ipc_send_mng_msg(struct ishtp_device *dev, uint32_t msg_code,
 420         void *msg, size_t size)
 421 {
 422         unsigned char   ipc_msg[IPC_FULL_MSG_SIZE];
 423         uint32_t        drbl_val = IPC_BUILD_MNG_MSG(msg_code, size);
 424
 425         memcpy(ipc_msg, &drbl_val, sizeof(uint32_t));
 426         memcpy(ipc_msg + sizeof(uint32_t), msg, size);
 427         return  write_ipc_to_queue(dev, NULL, NULL, ipc_msg,
 428                 sizeof(uint32_t) + size);
 429 }
 430
 431 /**
 432  * ish_fw_reset_handler() - FW reset handler
 433  * @dev: ishtp device pointer
 434  *
 435  * Handle FW reset
 436  *
 437  * Return: 0 for success else failure code
 438  */
 439 static int ish_fw_reset_handler(struct ishtp_device *dev)
 440 {
 441         uint32_t        reset_id;
 442         unsigned long   flags;
 443         struct wr_msg_ctl_info *processing, *next;
 444
 445         /* Read reset ID */
 446         reset_id = ish_reg_read(dev, IPC_REG_ISH2HOST_MSG) & 0xFFFF;
 447
 448         /* Clear IPC output queue */
 449         spin_lock_irqsave(&dev->wr_processing_spinlock, flags);
 450         list_for_each_entry_safe(processing, next,
 451                         &dev->wr_processing_list_head.link, link) {
 452                 list_move_tail(&processing->link, &dev->wr_free_list_head.link);
 453         }
 454         spin_unlock_irqrestore(&dev->wr_processing_spinlock, flags);
 455
 456         /* ISHTP notification in IPC_RESET */
 457         ishtp_reset_handler(dev);
 458
 459         if (!ish_is_input_ready(dev))
 460                 timed_wait_for_timeout(WAIT_FOR_SEND_SLICE,
 461                         ish_is_input_ready(dev), (2 * HZ));
 462
 463         /* ISH FW is dead */
 464         if (!ish_is_input_ready(dev))
 465                 return  -EPIPE;
 466         /*
 467          * Set HOST2ISH.ILUP. Apparently we need this BEFORE sending
 468          * RESET_NOTIFY_ACK - FW will be checking for it
 469          */
 470         ish_set_host_rdy(dev);
 471         /* Send RESET_NOTIFY_ACK (with reset_id) */
 472         ipc_send_mng_msg(dev, MNG_RESET_NOTIFY_ACK, &reset_id,
 473                          sizeof(uint32_t));
 474
 475         /* Wait for ISH FW'es ILUP and ISHTP_READY */
 476         timed_wait_for_timeout(WAIT_FOR_SEND_SLICE, ishtp_fw_is_ready(dev),
 477                 (2 * HZ));
 478         if (!ishtp_fw_is_ready(dev)) {
 479                 /* ISH FW is dead */
 480                 uint32_t        ish_status;
 481
 482                 ish_status = _ish_read_fw_sts_reg(dev);
 483                 dev_err(dev->devc,
 484                         "[ishtp-ish]: completed reset, ISH is dead (FWSTS = %08X)\n",
 485                         ish_status);
 486                 return -ENODEV;
 487         }
 488         return  0;
 489 }
 490
 491 /**
 492  * ish_fw_reset_work_fn() - FW reset worker function
 493  * @unused: not used
 494  *
 495  * Call ish_fw_reset_handler to complete FW reset
 496  */
 497 static void fw_reset_work_fn(struct work_struct *unused)
 498 {
 499         int     rv;
 500
 501         rv = ish_fw_reset_handler(ishtp_dev);
 502         if (!rv) {
 503                 /* ISH is ILUP & ISHTP-ready. Restart ISHTP */
 504                 schedule_timeout(HZ / 3);
 505                 ishtp_dev->recvd_hw_ready = 1;
 506                 wake_up_interruptible(&ishtp_dev->wait_hw_ready);
 507
 508                 /* ISHTP notification in IPC_RESET sequence completion */
 509                 ishtp_reset_compl_handler(ishtp_dev);
 510         } else
 511                 dev_err(ishtp_dev->devc, "[ishtp-ish]: FW reset failed (%d)\n",
 512                         rv);
 513 }
 514
 515 /**
 516  * _ish_sync_fw_clock() -Sync FW clock with the OS clock
 517  * @dev: ishtp device pointer
 518  *
 519  * Sync FW and OS time
 520  */
 521 static void _ish_sync_fw_clock(struct ishtp_device *dev)
 522 {
 523         static unsigned long    prev_sync;
 524         struct timespec ts;
 525         uint64_t        usec;
 526
 527         if (prev_sync && jiffies - prev_sync < 20 * HZ)
 528                 return;
 529
 530         prev_sync = jiffies;
 531         get_monotonic_boottime(&ts);
 532         usec = (timespec_to_ns(&ts)) / NSEC_PER_USEC;
 533         ipc_send_mng_msg(dev, MNG_SYNC_FW_CLOCK, &usec, sizeof(uint64_t));
 534 }
 535
 536 /**
 537  * recv_ipc() - Receive and process IPC management messages
 538  * @dev: ishtp device instance
 539  * @doorbell_val: doorbell value
 540  *
 541  * This function runs in ISR context.
 542  * NOTE: Any other mng command than reset_notify and reset_notify_ack
 543  * won't wake BH handler
 544  */
 545 static void     recv_ipc(struct ishtp_device *dev, uint32_t doorbell_val)
 546 {
 547         uint32_t        mng_cmd;
 548
 549         mng_cmd = IPC_HEADER_GET_MNG_CMD(doorbell_val);
 550
 551         switch (mng_cmd) {
 552         default:
 553                 break;
 554
 555         case MNG_RX_CMPL_INDICATION:
 556                 if (dev->suspend_flag) {
 557                         dev->suspend_flag = 0;
 558                         wake_up_interruptible(&dev->suspend_wait);
 559                 }
 560                 if (dev->resume_flag) {
 561                         dev->resume_flag = 0;
 562                         wake_up_interruptible(&dev->resume_wait);
 563                 }
 564
 565                 write_ipc_from_queue(dev);
 566                 break;
 567
 568         case MNG_RESET_NOTIFY:
 569                 if (!ishtp_dev) {
 570                         ishtp_dev = dev;
 571                         INIT_WORK(&fw_reset_work, fw_reset_work_fn);
 572                 }
 573                 schedule_work(&fw_reset_work);
 574                 break;
 575
 576         case MNG_RESET_NOTIFY_ACK:
 577                 dev->recvd_hw_ready = 1;
 578                 wake_up_interruptible(&dev->wait_hw_ready);
 579                 break;
 580         }
 581 }
 582
 583 /**
 584  * ish_irq_handler() - ISH IRQ handler
 585  * @irq: irq number
 586  * @dev_id: ishtp device pointer
 587  *
 588  * ISH IRQ handler. If interrupt is generated and is for ISH it will process
 589  * the interrupt.
 590  */
 591 irqreturn_t ish_irq_handler(int irq, void *dev_id)
 592 {
 593         struct ishtp_device     *dev = dev_id;
 594         uint32_t        doorbell_val;
 595         bool    interrupt_generated;
 596
 597         /* Check that it's interrupt from ISH (may be shared) */
 598         interrupt_generated = check_generated_interrupt(dev);
 599
 600         if (!interrupt_generated)
 601                 return IRQ_NONE;
 602
 603         doorbell_val = ish_reg_read(dev, IPC_REG_ISH2HOST_DRBL);
 604         if (!IPC_IS_BUSY(doorbell_val))
 605                 return IRQ_HANDLED;
 606
 607         if (dev->dev_state == ISHTP_DEV_DISABLED)
 608                 return  IRQ_HANDLED;
 609
 610         /* Sanity check: IPC dgram length in header */
 611         if (IPC_HEADER_GET_LENGTH(doorbell_val) > IPC_PAYLOAD_SIZE) {
 612                 dev_err(dev->devc,
 613                         "IPC hdr - bad length: %u; dropped\n",
 614                         (unsigned int)IPC_HEADER_GET_LENGTH(doorbell_val));
 615                 goto    eoi;
 616         }
 617
 618         switch (IPC_HEADER_GET_PROTOCOL(doorbell_val)) {
 619         default:
 620                 break;
 621         case IPC_PROTOCOL_MNG:
 622                 recv_ipc(dev, doorbell_val);
 623                 break;
 624         case IPC_PROTOCOL_ISHTP:
 625                 ishtp_recv(dev);
 626                 break;
 627         }
 628
 629 eoi:
 630         /* Update IPC counters */
 631         ++dev->ipc_rx_cnt;
 632         dev->ipc_rx_bytes_cnt += IPC_HEADER_GET_LENGTH(doorbell_val);
 633
 634         ish_reg_write(dev, IPC_REG_ISH2HOST_DRBL, 0);
 635         /* Flush write to doorbell */
 636         ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
 637
 638         return  IRQ_HANDLED;
 639 }
 640
 641 /**
 642  * _ish_hw_reset() - HW reset
 643  * @dev: ishtp device pointer
 644  *
 645  * Reset ISH HW to recover if any error
 646  *
 647  * Return: 0 for success else error fault code
 648  */
 649 static int _ish_hw_reset(struct ishtp_device *dev)
 650 {
 651         struct pci_dev *pdev = dev->pdev;
 652         int     rv;
 653         unsigned int    dma_delay;
 654         uint16_t csr;
 655
 656         if (!pdev)
 657                 return  -ENODEV;
 658
 659         rv = pci_reset_function(pdev);
 660         if (!rv)
 661                 dev->dev_state = ISHTP_DEV_RESETTING;
 662
 663         if (!pdev->pm_cap) {
 664                 dev_err(&pdev->dev, "Can't reset - no PM caps\n");
 665                 return  -EINVAL;
 666         }
 667
 668         /* Now trigger reset to FW */
 669         ish_reg_write(dev, IPC_REG_ISH_RMP2, 0);
 670
 671         for (dma_delay = 0; dma_delay < MAX_DMA_DELAY &&
 672                 _ish_read_fw_sts_reg(dev) & (IPC_ISH_IN_DMA);
 673                 dma_delay += 5)
 674                 mdelay(5);
 675
 676         if (dma_delay >= MAX_DMA_DELAY) {
 677                 dev_err(&pdev->dev,
 678                         "Can't reset - stuck with DMA in-progress\n");
 679                 return  -EBUSY;
 680         }
 681
 682         pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &csr);
 683
 684         csr &= ~PCI_PM_CTRL_STATE_MASK;
 685         csr |= PCI_D3hot;
 686         pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, csr);
 687
 688         mdelay(pdev->d3_delay);
 689
 690         csr &= ~PCI_PM_CTRL_STATE_MASK;
 691         csr |= PCI_D0;
 692         pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, csr);
 693
 694         ish_reg_write(dev, IPC_REG_ISH_RMP2, IPC_RMP2_DMA_ENABLED);
 695
 696         /*
 697          * Send 0 IPC message so that ISH FW wakes up if it was already
 698          * asleep
 699          */
 700         ish_reg_write(dev, IPC_REG_HOST2ISH_DRBL, IPC_DRBL_BUSY_BIT);
 701
 702         /* Flush writes to doorbell and REMAP2 */
 703         ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
 704
 705         return  0;
 706 }
 707
 708 /**
 709  * _ish_ipc_reset() - IPC reset
 710  * @dev: ishtp device pointer
 711  *
 712  * Resets host and fw IPC and upper layers
 713  *
 714  * Return: 0 for success else error fault code
 715  */
 716 static int _ish_ipc_reset(struct ishtp_device *dev)
 717 {
 718         struct ipc_rst_payload_type ipc_mng_msg;
 719         int     rv = 0;
 720
 721         ipc_mng_msg.reset_id = 1;
 722         ipc_mng_msg.reserved = 0;
 723
 724         set_host_ready(dev);
 725
 726         /* Clear the incoming doorbell */
 727         ish_reg_write(dev, IPC_REG_ISH2HOST_DRBL, 0);
 728         /* Flush write to doorbell */
 729         ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
 730
 731         dev->recvd_hw_ready = 0;
 732
 733         /* send message */
 734         rv = ipc_send_mng_msg(dev, MNG_RESET_NOTIFY, &ipc_mng_msg,
 735                 sizeof(struct ipc_rst_payload_type));
 736         if (rv) {
 737                 dev_err(dev->devc, "Failed to send IPC MNG_RESET_NOTIFY\n");
 738                 return  rv;
 739         }
 740
 741         wait_event_interruptible_timeout(dev->wait_hw_ready,
 742                                          dev->recvd_hw_ready, 2 * HZ);
 743         if (!dev->recvd_hw_ready) {
 744                 dev_err(dev->devc, "Timed out waiting for HW ready\n");
 745                 rv = -ENODEV;
 746         }
 747
 748         return rv;
 749 }
 750
 751 /**
 752  * ish_hw_start() -Start ISH HW
 753  * @dev: ishtp device pointer
 754  *
 755  * Set host to ready state and wait for FW reset
 756  *
 757  * Return: 0 for success else error fault code
 758  */
 759 int ish_hw_start(struct ishtp_device *dev)
 760 {
 761         ish_set_host_rdy(dev);
 762         /* After that we can enable ISH DMA operation */
 763         ish_reg_write(dev, IPC_REG_ISH_RMP2, IPC_RMP2_DMA_ENABLED);
 764
 765         /*
 766          * Send 0 IPC message so that ISH FW wakes up if it was already
 767          * asleep
 768          */
 769         ish_reg_write(dev, IPC_REG_HOST2ISH_DRBL, IPC_DRBL_BUSY_BIT);
 770         /* Flush write to doorbell */
 771         ish_reg_read(dev, IPC_REG_ISH_HOST_FWSTS);
 772
 773         set_host_ready(dev);
 774
 775         /* wait for FW-initiated reset flow */
 776         if (!dev->recvd_hw_ready)
 777                 wait_event_interruptible_timeout(dev->wait_hw_ready,
 778                                                  dev->recvd_hw_ready,
 779                                                  10 * HZ);
 780
 781         if (!dev->recvd_hw_ready) {
 782                 dev_err(dev->devc,
 783                         "[ishtp-ish]: Timed out waiting for FW-initiated reset\n");
 784                 return  -ENODEV;
 785         }
 786
 787         return 0;
 788 }
 789
 790 /**
 791  * ish_ipc_get_header() -Get doorbell value
 792  * @dev: ishtp device pointer
 793  * @length: length of message
 794  * @busy: busy status
 795  *
 796  * Get door bell value from message header
 797  *
 798  * Return: door bell value
 799  */
 800 static uint32_t ish_ipc_get_header(struct ishtp_device *dev, int length,
 801                                    int busy)
 802 {
 803         uint32_t drbl_val;
 804
 805         drbl_val = IPC_BUILD_HEADER(length, IPC_PROTOCOL_ISHTP, busy);
 806
 807         return drbl_val;
 808 }
 809
 810 static const struct ishtp_hw_ops ish_hw_ops = {
 811         .hw_reset = _ish_hw_reset,
 812         .ipc_reset = _ish_ipc_reset,
 813         .ipc_get_header = ish_ipc_get_header,
 814         .ishtp_read = _ishtp_read,
 815         .write = write_ipc_to_queue,
 816         .get_fw_status = _ish_read_fw_sts_reg,
 817         .sync_fw_clock = _ish_sync_fw_clock,
 818         .ishtp_read_hdr = _ishtp_read_hdr
 819 };
 820
 821 /**
 822  * ish_dev_init() -Initialize ISH devoce
 823  * @pdev: PCI device
 824  *
 825  * Allocate ISHTP device and initialize IPC processing
 826  *
 827  * Return: ISHTP device instance on success else NULL
 828  */
 829 struct ishtp_device *ish_dev_init(struct pci_dev *pdev)
 830 {
 831         struct ishtp_device *dev;
 832         int     i;
 833
 834         dev = kzalloc(sizeof(struct ishtp_device) + sizeof(struct ish_hw),
 835                 GFP_KERNEL);
 836         if (!dev)
 837                 return NULL;
 838
 839         ishtp_device_init(dev);
 840
 841         init_waitqueue_head(&dev->wait_hw_ready);
 842
 843         spin_lock_init(&dev->wr_processing_spinlock);
 844         spin_lock_init(&dev->out_ipc_spinlock);
 845
 846         /* Init IPC processing and free lists */
 847         INIT_LIST_HEAD(&dev->wr_processing_list_head.link);
 848         INIT_LIST_HEAD(&dev->wr_free_list_head.link);
 849         for (i = 0; i < IPC_TX_FIFO_SIZE; ++i) {
 850                 struct wr_msg_ctl_info  *tx_buf;
 851
 852                 tx_buf = kzalloc(sizeof(struct wr_msg_ctl_info), GFP_KERNEL);
 853                 if (!tx_buf) {
 854                         /*
 855                          * IPC buffers may be limited or not available
 856                          * at all - although this shouldn't happen
 857                          */
 858                         dev_err(dev->devc,
 859                                 "[ishtp-ish]: failure in Tx FIFO allocations (%d)\n",
 860                                 i);
 861                         break;
 862                 }
 863                 list_add_tail(&tx_buf->link, &dev->wr_free_list_head.link);
 864         }
 865
 866         dev->ops = &ish_hw_ops;
 867         dev->devc = &pdev->dev;
 868         dev->mtu = IPC_PAYLOAD_SIZE - sizeof(struct ishtp_msg_hdr);
 869         return dev;
 870 }
 871
 872 /**
 873  * ish_device_disable() - Disable ISH device
 874  * @dev: ISHTP device pointer
 875  *
 876  * Disable ISH by clearing host ready to inform firmware.
 877  */
 878 void    ish_device_disable(struct ishtp_device *dev)
 879 {
 880         dev->dev_state = ISHTP_DEV_DISABLED;
 881         ish_clr_host_rdy(dev);
 882 }